THREE INPUT TTL OR GATE Search Results

HD74HC32

Abstract: HD74UH32 Hitachi DSA00335
Contextual Info: HD74UH32 2-input OR Gate ADE-205-018 Z 2nd Edition August 1993 Description The HD74UH32 is high speed CMOS two input OR gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high speed equivalent to LS-TTL series. The internal circuit of three

Hitachi DSA0095

Abstract: HD74HC32 HD74UH32
Contextual Info: HD74UH32 2-input OR Gate ADE-205-018B Z 3rd. Edition Sep. 2000 Description The HD74UH32 is high speed CMOS two input OR gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high speed equivalent to LS-TTL series. The internal circuit of three

Contextual Info: HD74UH32 2-Input OR Gate The HD74UH32 is high speed CMOS two input OR gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high speed equivalent to LS-TTL series. The internal circuit of three stages construction with buffer provides wide noise margin and stable output

Contextual Info: HD74UH32 2-input OR Gate The HD74UH32 is high speed CMOS two input OR gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high speed equivalent to LS-TTL series. The internal circuit of three stages construction with buffer provides wide noise margin and stable output.

Hitachi DSA00279

Contextual Info: HD74UH32 2-input OR Gate The HD74UH32 is high speed CMOS two input OR gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high speed equivalent to LS-TTL series. The internal circuit of three stages construction with buffer provides wide noise margin and stable output.

Renesas LOT CODE

Abstract: HD74HC32 HD74UH32 HD74UH32EL
Contextual Info: HD74UH32 2-input OR Gate REJ03D0203–0500Z Previous ADE-205-018C (Z Rev.5.00 Feb.02.2004 Description The HD74UH32 is high speed CMOS two input OR gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high-speed equivalent to LS-TTL series. The internal circuit of three

Contextual Info: HD74UH32 2-input OR Gate REJ03D0203–0500Z Previous ADE-205-018C (Z Rev.5.00 Feb.02.2004 Description The HD74UH32 is high speed CMOS two input OR gate using silicon gate CMOS process. With CMOS low power dissipation, it provides high-speed equivalent to LS-TTL series. The internal circuit of three

A 3020 8 pin

Abstract: 10 Hz oscillator 3020 transistor power supply TA 3020
Contextual Info: ADVANCED ANALOG A D iv is io n o f intech 3020 DESCRIPTION The 3020 m onolithic integrated circuit includes three LED/lamp drivers. Each of the three drivers has two TTL com patible inputs. When the first input is set low, the output is turned ON causing an LED or lamp to turn on.

Contextual Info: FAN3223 / FAN3224 / FAN3225 Dual 4A High-Speed, Low-Side Gate Drivers Features • •     Description Industry-Standard Pinouts 5A Peak Sink/Source at VDD = 12V 4.3A Sink / 2.8A Source at VOUT = 6V Choice of TTL or CMOS Input Thresholds Three Versions of Dual Independent Drivers:

Contextual Info: FAN3223 / FAN3224 / FAN3225 Dual 4A High-Speed, Low-Side Gate Drivers Features • •     Description Industry-Standard Pinouts 5A Peak Sink/Source at VDD = 12V 4.3A Sink / 2.8A Source at VOUT = 6V Choice of TTL or CMOS Input Thresholds Three Versions of Dual Independent Drivers:

Contextual Info: FAN3223 / FAN3224 / FAN3225 Dual 4A High-Speed, Low-Side Gate Drivers Features • •     Description Industry-Standard Pinouts 5A Peak Sink/Source at VDD = 12V 4.3A Sink / 2.8A Source at VOUT = 6V Choice of TTL or CMOS Input Thresholds Three Versions of Dual Independent Drivers:

Silicon npn TRANSISTOR TCNL 100

Abstract: tcnl 100 TRANSISTOR TCNL 100 ECL IC NAND MUX4E schematic of TTL XOR Gates TSN2 tcnl transistor ic xnor XOR23
Contextual Info: T & T MELEC I C b4E D • DOSGQEb OOlGSlfc, Preliminary Data Sheet May 1992 a TG2 ■ ATT? &t M icroelectronics a t BEST-1 Series High-Performance ECL Gate Arrays Features Description ■ 1,000 and 4,000 equivalent logic gates The BEST-1 Series High-Performance ECL Gate

carry look ahead adder

Abstract: Q20010 Q20120 Q20000
Contextual Info: DEVICE SPECIFICATION LOGIC A R R A Y S 020000 Q20000 FEATURES T U R B O ” ECL/TTL Figure 6. Q20080 Die • • • • • • • • • • Up to 18,777 gates, channelless architecture 100 ps equivalent gate delays Low power 0.5-1.0 mW/gate 10K, 10KH, 100KECL and mixed ECL/TTL capability

Xtal Oscillators using 7400

Abstract: MG1RT 7400 datasheet 2-input nand gate atmel 846 M6207 TTL 7400 propagation delay MG1000E MG1004E MG1009E MG1014E
Contextual Info: MG1RT Radiation Tolerant 0.6 Micron Sea of Gates Description The MG1RT series is a 0.6 micron 3 metal layers, array based, CMOS product family offering a new frontier in integration and speed. Several arrays up to 500k cells cover all system integration needs. The MG1RT is

MG1000E

Abstract: MG1004E MG1009E MG1014E MG1020E MG1033E MG1042E M1553
Contextual Info: MG1RT Radiation Tolerant 0.6 Micron Sea of Gates Description The MG1RT series is a 0.6 micron 3 metal layers, array based, CMOS product family offering a new frontier in integration and speed. Several arrays up to 500k cells cover all system integration needs. The MG1RT is

signal path designer

Contextual Info: PRELIMINARY DEVICE SPECIFICATION Q20000 SERIES ECL/TTL TURBO" LOGIC ARRAYS 020000 FEATURES • Up to 24000 gates, channelless architecture • 100ps equivalent gate delays • Ultra low power ,5-1.0mW/gate • 10K, 10KH, 100K ECL and mixed ECL/TTL capability

Q20P010

Abstract: Q20M100 carry look ahead adder Q20080 Q20P025 Q20025 vernier Q20000 Q20004 Q20010
Contextual Info: D EV IC E SP EC IFIC A TIO N LOGIC ARRAYS Q20000 “TURBO” ECL/TTL Q20000 FEATURES Figure 6. Q20080 Die • • • • • • • • • • Up to 18,777 gates, channelless architecture 100 ps equivalent gate delays Low power 0.5-1.0 mW/gate 10K, 10KH, 10OK ECL and mixed ECL/TTL capability

signal path designer

Contextual Info: PRELIMINARY D E V IC E S P E C IF IC A T IO N 320000 SERIES ECL/TTL "TURBO" LOGIC ARRAYS 020000 FEATURES PERFORMANCE SUMMARY PARAMETER Typical gate delay* Maximum toggle frequency Maximum TTL input frequency Maximum TTL output frequency Maximum ECL input frequency

ECL IC NAND

Abstract: PLESSEY CLA
Contextual Info: i A PLESSEY W Sem iconductors ELA 60000 SERIES Supersedes August 1987 Edition ECLGATE ARRAYS The ELA60000 series of ECL gate arrays is a very high performance family of Semi-Custom products based on an advanced 1.5 micron bipolar process. There are three members of the family,

atmel 738

Abstract: MG1070 ATMEL 706 MG1001 atmel 829
Contextual Info: MG1 0.6 Micron Sea of Gates Introduction The MG1 series is a 0.6 micron, array based, CMOS product family offering a new frontier in integration and speed. Several arrays up to 500k cells cover all system integration needs. The MG1 is manufactured using SCMOS 2/2, a 0.6 micron drawn, 3 metal layers CMOS

jtag 14

Contextual Info: MG1 0.6 Micron Sea of Gates Introduction The MG1 series is a 0.6 micron, array based, CMOS product family offering a new frontier in integration and speed. Several arrays up to 500k cells cover all system integration needs. The MG1 is manufactured using SCMOS 2/2, a 0.6 micron drawn, 3 metal layers CMOS

MG1070

Contextual Info: MG1 MG1 Sea of Gates Series 0.6 Micron CMOS Description The MG1 series is a 0.6 micron, array based, CMOS product family offering a new frontier in integration and speed. Several arrays up to 500k cells cover all system integration needs. The MG1 is manufactured using

14020

Abstract: MG2000 MG2001 MG2002 MG2004 MG2010 MG2044 MG2055
Contextual Info: MG2 0.5 Micron Sea of Gates Introduction The MG2 series is a 0.5 micron, array based, CMOS product family. Several arrays up to 700k cells cover all system integration needs. The MG2 is manufactured using SCMOS3/2, a 0.5 micron drawn, 3 metal layers CMOS process.

intel 82c51

Abstract: UT0.6uCRH UT06MRA010 ltx 600 sizes "rad" asic 400 000 gates UT06MRA050 1553 VHDL 82c51
Contextual Info: Semicustom Products UT0.6µCRΗ/SRH Commercial RadHardTM and Strategic RadHardTM Gate Array Family Data Sheet December 2003 FEATURES PRODUCT DESCRIPTION ‰ Multiple gate array sizes up to 600,000 usable equivalent gates The high-performance UT0.6µCRH/SRH gate array family