TF19D Search Results

Contextual Info: T1/E1/OC3 WAN PLL WITH SINGLE REFERENCE INPUT FEATURES • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface • Selectable input reference: 8 kHz, 1.544 MHz, 2.048 MHz or 19.44

Contextual Info: T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS FEATURES IDT82V3012 • Provides a C2/C1.5 output clock signal with the frequency controlled by the selected reference input Fref0 or Fref1 • Holdover frequency accuracy of 0.025 ppm • Phase slope of 5 ns per 125 µs

C155

Abstract: GR-1244-CORE IDT82V3155 TR62411
Contextual Info: ENHANCED T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS IDT82V3155 FEATURES • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 clock, OC-3 port and 155.52 Mbit/s application • Supports ITU-T G.813 Option 1 clocks

GR-1244-CORE

Abstract: GR1244-CORE IDT82V3011 SSOP56 TR62411
Contextual Info: T1/E1/OC3 WAN PLL WITH SINGLE REFERENCE INPUT FEATURES • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface • Selectable input reference: 8 kHz, 1.544 MHz, 2.048 MHz or 19.44

C155

Abstract: GR-1244-CORE IDT82V3155 SSOP56 TR62411
Contextual Info: ENHANCED T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS FEATURES IDT82V3155 • Provides a C2/C1.5 output clock signal with the frequency controlled by the selected reference input Fref0 or Fref1 • Holdover frequency accuracy of 0.025 ppm • Phase slope of 5 ns per 125 µs

GR-1244-CORE

Abstract: IDT82V3012 SSOP56 TR62411
Contextual Info: T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS FEATURES IDT82V3012 • Provides a C2/C1.5 output clock signal with the frequency controlled by the selected reference input Fref0 or Fref1 • Holdover frequency accuracy of 0.025 ppm • Phase slope of 5 ns per 125 µs

GR-1244-CORE

Abstract: IDT82V3012 SSOP56 TR62411 tms 1944
Contextual Info: T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS FEATURES IDT82V3012 • Provides a C2/C1.5 output clock signal with the frequency controlled by the selected reference input Fref0 or Fref1 • Holdover frequency accuracy of 0.025 ppm • Phase slope of 5 ns per 125 µs

Contextual Info: T1/E1/OC3 WAN PLL WITH SINGLE REFERENCE INPUT FEATURES • • • • • • • • • • • • • • • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing

Contextual Info: T1/E1/OC3 WAN PLL WITH SINGLE REFERENCE INPUT FEATURES • • • • • • • • • • • • • • • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing

Contextual Info: ENHANCED T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS IDT82V3155 FEATURES • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 clock, OC-3 port and 155.52 Mbit/s application • Supports ITU-T G.813 Option 1 clocks

TR62411

Abstract: GR-1244-CORE GR1244-CORE IDT82V3011
Contextual Info: T1/E1/OC3 WAN PLL WITH SINGLE REFERENCE INPUT FEATURES • • • • • • • • • • • • • • • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing

IDT82V3011

Contextual Info: IDT82V3011 Data Sheet Change Notice Supplemental Information This notice describes the differences between the updated version and its previous version of the IDT82V3011 Data Sheet. It helps readers to identify the changes when the data sheet is upgraded.

IC-2354

Abstract: C155 GR-1244-CORE IDT82V3155 TR62411 82V3155
Contextual Info: ENHANCED T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS IDT82V3155 FEATURES • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 3, Stratum 4 Enhanced and Stratum 4 clock, OC-3 port and 155.52 Mbit/s application • Supports ITU-T G.813 Option 1 clocks

GR-1244-CORE

Abstract: IDT82V3012 SSOP56 TR62411
Contextual Info: T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS FEATURES IDT82V3012 • Provides a C2/C1.5 output clock signal with the frequency controlled by the selected reference input Fref0 or Fref1 • Holdover frequency accuracy of 0.025 ppm • Phase slope of 5 ns per 125 µs

Contextual Info: ENHANCED T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS FEATURES IDT82V3155 • Provides a C2/C1.5 output clock signal with the frequency controlled by the selected reference input Fref0 or Fref1 • Holdover frequency accuracy of 0.025 ppm • Phase slope of 5 ns per 125 µs

Contextual Info: T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS FEATURES PRELIMINARY IDT82V3012 • Provides a C2/C1.5 output clock signal with the frequency controlled by the selected reference input Fref0 or Fref1 • Holdover frequency accuracy of 0.00625 ppm • Phase slope of 5 ns per 125 µs

ns 332

Abstract: IDT82V3012
Contextual Info: IDT82V3012 Data Sheet Change Notice Supplemental Information This notice describes the differences between the updated version and its previous version of the IDT82V3012 Data Sheet. It helps readers to identify the changes when the data sheet is upgraded.

Contextual Info: T1/E1/OC3 TELECOM CLOCK GENERATOR WITH DUAL REFERENCE INPUTS IDT82V3010 FEATURES • • • • • • • • • • • • • • Supports AT&T TR62411 • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface • Selectable reference inputs: 8 kHz, 1.544 MHz, 2.048 MHz or

Contextual Info: T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS FEATURES IDT82V3012 • Provides a C2/C1.5 output clock signal with the frequency controlled by the selected reference input Fref0 or Fref1 • Holdover frequency accuracy of 0.025 ppm • Phase slope of 5 ns per 125 µs

F7C-2E3-20

Abstract: GR-1244-CORE IDT82V3012 TR62411
Contextual Info: T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS FEATURES ADVANCE INFORMATION IDT82V3012 • Provides a C2/C1.5 output clock signal with the frequency controlled by the selected reference input Fref0 or Fref1 • Holdover frequency accuracy of 0.00625 ppm • Phase slope of 5 ns per 125 µs

GR-1244-CORE

Abstract: IDT82V3012 SSOP56 TR62411
Contextual Info: T1/E1/OC3 WAN PLL WITH DUAL REFERENCE INPUTS FEATURES IDT82V3012 • Provides a C2/C1.5 output clock signal with the frequency controlled by the selected reference input Fref0 or Fref1 • Holdover frequency accuracy of 0.025 ppm • Phase slope of 5 ns per 125 µs

GR-1244-CORE

Abstract: GR1244-CORE IDT82V3011 SSOP56 TR62411
Contextual Info: T1/E1/OC3 WAN PLL WITH SINGLE REFERENCE INPUT FEATURES • • • • • • • • • • • • • • • Supports AT&T TR62411 and Telcordia GR-1244-CORE Stratum 4 Enhanced and Stratum 4 timing for DS1 interfaces • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing

IDT82V3010

Abstract: SSOP56 TR62411 siemens Logo with analog input output
Contextual Info: T1/E1/OC3 TELECOM CLOCK GENERATOR WITH DUAL REFERENCE INPUTS IDT82V3010 FEATURES • • • • • • • • • • • • • • Supports AT&T TR62411 • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface • Selectable reference inputs: 8 kHz, 1.544 MHz, 2.048 MHz or

Contextual Info: T1/E1/OC3 TELECOM CLOCK GENERATOR WITH DUAL REFERENCE INPUTS IDT82V3010 FEATURES • • • • • • • • • • • • • • Supports AT&T TR62411 • Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interface • Selectable reference inputs: 8 kHz, 1.544 MHz, 2.048 MHz or