TEX-E WIRE Search Results

C042

Abstract: CD4740 C047 1S697 BP107 CD42 CD420140 CD420240 CD420840 CD47
Contextual Info: P O W E R E X INC 1SE D • 73mfa21 GGG342S 5 ■ -3 S - Z 3 w nuB tex C D 42_40 C D 47_ 40 Powerex, inc., Httlls Street, Youngwood, Pennsylvania 15697 412 925-7272 Powerex Europe, S.A., 428 Avenue G. Durand, BP107, 72003 Le Mans, France (43) 72.75.15

scr c37m

Abstract: tsf 1202 SCR Handbook thyristor st 508
Contextual Info: •cw E/tEX _ POWEREX INC D ■ CJ7 72TMb21 0 0 G 5 3 I42 fi M P R X Powerex, Inc., Hlllls Street, Youngwood, Pennsylvania 75697 412 925-7272 Powerex Europe, S.A., 428 Avenue G. Durand, B P107,72003 Le Mans, France (43)41.14.14 P tlQ S B r.*Jr

Contextual Info: D S 2 6C 3 2 A M Q M L DS26C32AMQML Quad Differential Line Receiver J u Tex a s In s t r u m e n t s Literature Number: SN 0SAS3 9 DS26C32AMQML Sem iconductor Quad Differential Line Receiver General Description with 6 mA source and sink capability. This product is pin com ­

RP250X6.000-DAP PS RW SS

Contextual Info: * / I Tex a s In s t r u m e n t s DS90UB901Q/DS90UB902Q 10 - 43MHz 14 Bit Color FPD-Link III Serializer and Deserializer with Bidirectional Control Channel G eneral Description The DS90UB901Q/DS90UB902Q chipset offers a FPD-Link III interface with a high-speed forward channel and a bidirec­

CD40107B

Abstract: s2444
Contextual Info: I ^ Tex a s In s t r u m e n t s C D 40107B Types Data sheet acquired from Harris S em iconductor S C H S 098 CMOS Dual 2-Input NAND Buffer/Driver High-Voltage T y p e 2 0 -V olt Rating • CD40107B is a dual 2-input NAND buffer/driver containing tw o independent 2input NAND buffers w ith open-drain single

Contextual Info: A D C 1 2 1 3 0 ,A D C 1 2 1 3 2 ,A D C 1 2 1 3 8 AD C12130/AD C 12132/AD C 12138 Self-C alibrating 12-Bit Plus Sign Serial I/O A/D Converters with MUX and Sam ple/Hold Tex a s In s t r u m e n t s Literature Number: SNAS098F September 8, 2008 A D C 1 2 1 3 0 /A D C 1 2 1 3 2 /A D C 1 2138

TCM1705A

Abstract: gy-80 tcm170b gy 80
Contextual Info: TCM17D5A TELECOMMUNICATION CIRCUITS INTEGRATED SPEECH CIRCUIT FOR TELEPHONE SET APR*. 1883 • Monolithic replacement for hybrid coll for the 2/4 wire conversion • Low power requirement • Automatic gain variation with DC line • Externally adjustable transmitting and

tl031 equivalent ic

Contextual Info: TL03x, TL03xA, TL03xY ENHANCED-JFET LOW-POWER LOW-OFFSET OPERATIONAL AMPLIFIERS SLOS180B —FEBRUARY 1997 - REVISED FEBRUARY 1999 ' • Direct Upgrades for the TL06x Low-Power BiFETs • Higher Slew Rate and Bandwidth Without Increased Power Consumption •

Contextual Info: TLV1570 2.7 V TO 5.5 V 8-CHANNEL 10-BIT 1.25-MSPS SERIAL ANALOG-TO-DIGITAL CONVERTER SLAS169A - DECEMBER 1997- REVISED SEPTEMBER 1998 • Fast Throughput Rate: 1.25 MSPS at 5 V, 625 KSPS at 3 V applications • Wide Analog Channel Input: 0 V to AVqq • Eight Analog Input Channels

Contextual Info: ER D P -0 2 5 -0 6 .0 0 -T E U -T T R -1 -L amtec 0 ,8 0 m m .0 3 1 5 " ERDP SER IES ER D P -0 1 3 - 0 6 .0 0 -T T R -S T R -2 -D EDGE RATE" TWINAX CABLE ASSEMBLIES Broadside wiping contacts reduce unwanted crosstalk M a te s w ith : E R F 8. E R M 8 S P E C IF IC A T IO N S

Contextual Info: ERDP–025–06.00–TEU–TTR–1–L F-212 0,80mm .0315" ERDP SERIES ERDP–013–06.00–TTR–STR–2–D EDGE RATE TWINAX CABLE ASSEMBLIES Broadside wiping contacts reduce unwanted crosstalk Mates with: ERF8, ERM8 SPECIFICATIONSi For complete specifications and

Contextual Info: TGS8705-SCC DC TO 6-GHz SPDT FET SWITCH AP PR O VAL 5026 1.1-dB Insertion Loss and 45-dB Isolation at Midband 1.2:1 Input/Output SWR 23-dBm Typical Input Power at 1-dB Gain Compression Size: 1,066 x 0,685 x 0,152 mm 0.042 x 0.027 x 0.006 Inch T h e Texas ln s tru m e n ts T G S 8 7 0 5 -S C C is one of a

Contextual Info: ERDP–025–06.00–TEU–TTR–1–L F-211-1 0,80mm .0315" ERDP SERIES ERDP–013–06.00–TTR–STR–2–D EDGE RATE TWINAX CABLE ASSEMBLIES Broadside wiping contacts reduce unwanted crosstalk Mates with: ERF8, ERM8 SPECIFICATIONSi For complete specifications and

Contextual Info: ERDP–025–06.00–TEU–TTR–1–L F-213 0,80 mm .0315" ERDP SERIES ERDP–013–06.00–TTR–STR–2–D EDGE RATE TWINAX CABLE ASSEMBLIES Broadside wiping contacts reduce unwanted crosstalk Mates with: ERF8, ERM8 SPECIFICATIONSi For complete specifications and

Contextual Info: TGS8706-SCC DC TO 8-GHz SPDT FET SWITCH A PP R O V AL 5026 • 0.7-dB Insertion Loss and 40-dB Isolation at Midband • 1.1:1 Input/Output SWR at Midband • Greater Than 0.5-W Input Power at 1-dB Gain Compression • Size: 1,625 x 0,965 x 0,152 mm 0.064 x 0.038 x 0.006 Inch

Contextual Info: TGS8630-XCC DC TO 12-GHz SPDT SWITCH AP PR O VAL 5026 On-Chip Driver Compatible With CMOS or Open-Collector TTL Typical Insertion Loss . . . 2.3 dB at 12 GHz High Isolation . . . 46 dB Through 12 GHz Useable Bandwidth Through 18 GHz Size: 3,454 x 2,007 x 0,102 mm

DALLAS 2501

Abstract: TGA8622SCC TL 2521
Contextual Info: TGA8334-SCC 2- TO 20-GHz POWER AMPLIFIER APPROVAL 5026 • 0.4-W Output Power at 1-dB Gain Compression at Midband • Positive Gain Slope Across Frequency • On-Chip Input DC-Blocking Capacitor • 1.8:1 Input SWR at Midband, 1.3:1 Output SWR at Midband •

Contextual Info: TABLE 4 END TO END "L" DV TO DV DV TO EM -TEX DV TO EM (-SEX) EM (-TEX) TO EM (-TEX) EM (-TEX) TO EM (-SEX) EM (-SEX) TO EM (-SEX) .950[24.13] .835[21.21] .806[20.48] .720[18.29] .691[17.55] .662[16.81] TABLE 3 No. OF POSITIONS N N-1 -020 -040 -060 -080

Contextual Info: SN54CDC586 3.3-V PHASE-LOCK-LOOP CLOCK DRIVER WITH 3-STATE OUPUTS SGBS311 - FEB R U AR Y 1997 WD PACKAGE TOP VIEW Low O utput Skew fo r C lock-D istribution and Clock-Generation A pplications Operates at 3.3-V V c c NC [ 1 D istributes One Clock Input to Twelve

Contextual Info: TABLE 4 END TO END "L" DV TO DV DV TO EM -TEX DV TO EM (-SEX) EM (-TEX) TO EM (-TEX) EM (-TEX) TO EM (-SEX) EM (-SEX) TO EM (-SEX) .950[24.13] .835[21.21] .806[20.48] .720[18.29] .691[17.55] .662[16.81] TABLE 3 No. OF POSITIONS N N-1 -020 -040 -060 -080

SN7401

Abstract: D1316 55115 fairchild Fairchild 9615
Contextual Info: ÛTbl724 ODÔESST S « T H M " I'lS 't- lS 'O '] SN55115, SN75115 DUAL DIFFERENTIAL LINE RECEIVERS TEXAS INSTR L I N / I N T F C T l|[]£ D1316. SEPTEMBER 1973-REVISED OCTOBER 1986 S N 6 5 1 1 5 . . . J PACKAGE S Ü 7 5 1 1 8 , . . D , J , OR N P A C K A G E

Contextual Info: TABLE 4 END TO END "L" DV TO DV DV TO EM -TEX DV TO EM (-SEX) EM (-TEX) TO EM (-TEX) EM (-TEX) TO EM (-SEX) EM (-SEX) TO EM (-SEX) .940[23.88] .830[21.08] .801[20.35] .720[18.29] .691[17.55] .662[16.81] TABLE 3 No. OF POSITIONS N N-1 -030 -060 -090 -120

Contextual Info: TABLE 4 END TO END "L" DV TO DV DV TO EM -TEX DV TO EM (-SEX) EM (-TEX) TO EM (-TEX) EM (-TEX) TO EM (-SEX) EM (-SEX) TO EM (-SEX) .950[24.13] .835[21.21] .806[20.48] .720[18.29] .691[17.55] .662[16.81] TABLE 3 No. OF POSITIONS N N-1 -014 -028 -042 -056

Contextual Info: TABLE 4 END TO END "L" DV TO DV DV TO EM -TEX DV TO EM (-SEX) EM (-TEX) TO EM (-TEX) EM (-TEX) TO EM (-SEX) EM (-SEX) TO EM (-SEX) .950[24.13] .835[21.21] .806[20.48] .720[18.29] .691[17.55] .662[16.81] TABLE 3 No. OF POSITIONS N N-1 -030 -060 -090 -120