TEGRA 3 Search Results

emmc Card connector

Abstract: Bluetooth CSR BC6 nvidia tegra 3 CSR BC6 MEC1308 nvidia tegra 4 SMSC mec1308 emmc sd socket tegra 2 MMC socket
Contextual Info: Supplier: NVIDIA Part Number: 940-81180-2000-000 Description: Harmony Tegra 2 Developer Kit Features The NVIDIA Harmony Tegra 2 Developer Kit ships with the following items in the box as shown in the photograph : • A Tegra 250 main board containing the Tegra processor, flash memory, power, reset and “recovery” buttons,

TPS51632-Q1

Contextual Info: TI Information — Selective Disclosure NDA Required TPS51632-Q1 SLUSBT1A – JANUARY 2014 – REVISED JULY 2014 2.5-V To 24-V, 3, 2, And 1-Phase Step-Down Driverless Controller For NVIDIA Tegra T40, T50 Processors for Automotive Applications 1 Features

tps51631

Contextual Info: TPS51632 www.ti.com SLUSB32A – APRIL 2013 – REVISED MAY 2013 3-2-1 Phase D-Cap+ Step-Down Driverless Controller for Tegra™ CPUs with Serial VID Control and DVFS Check for Samples: TPS51632 FEATURES DESCRIPTION • Selectable Phase Count: 3, 2, or 1

free transistor equivalent book 2sc

Abstract: short circuit protection schematic diagram 12v DC SERVO MOTOR CONTROL circuit basic circuit diagram of AC servo motor EL2037CM "Op Amp" lm 324 7429 TTL ac motor servo control circuit diagram AC Motor Servo Schematic floppy motor driver
Contextual Info: HIGHP^rofHM MCEM W lOGM TEGRAÌHlCnCUITS General Description Features • • • • • • • • • • • • No crossover distortion Low output offset current Maximum output swing Short circuit protected Programmable park voltage Programmable transconductance

Contextual Info: IN TEGRA TED C IR C U ITS UC161A UC161B UC161C UNITRODE Micropower Quad Comparator FEATURES DESCRIPTION • Programmable Output Drive Capability The UC161 family of quad comparators feature programmable DC and AC parameters. A single external resistor can set the comparators to operate in the microwatt region

Contextual Info: IDT54/74FCT373/A/C IDT54/74FCT533/A/C IDT54/74FCT573/A/C FAST CMOS OCTAL TRANSPARENT LATCHES In tegra te d D e vice T ech n o lo g y , In c. FEATURES DESCRIPTION • IDT54/74FCT373/533/573 equivalent to FAST speed and drive • IDT54/74FCT373A/533A/573A up to 30% faster than

tegra 3

Abstract: tegra SLA7042 tegra 2 reference design tegra 2 PG001M SLA7042M SLA7044M CI 555 data ci 555
Contextual Info: In Ci tegra rcu te its d Data Sheet 26112* PG001M PARALLEL-TO-SERIAL DATA CONVERTER 16 CONTROL SUPPLY 15 VECTOR CONTROL 14 CLOCK OUT 13 STROBE 12 NO CONNECT. 11 SERIAL DATA A 7 10 SERIAL DATA B 8 9 2 CCW/CW 3 NOT USABLE 4 NOT USABLE 5 MODE SELECT. .1 6 MODE

TPS51632

Abstract: tegra 2.1 IAD32 SLUSB32 JESD-51-7 v5 13005 2
Contextual Info: TPS51632 www.ti.com SLUSB32 – APRIL 2013 3-2-1 Phase D-Cap+ Step-Down Driverless Controller for Tegra CPUs with Serial VID Control and DVFS Check for Samples: TPS51632 FEATURES DESCRIPTION • • The TPS51632 is a driverless step down controller with serial control. Advanced features such as DCap+™ architecture with overlapping pulse support

PC2502V

Abstract: UPC2502 PC2502
Contextual Info: b 4 a?S2 5 OCm M BB 12b « N E C E PRELIMINARY PRODUCT INFORMATION NEC / BIPOLAR ANALOG IN TEGRA TED C IR CU IT ELECTRON DEVICE / _ ¿¿PC2502 1 9W B T L DUAL AUDIO P OWE R AMPLIFIER D E S C R IP TION The ^PC2502V is an audio power amplifier in a lo-lead-vertical-dual-in-Iine package,

HCF 401068

Abstract: 401068 LM 40106 40106 be 40106B 40106 sj 2025 40106BD 40106BE HCF401068
Contextual Info: COS/MOS IN TEGRA TEG R A TED C IR C U IT I s 7131237 UGlM läl G S- THOPI SON l i VC 1 | »Sa 7 ~ */3 -ö L s 9, ^ i3 \ tl\ * hcc /• hcf 401öbb i • h _ 41C 0 9 1 1 0 7 9 2 9 2 25 S G S SEMICONDUCTOR CORP H E X SCH M ITT T R IG G E R S • • • •

Contextual Info: TC5164 5 805AJ/AFT/AJS/AFTS-40.-50 T O S H IB A T E N T A T IV E TO SH IBA M O S DIGITAL IN TEGRA TED CIRCU IT SILICON G A TE CM O S 8,388,608-WORD x8-BIT EDO (HYPER PAGE) DYNAMIC RAM DESCRIPTION The TC5164(5)805AJ/AFT/AJS/AFTS is an EDO (hyper page) dynamic RAM organized as 8,388,608

tegra3

Abstract: nvidia tegra 4 arm 9435 nvidia tegra 3 OMAP 4470 tegra 2 1/Z160 gpu Nexus S camera IMX6QUAD tegra 3
Contextual Info: TM September 2013 • • • • • • Graphics in Freescale Introduction to graphics standards OpenGL ES vs OpenGL ES 2.0 vs OpenGL ES 3.0 vs OpenGL Freescale GPU_SDK Boundaries and relationship between layers and tools Benchmarks TM 2 Best Graphics Performance

simple 5.1 home theater circuit diagram with usb port

Contextual Info: high performance low power computing Colibri T20 Datasheet Toradex AG l Altsagenstrasse 5 l 6048 Horw l Switzerland l +41 41 500 48 00 l www.toradex.com l info@toradex.com Colibri T20 Datasheet Page | 2 Revision History Date Doc. Rev. Colibri T20 Version Changes

MC6869L

Abstract: MC6859 M6800 MMD6150 MMD7000 AO322 MC68A59CL
Contextual Info: g M O T O R O L A MC6859 A d v a n c e Inform ation H MOS DATA SECURITY DEVICE DEPLETION LETION LOi LOAD JEL, SILICON-GATE) SILICO (N-CHANNEL, D ATA SECURITY DEVICE ,PnTr ^ C6859 * aXa S e curitv Device (D S D I is a m o n o lith ic M O S in ­ tegra te d c irc u it designed to be in teg rated in to a w id e range o f equipm S u r e l 1" ' " 19 Pr° teCtion o f da,a b y ,h e e m p lo y m e n t o f c ry p to g ra p h ic

Contextual Info: REV DCN DESCRIPTION 07 08 09 17515 18086 22233 UPDATED TO STANDARDIZE DWG REVISED A, Q, Sc S DIMENSIONS CHANGED b1 MIN DIMENSION DATE APPROVED 3 S’ uU ha/m ei 3) ’Ò iU lkam ^t 6 /2 0 /9 0 8 / 1 7 /9 0 b1 S1 J2 J L1 t 4 b - _\w S — SEATING PLANE NOTES:

MO-066-AC

Contextual Info: REV DCN DESCRIPTION DATE 01 17260 UPDATED TO STANDARDIZE DWG 1/2 1 / 9 0 APPROVAL 02 61225 CORRECTION 6 /4 /9 8 lb 0B1 1 2 3 4 5 6 7 8 9 10 ©©©©00©©©© 0© © 0 © ©© ©© I ©© © © © © © 0 © © © © ©@© ©@© © © e - - e © © ©@©

Contextual Info: JHltron PRODUCT DEVICES.INC. N-CHANNEL ENHANCEMENT MÜS FET 3301 E L E C T R O N I C S W A Y • W E S T P A L M BEACH, F L O R I D A 3 3 4 0 7 TEL: 407 8 4 8 - 4 3 1 1 • TLX: 5 1 - 3 4 3 5 « F A X : (407) 0 6 3 - 5 9 4 6 MAXIMUM SYMBOL PARAMETER D r □ in-source Volt.(l)

tegra 250

Abstract: tegra 2
Contextual Info: Æwtian PRODUCT DEVICES.INC. 3301 ELECTRONICS WAY » W E S T PALM BEACH.FLORIDA 33407 T E L : 407 848-4311 • TLX: 51-3435 « F A X : (407) 863-5946 ABSOLUTE 600V, SYMBOL D rain-sou rce D rain-G a te Vo I t . ( 1 ) V oltage (Rgs=1.0Mo) (1) G ate-Source V oltage

PIFE20161B-R47MS-39

Contextual Info: FAN53525 3.0A, 2.4MHz, Digitally Programmable TinyBuck Regulator Features Description • •    Fixed-Frequency Operation: 2.4 MHz The FAN53525 is a step-down switching voltage regulator that delivers a digitally programmable output from an input

Contextual Info: ^ litro n PRODUCT DE V I C E S, I N C. N C H A N N E L ENHANCEMENT MOS FET 3301 E L E C T R O N I C S W A Y • W E S T P A L M B E A C H , F L O R I D A 3 3 4 0 7 TEL : 407 8-48-4311 • TLX: 5 1 - 3 4 3 5 * FAX: (407) 8 G 3 - 5 9 4 6 ABSOLUTE MAXIMUM RATINGS

Contextual Info: PRODUCT Æ lltron CATTALO' N-CHANNEL ENHANCEMENT M05 FET 400V, 1O A , 0 . 5 6 D SDF340 SDF340 Drain-Gate RGS=1.0Mn Î (D-1 - TERMINAL CONNECTIONS 3 H DRAIN 1 2 S OURCE S OURCE 3 GATE GATE STANDARD BEND CONFIGURATIONS Voltage (1) Drain Current DRAIN JAA

nvidia tegra 2

Abstract: nvidia tegra tegra 2 nvidia tegra 3 tegra Nvidia Tegra block diagram s3c6410 samsung S3C6410 tegra 3 tegra 2 nvidia
Contextual Info: w WAN_0227 WM835x Application Examples INTRODUCTION This document describes the applicability of the WM835x Wolfson AudioPlusTM Stereo Codec with Power Management IC to some typical portable applications. The WM835x is a family of integrated audio and power-management subsystems WM8350,

tegra 250

Contextual Info: wyyn jì il ì \v ^ n \v „ aü\ ii /± l \ ii lv. a Æ lltro n w^mmmmw u N-CHANNEL ENHANCEMENT MOS FET 200V, 9A, 0.415 Q 5DF230 SDF230 5DF230 JAA JAB JDA TE RMI NAL CONNECTIONS G GH 1 U -d ) H 1 GATE 1 DRAI N 2 DRAIN 2 SOURCE 3 SOURCE 3 GATE STANDARD BEND

tegra 3

Abstract: tegra 2
Contextual Info: Æ iit r o n PRODUCT DEVICES.INC. 3301 ELECTRONICS WAY. WEST PALM BEACH, FLORIDA 33407 TEL: 407 840-4311 FAX: (407) B63-5946 N-CHANNEL ENHANCEMENT MOS FET 100V, ABSOLUTE MAXIMUM RATINGS PARAMETER UNITS SYMBOL Dro i n - s o u r c e Vo 1 t . ( 1 ) D r a i n - G o t e Vo 1t age