TCO 7 0 8 Search Results

Contextual Info: CRYSTAL OSCILLATORS TOYOCOM vcxo T C Q -2 0 8 C , T C O -7 3 Q Z 2 Features • Wide frequency control range TCO-208C • DIP-14 Hermetically sealed package (TCO-730Z2) • TTL compatible (Fanout-2) Specifications Type Standard frequency T C O -2 0 8 C T C O -7 3 0 Z 2

Contextual Info: CRYSTAL OSCILLATORS TOYOCOM vcxo TC O -2Q 8C , T C Q -7 3 0 Z 2 Features • Wide frequency control range TCO-208C • DIP-14 Hermetically sealed package (TCO-730Z2) • TTL compatible (Fanout-2) Specifications Type S tandard freq uency TC O -208C TC O -730Z2

Contextual Info: ADVANCED Closed Frame LED Sockets . INTERCONNECTIONS. 5 Energy Way, P.O. Box 1019, W est W arw ick, Rl 02893 USA Tel. 8 0 0 -4 2 4 -9 8 5 0 / 4 0 1 -8 2 3 -5 2 0 0 Fax 4 0 1 -8 2 3 -8 7 2 3 • Email a dvintcorp@ ao l.com ■ Internet http://w w w .ad vin tco rp .co m

PLC044-440T

Contextual Info: ADVANCED Thm -Hole PLCC Sockets INTERCONNECTIONS. 5 Energy W ay, P .O . B ox 1 0 1 9 , W est W arw ick, Rl 0 28 9 3 U S A Tel. 8 0 0 -4 2 4 -9 8 5 0 / 4 0 1 -8 2 3 -5 2 0 0 F a x 4 0 1 -8 2 3 -8 7 2 3 Em ail a d vin tco rp @ a o l.c o m • Internet http://w w w .advintcorp.com

Contextual Info: ADVANCED Design Your Own DIP Decoupling Capacitor Socket INTERCONNECTIONS. 5 Energy W ay, P .O . B o x 1 0 1 9 , W est W arw ick, Rl 0 28 9 3 U S A Tel. 8 0 0 -4 2 4 -9 8 5 0 / 4 0 1 -8 2 3 -5 2 0 0 - F a x 4 0 1 -8 2 3 -8 7 2 3 • Em ail a d vin tco rp @ a o l.c o m •Internet http://w w w .advintcorp.com

Contextual Info: ADVANCED Dua| Row INTERCONNECTIONS. Male Headers 5 En e rg y W ay, P .O . B o x 1 0 1 9 , W est W arw ick, RI 0 28 9 3 U S A Tel. 8 0 0 -4 2 4 -9 8 5 0 / 4 0 1 -8 2 3 -5 2 0 0 F a x 4 0 1 -8 2 3 -8 7 2 3 Em ail a d vin tco rp @ a o l.c o m • Internet h ttp://w vw .advin tc orp .co m

PALCE22V10D

Abstract: PALGE22 PALCE22 palce22v10 programming guide
Contextual Info: P A L C E 2 2 V1 0 Flash Erasable, Reprogrammable CMOS Pal Device 5 ns tpD 181 -MHz state m achine Features * Low pow er — 10 ns m ilita ry and in d u s tria l v e rs io n s 7 ns tco 6 ns ts 10 ns tp D 11 0-MHz state m achine — 90 mA max. com m ercia l 10 ns

Contextual Info: ^ì L mav I |2.54| 0 .4 2 x I2 .5 4 I =15.081 3 0 4 - 6 9 0 6 4 - 0 2 C 4 8 F - F E T a,b,c Tco m 4.6mm QK II / c l a s s 2 o Standard Kontakt / Standard Contact |4.6mm| o o o o o o o o o o o o o o o o a b o o o o o o o o o o o o o o o o c li 15 H 13 i n i 10 9 8 7 6 5 4 3 2 1

Contextual Info: W AI V I N G IS UNPUBLISHED. RE L EAS ED fOR BY T-TCO E LE C TR O NI CS C O R P O R A T I O N . * 11 RE V I S I O N S P U BLICA T IO N RI G,<T5 R E S ER VE D . DE SCR I P 1 ION FIRST ITEM NO PART N U MB E R 1 1- 1 3 3 7 5 9 7 -0 50 1337768-1 SHR I N K 3 1 3 37 7 15-5

TMS320C31

Abstract: 26V12 PAL26V12 edram tDH31
Contextual Info: EDRAMtMemory Controller for the TMS320C31 DSP Application Report 1998 Digital Signal Processor Solutions Printed in U.S.A., January 1998 SPRA172 EDRAMtMemory Controller for the TMS320C31 DSP Enhanced Memory Systems 1850 Ramtron Drive, Colorado Springs, CO 80921

GAL20RA10

Abstract: GAL 16 v 8 D 20RA10 GAL20RA10B-10LJ GAL20RA10B-10LP GAL20RA10B-15LJ GAL20RA10B-15LP GAL20RA10B-7LJ PAL20RA10
Contextual Info: GAL20RA10 High-Speed Asynchronous E2CMOS PLD Generic Array Logic Features Functional Block Diagram • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 7.5 ns Maximum Propagation Delay — Fmax = 83.3 MHz — 9 ns Maximum from Clock Input to Data Output — TTL Compatible 8 mA Outputs

GAL20RA10

Abstract: 20RA10 GAL20RA10B-10LJ GAL20RA10B-10LP GAL20RA10B-15LJ GAL20RA10B-15LP GAL20RA10B-7LJ PAL20RA10
Contextual Info: Specifications GAL20RA10 GAL20RA10 High-Speed Asynchronous E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES 2 • HIGH PERFORMANCE E CMOS TECHNOLOGY — 7.5 ns Maximum Propagation Delay — Fmax = 83.3 MHz — 9 ns Maximum from Clock Input to Data Output

GAL20RA10

Abstract: node B 3206 20RA10 GAL20RA10B-10LJ GAL20RA10B-10LP GAL20RA10B-15LJ GAL20RA10B-15LP GAL20RA10B-7LJ PAL20RA10
Contextual Info: GAL20RA10 High-Speed Asynchronous E2CMOS PLD Generic Array Logic Features Functional Block Diagram • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 7.5 ns Maximum Propagation Delay — Fmax = 83.3 MHz — 9 ns Maximum from Clock Input to Data Output — TTL Compatible 8 mA Outputs

20RA10

Abstract: GAL20RA10 PAL20RA10 GAL20RA10B-10LJ GAL20RA10B-10LP GAL20RA10B-15LJ GAL20RA10B-15LP GAL20RA10B-7LJ
Contextual Info: Specifications GAL20RA10 GAL20RA10 High-Speed Asynchronous E2CMOS PLD Generic Array Logic FUNCTIONAL BLOCK DIAGRAM FEATURES 2 • HIGH PERFORMANCE E CMOS TECHNOLOGY — 7.5 ns Maximum Propagation Delay — Fmax = 83.3 MHz — 9 ns Maximum from Clock Input to Data Output

dcf77

Abstract: dcf77 antenna loop p q1a U4226b dcf ferrite antenna dcf77 receiver E 13007 simple SL 100 NPN Transistor SSO20 U4226B-MFS
Contextual Info: U4226B Time-Code Receiver with TC Output Description The U4226B is a bipolar integrated straight-through receiver circuit in the frequency range of 40 to 80 kHz. The device is designed for radio-controlled clock applications. Features D D D D Very low power consumption

gal22v10b-15

Contextual Info: LATTICE SEMICONDUCTOR bflE D 5 3 8 ^ 4 ^ 00026*11 214 « L A T Lattice G A L 2 2 V 1 High Performance E2CMOS PLD Generic Array Logic FEATURES FUNCTIONAL BLOCK DIAGRAM • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 5 ns Maximum Propagation Delay — Fmax = 200 MHz

U4226B

Abstract: dcf antenna U4226 DCF 77 simple SL 100 NPN Transistor dcf77 receiver pon loop antenna dcf dcf ferrite antenna 77.5 khz DCF77
Contextual Info: U4226B Time Code Receiver Description The U4226B is a bipolar integrated straight through receiver circuit in the frequency range of 40 to 80 kHz. The device is designed for radio controlled clock applications. Features D D D D Very low power consumption D Only a few external components necessary

16V88

Abstract: 16V8 PALCE16V8 PALCE16V8-10 PALCE16V8-15 PALCE16V8-25 PALCE16V8-5 PALCE16V8-7 PALCE16V8L-15 PALCE16V8L-25
Contextual Info: PALCE16V8 Flash Erasable, Reprogrammable CMOS PAL Device • Up to 16 input terms and 8 outputs • 7.5 ns com’l version 5 ns tCO 5 ns tS 7.5 ns tPD 125-MHz state machine • 10 ns military/industrial versions 7 ns tCO 10 ns tS 10 ns tPD 62-MHz state machine

simple SL 100 NPN Transistor

Abstract: wwvb DCF77 T4225B T4225B-MC T4225B-MF T4225B-MW dcf receiver time code receiver dcf
Contextual Info: T4225B Time Code Receiver Description The T4225B is a bipolar integrated straight through receiver circuit in the frequency range of 40 to 80 kHz. The device is designed for radio controlled clock applications. Features D D D D Very low power consumption D Only a few external components necessary

Contextual Info: G A L 1 6 V 8 iilL a ttice • High Performance E2CMOS PLD Generic Array Logic Semiconductor Corporation FUNCTIONAL BLOCK DIAGRAM FEATURES • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 5 ns Maximum Propagation Delay — Fmax = 166 MHz — 4 ns Maximum from Clock Input to Data Output

16v8

Abstract: 16v8 programming 16v8 spec palce16v8 programming guide PALCE16V8 PALCE16V8-10 PALCE16V8-15 PALCE16V8-25 PALCE16V8-5 PALCE16V8-7
Contextual Info: 16V8 PALCE16V8 Flash Erasable, Reprogrammable CMOS PAL Device Features • Up to 16 input terms and 8 outputs • 7.5 ns com’l version 5 ns tCO 5 ns tS 7.5 ns tPD 125-MHz state machine • 10 ns military/industrial versions 7 ns tCO 10 ns tS 10 ns tPD

time code receiver 60khz msf

Abstract: dcf77 receiver pon u4226bmfs y8018 U4226B
Contextual Info: Tem ic U4226B S e m i c o n d u c t o r s Time-Code Receiver with TC Output Description The U4226B is a bipolar integrated straight-through receiver circuit in the frequency range of 40 to 80 kHz. The device is designed for radio-controlled clock applications.

ci 7809

Abstract: GAL26V12 TWL 3016 26V12 GAL26V12C-10LJ GAL26V12C-10LP GAL26V12C-15LJ GAL26V12C-20LJ GAL26V12C-20LP ci 7814
Contextual Info: GAL26V12 High Performance E2CMOS PLD Generic Array LogicTM FEATURES FUNCTIONAL BLOCK DIAGRAM I/CLK 1 8 8 INPUT I/O/Q OLMC 2 I/O/Q 12 INPUT INPUT INPUT • PRELOAD AND POWER-ON RESET OF REGISTERS — 100% Functional Testability INPUT • APPLICATIONS INCLUDE:

Contextual Info: Lattice GAL20RA10 High-Speed Asynchronous E2CMOS PLD Generic Array Logic ; Semiconductor I Corporation FUNCTIONAL BLOCK DIAGRAM FEATURES • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 7.5 ns Maximum Propagation Delay — Fmax = 83.3 MHz — 9 ns Maximum from Clock Input to Data Output