TA 2104 DN Search Results

72V284

Abstract: TA 2104 DN 72284
Contextual Info: 3.3 VOLT VARIABLE WIDTH SUPERSYNC FIFO 8,192 x 18 or 16,384 x 9 16,384 x 18 or 32,768 x 9 32,768 x 18 or 65,536 x 9 65,536 x 18 or 131,072 x 9 131,072 x 18 or 262,144 x 9 262,144 x 18 or 524,288 x 9 Integrated Device Technology, Inc. FEATURES: • Choose among the following memory organizations:

JR 3610

Contextual Info: 3.3 VOLT VARIABLE WIDTH SUPERSYNC FIFO 8,192 x 18 or 16,384x9 16,384x18 or 32,7 68 x 9 32,7 68 x 18 or 65,5 36 x 9 65,5 36 x 18 or 131,072x9 131,072 x 18 or 262,144x9 262,144 x 18 or 524,288 x 9 FEATURES: • Choose among the following memory organizations:

aa1413

Abstract: AA1716
Contextual Info: 3.3 VOLT VARIABLE W IDTH SUPERSYNC FIFO 8 ,1 9 2 x 1 8 or 1 6 ,3 8 4 x 9 16,384 x 18 or 3 2 ,7 6 8 x 9 3 2 ,7 6 8 x 1 8 or 6 5 ,5 3 6 x 9 6 5 ,5 3 6 x 1 8 or 1 3 1 ,0 7 2 x 9 1 3 1 ,0 7 2 x 1 8 or 2 6 2 ,1 4 4 x 9 262,144 x 18 or 524,288 x 9 FEATURES: • Choose among the following memory organizations:

AA1716

Abstract: 72284
Contextual Info: 3.3 VO LT VARIABLE W IDTH SUPERSYNC FIFO 8 ,1 9 2 x 1 8 or 1 6 ,3 8 4 x 9 1 6 ,3 8 4 x 1 8 or 3 2 ,7 6 8 x 9 3 2 ,7 6 8 x 1 8 or 6 5 ,5 3 6 x 9 6 5 ,5 3 6 x 1 8 or 1 3 1 ,0 7 2 x 9 1 3 1 ,0 7 2 x 1 8 or 2 6 2 ,1 4 4 x 9 262,144 x 18 or 524,288 x 9 FEATURES:

Contextual Info: CCDリニアイメージセンサ S12379 画素サイズ: 8 x 8 m, 4ポート読み出し 高速応答・高感度を実現した表面入射型CCD S12379はマシンビジョンカメラ用に設計された高速ラインレートの表面入射型CCDリニアイメージセンサです。

TL 1838

Abstract: ITT 2222 A Mitel Semiconductor process flow to design a full 18*16 barrel shifter design pic 1840 ATS 16Mhz MITEL CLA full 18*16 barrel shifter design
Contextual Info: CLA90000 SERIES j j j j ivilTEL HIGH DENSITY CMOS GATE ARRAYS s b m Sc o n â î c t o r DS4375 - 2.0 April 1997 INTRODUCTION BENEFITS The CLA90000 family of gate arrays from Mitel Sem icon­ ductor consists of 14 fixed-size arrays with the option of building optimized arrays with up to 1.1 million gates. This

5035D

Abstract: T1SP4180
Contextual Info: TISP4125F3, T1SP4150F3, TISP4180F3 SYMMETRICAL TRANSIENT VOLTAGE SUPPRESSORS Copyright €>1997, Pow er Innovations Limitad, U K M A R C H 1994 • R E V IS E D S E P T E M B E R 1997 TELECOM M UNICATION S Y S T E M S E C O N D A R Y PR O TECTIO N • k>rv-Jmplanted Breakdown Ragion

Contextual Info: Freescale Semiconductor, Inc. Freescale Semiconductor, Inc. MC68HC705P9 Technical Data M68HC05 Microcontrollers MC68HC705P9/D Rev. 4.0, 4/2002 WWW.MOTOROLA.COM/SEMICONDUCTORS For More Information On This Product, Go to: www.freescale.com Freescale Semiconductor, Inc.

Contextual Info: SN55ALS056, SN55ALS057, SN75ALS056, SN75ALS057 TRAPEZOIDAL-WAVEFORM INTERFACE BUS TRANSCEIVERS SLLS028E - AUGUST 1987 - REVISED MAY 1995 SUITABLE FOR IEEE STANDARD 896 APPLICATIO NSt SN55ALS056 and SN7SALS056 are Octal Transceivers • Logic-Level 1-V Bus Swing Reduces Power

Contextual Info: MITSUBISHI LSIs M5M44258BP, J,L-7, -8,-10 STATIC COLUMN MODE 1 0 4 8 5 7 6 - B IT 2 6 2 144-W ORD BY 4-BIT DYNAM IC RAM DESCRIPTION This is a fa m ily o f 2 6 2 1 4 4 -w o r d b y 4 - b it d y n a m ic R A M s, PIN C O N F IG U R A T IO N (TOP V IE W ) fa b ric a te d w ith th e high p e rfo rm a n c e C M O S process, and

Transistor Substitution

Abstract: mbrs0540 TPF0410 MAX1620 MAX1620EEE MAX1621 MAX1621EEE "1N6263" 2106 battery base
Contextual Info: 19-1214; Rev 1; 1/98 NUAL KIT MA ATION EET H S A EVALU T WS DA O L L O F Digitally Adjustable LCD Bias Supplies The MAX1620/MAX1621 convert a 1.8V to 20V battery voltage to a positive or negative LCD backplane bias voltage. Backplane bias voltage can be automatically

Transistor Substitution

Abstract: TPF0410 MAX1620 MAX1620EEE MAX1621 MAX1621EEE
Contextual Info: 19-1214; Rev 0; 7/97 KIT ATION EVALU E L B A IL AVA Digitally Adjustable LCD Bias Supplies _Features ♦ 1.8V to 20V Battery Input Voltage ♦ Automatic Disable when Display Logic is Shut Down ♦ Extremely Small QSOP Package ♦ 32-Level Internal DAC

tundra scv64

Contextual Info: Table of Contents 1 General Information. 1-1 1.1 Introduction. 1-1 1.2

Contextual Info: ADVANCE M I|— C 3nP vl I Mi — 128K x 18, 64K x 32/36 2. 5V I/O, FLOW -THROUGH SYN CBUR ST SRAM MT58LC128K18E1, MT58LC64K32E1, MT58LC64K36E1 SYNCBURST SRAM 3.3V Supply, 2.5V I/O, Flow-Through and Burst Counter SYNCBURST SRAM FEATURES • • • • •

Contextual Info: yi/iyixiyn CMOS 12-B it B uffered M ultiplying DAC The AD7545 is a 12-bit CMOS multiplying digital-toanalog converter DAC with internal data latches. Input data is loaded as a_aingle 12-bit word and latched under the control of CS and WR inputs. When CS and WR are low, the input data latches are trans­

Contextual Info: A S p AUSTIN SEMICONDUCTOR, INC. ^ m e g H s DRAM PRELIMINARY 1 D R A M M E G x 1 6 D R A M 3.3V, EDO PAGE MODE, OPTIONAL EXTENDED REFRESH AVAILABLE AS MILITARY SPECIFICATIONS PIN ASSIGNMENT Top View • M IL-STD 883 44/50-Pin SOJ/LCC/Gull Wing 450mil • SM D Planned

7545c

Contextual Info: y n y j x i y n C M O S 1 2 -B it B u ffe re d M u ltip ly in g DAC Features ♦ 12-Bit Resolution ♦ ±1 LSB Gain Accuracy G Grade ♦ Single Supply Operation 4 Improved ESD Protection + C M O S/TTL Compatible for V DD = +5V M X 7545 w o rk s w ith a sin g le + 5 V o r +15V p o w e r supply.

AD7545

Abstract: AD7545GLN AD7545JCWP AD7545JN AD7545KCWP AD7545KN AD7545LCWP AD7545LN AD7545CQ
Contextual Info: ykiyjxiyki C M O S 1 2 -B it B u ffe re d M u ltip ly in g DAC The AD7545 is a 12-bit CM OS m ultiplyin g d ig ita l-to analog converter DAC w ith internal data latches. In p ut data is loaded as a_aingle 12-bit w ord and la tc hed un d er the c o n tro l o f CS and WR inputs. When

sem 2106 inverter diagram

Abstract: sem 2107 inverter sem 2106 inverter sem 2106 inverter block diagram free sem 2105 sem 2106 sem 2106 manual C5000 sem 2106 diagram TMS320
Contextual Info: DSP/BIOS TextConf User’s Guide Literature Number: SPRU007A November 2001 Printed on Recycled Paper IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries TI reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services

flashpro3 schematic

Abstract: LVCMOS15
Contextual Info: 2 – Device Architecture Fusion Stack Architecture To manage the unprecedented level of integration in Fusion devices, Actel developed the Fusion technology stack Figure 2-1 . This layered model offers a flexible design environment, enabling design at very high and very low levels of abstraction. Fusion peripherals include hard analog IP

CSR USB SPI converter

Abstract: M37500 Mitsubishi Semiconductor America "USB Token" 1997 80P6N M37640E8-XXXFP INTEL 8042
Contextual Info: Preliminary Single-Chip 8-BIT CMOS Microcontroller M37640E8-XXXFP Specification Ver 1.051 MITSUBISHI SEMICONDUCTOR AMERICA, INC. 7600 Series M37640E8-XXXF Preliminary Specification Mitsubishi Microcomputers This publication, or any parts thereof, may not be reproduced in any form without the prior written

AFS600-FG256

Abstract: zo 103 ma 75 607 A54 ZENER flashpro3 schematic mark AT0 Unipolar PC atx 400 P4 power supply diagram zener Diode B23 PQ208 QN108 QN180
Contextual Info: Preliminary v1.7 Actel Fusion Mixed-Signal FPGAs Family with Optional ARM® Support Features and Benefits – Frequency: Input 1.5–350 MHz, Output 0.75–350 MHz Low Power Consumption High-Performance Reprogrammable Flash Technology • • • • • Single 3.3 V Power Supply with On-Chip 1.5 V Regulator

AA1716

Contextual Info: 3.3 V O L T V A R IA B L E WIDTH S U P E R S Y N C FIFO 8,192 x 18 or 16,384 x 9 16,384 x 18 or 32,768 x 9 32,768 x 18 or 65,536 x 9 65,536 x 18 or 13 1,072 x 9 131,072 x 18 or 262,144 x 9 262,144 x 18 or 524,288 x 9 FE ATURES: • Choose among the following memory organizations:

Contextual Info: TVP5146M2 NTSC/PAL/SECAM 4x10-Bit Digital Video Decoder With Macrovision Detection, YPbPr Inputs, 5-Line Comb Filter, and SCART Support Data Manual PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas