SY101S324 Search Results
SY101S324 Datasheets Context Search
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Contextual Info: & LOW POWER HEX TTL-to-ECL TRANSLATOR SYNERGY SEMICONDUCTOR FEATU R ES SY100S324 SY101S324 D E S C R IP TIO N Max. Propagation Delay o f 1.5ns. The SY100/101S324 is a hex translator, designed to convert TTL logic levels to 100K ECL levels. The inputs are TTL |
OCR Scan |
sy100s324sy101s324-55masy100/101s324+1 | |
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Contextual Info: * LOW POWER HEX ECL-to-TTL TRANSLATOR SYNERGY SEMICONDUCTOR SY100S325 SY101S325 OC- D E S C R IP TIO N FEA TU R ES Max. Propagation Delay of 3.8ns. Iee The SY100/101S325 is a hex translator for converting 100K ECL logic levels to TTL logic levels. Inputs can be used as |
OCR Scan |
sy100s325sy101s325-37masy100s324+4 |