SUPERFLASH SST Search Results

S7201

Abstract: D701 EEPROM cross NAND read disturb SST superflash picture of d701 TRansistor 701
Contextual Info: SuperFlash EEPROM Technology Technical Paper November 2001 SuperFlash EEPROM Technology INTRODUCTION The following paper describes the patented and proprietary Silicon Storage Technology, Inc. SST CMOS SuperFlash EEPROM technology and the SST field enhancing tunneling injector split-gate memory cell. The SuperFlash technology and memory cell have a number of important

SST superflash

Abstract: "silicon storage technology" superflash S72013
Contextual Info: Practical Considerations for Minimizing Problems When Using Programmers and SST SuperFlash Memories Practical Considerations for Minimizing Problems When Using Programmers and SST SuperFlash Memories Application Note October 2001 INTRODUCTION AC Power Requirements

3243B

Contextual Info: 32 Mbit Concurrent SuperFlash + 2 / 4 Mbit SRAM ComboMemory SST34HF3223B / SST34HF3243B SST34HF3223B / SST24HF3243B32 Mbit Concurrent SuperFlash + 2/4 Mbit SRAM ComboMemories Preliminary Information FEATURES: • Flash Organization: Two 1M x16 • Quad-Bank Architecture for Concurrent

Contextual Info: 16 Mbit x16 Concurrent SuperFlash SST36VF1601D / SST36VF1602D SST36VF1601D / 1602D16Mb (x16) Concurrent SuperFlash Advance Information FEATURES: • Organized as 1M x16 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection

TRC 561 a3 diagram

Abstract: S71214-00-000 555H SST34HF1681 S71214
Contextual Info: 16 Mbit Concurrent SuperFlash + 8 Mbit SRAM ComboMemory SST34HF1681 SST34HF16818 Mb Flash x16 Concurrent SuperFlash ComboMemory Advance Specifications FEATURES: • Flash Organization: 1M x16 • Dual-Bank Architecture for Concurrent Read/Write Operation

28SF040

Abstract: SST28SF040 SST28SF040-4
Contextual Info: SST28SF040–4 Megabit SuperFlash EEPROM Command Interrupt Recovery Application Note 1.0 INTRODUCTION The SST 28SF040 SuperFlash EEPROM offers the ease of 5V-only reprogrammability along with the operational safety provided by the use of command registers.

Contextual Info: 16 Mbit Concurrent SuperFlash SST36VF1601 SST36VF16012.7V 16Mb x16 Concurrent SuperFlash Data Sheet FEATURES: • Organized as 1M x16 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection - SST36VF1601: 12 Mbit + 4 Mbit

A20-A11

Contextual Info: 32 Mbit 2M x16 Concurrent SuperFlash SST36WF3203 Advance Information SST36WF32031.65V 32Mb (x16) Concurrent SuperFlash FEATURES: • Organized as 2M x16 • Dual Bank Architecture for Concurrent Read-While-Write Operation • Single 1.65-1.95V for Read-While-Write Operations

28SF040

Abstract: SST28SF040-150-4I-EI Silicon Storage Technology "silicon storage technology" program erase read "silicon storage technology" superflash SST28SF040-150-3C-EI 2003C 28SF040-150 2003i
Contextual Info: Data Sheet SST 28SF040 5.0V-only 4 Megabit SuperFlash EEPROM July 1996 1996 Silicon Storage Technology, Inc. The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. This specification is subject to change without notice.

28vF040

Contextual Info: Preliminary Specifications SST 28VF040 2.7V-only 4 Megabit SuperFlash EEPROM June 1997 1997 Silicon Storage Technology, Inc. The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. This specification is subject to change without notice.

CR10

Contextual Info: SuperFlash EEPROM Technology Technical Paper 1.0 INTRODUCTION The following paper describes the patented and proprietary Silicon Storage Technology, Inc. SST CMOS SuperFlash EEPROM technology and the SST field enhancing tunneling injector split-gate memory cell. The

SST36VF3203

Abstract: 555H BKX555H SST36VF3204 ba4932
Contextual Info: 32 Mbit x8/x16 Concurrent SuperFlash SST36VF3203 / SST36VF3204 SST36VF3201C / 1602C32Mb (x8/x16) Concurrent SuperFlash Advance Information FEATURES: • Organized as 2M x16 or 4M x8 • Dual Bank Architecture for Concurrent Read/Write Operation – 32 Mbit Bottom Sector Protection

ci 555

Abstract: 555H SST36VF1601C SST36VF1602C
Contextual Info: 16 Mbit x8/x16 Concurrent SuperFlash SST36VF1601C / SST36VF1602C SST36VF1601C / 1602C16Mb (x8/x16) Concurrent SuperFlash Advance Information FEATURES: • Organized as 1M x16 or 2M x8 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection

555H

Abstract: SST36VF1601E SST36VF1602E C0010
Contextual Info: 16 Mbit x8/x16 Concurrent SuperFlash SST36VF1601E / SST36VF1602E SST36VF1601E / 1602E16Mb (x8/x16) Concurrent SuperFlash Data Sheet FEATURES: • Organized as 1M x16 or 2M x8 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection

SST28SF040

Abstract: SST28SF040-4
Contextual Info: SST28SF040–4 Megabit SuperFlash EEPROM Command Interrupt Recovery Application Note Revised March 1998 1.0 INTRODUCTION The SST28SF040 SuperFlash EEPROM offers the ease of 5V-only reprogrammability along with the operational safety provided by the use of command registers. The

555H

Abstract: SST36VF1601E SST36VF1602E
Contextual Info: 16 Mbit x8/x16 Concurrent SuperFlash SST36VF1601E / SST36VF1602E SST36VF1601E / 1602E16Mb (x8/x16) Concurrent SuperFlash Data Sheet FEATURES: • Organized as 1M x16 or 2M x8 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection

F24-12

Contextual Info: 16 Mbit Concurrent SuperFlash SST36VF1601 SST36VF16012.7V 16Mb x16 Concurrent SuperFlash Data Sheet FEATURES: • Organized as 1M x16 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection - SST36VF1601: 12 Mbit + 4 Mbit

28SF040

Abstract: 28SF040-150 120-3C
Contextual Info: Data Sheet SST 28SF040 5.0V-only 4 Megabit SuperFlash EEPROM June 1997 1997 Silicon Storage Technology, Inc. The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. This specification is subject to change without notice.

28LF040

Abstract: SST28LF040-250-4C-EI SST28LF040-200-3C-EI 28LF040-200
Contextual Info: Data Sheet SST 28LF040 3.0V-only 4 Megabit SuperFlash EEPROM July 1996 1996 Silicon Storage Technology, Inc. The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. This specification is subject to change without notice.

flash "high temperature data retention" mechanism

Abstract: Angstrem Hebrew material science and technology 1117 FG 0.18-um CMOS Flash technology DSASW0037374
Contextual Info: SuperFlash Memory Program/Erase Endurance Viktor Markov, Xian Liu, Alexander Kotov, Amitay Levi, Tho Ngoc Dang, and Yuri Tkachev Silicon Storage Technology, Inc., 1171 Sonora Court, Sunnyvale, CA 94086, E-mail: akotov@sst.com Abstract––Program/erase endurance data for SuperFlash

Contextual Info: 16 Mbit x16/x8 Concurrent SuperFlash Memory SST34HF1601B SST34HF1601B16Mb (x16/x8) Concurrent SuperFlash Memory Preliminary Specifications FEATURES: • Organized as 1M x16 or 2M x8 • Dual Bank Architecture for Concurrent Read/Write Operation – Bank1: 12 Mbit (768K x16/1536K x8) Flash

Contextual Info: 16 Mbit Concurrent SuperFlash SST36VF1601 / SST36VF1602 SST36V160x16Mb x16 Concurrent SuperFlash Advance Information FEATURES: • Organized as 1M x16 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection - SST36VF1601: 12 Mbit + 4 Mbit

f333

Abstract: SST36VF1601 2F312 F2311
Contextual Info: 16 Mbit Concurrent SuperFlash SST36VF1601 SST36V160116Mb x16 Concurrent SuperFlash Data Sheet FEATURES: • Organized as 1M x16 • Dual Bank Architecture for Concurrent Read/Write Operation – 16 Mbit Bottom Sector Protection - SST36VF1601: 12 Mbit + 4 Mbit

transistor c1c

Abstract: floating-gate injector CR10
Contextual Info: SuperFlash EEPROM Technology Technical Paper Revised March 1999 1.0 INTRODUCTION The following paper describes the patented and proprietary Silicon Storage Technology, Inc. SST CMOS SuperFlash EEPROM technology and the SST field enhancing tunneling injector split-gate memory cell. The