SUITE SLAVE Search Results

SUITE SLAVE Result Highlights (5)

Part	Manufacturer	Description
5962F2021601VXC	Texas Instruments	Space grade (QMLV-RHA) 10/100/1000 Ethernet PHY with SEFI monitoring suite 64-CFP -55 to 125
DP83561HBE/EM	Texas Instruments	Space grade (QMLV-RHA) 10/100/1000 Ethernet PHY with SEFI monitoring suite 64-CFP 25 to 25
CD4027BE	Texas Instruments	CMOS Dual J-K Master-Slave Flip-Flop 16-PDIP -55 to 125
CD4027BF	Texas Instruments	CMOS Dual J-K Master-Slave Flip-Flop 16-CDIP -55 to 125
CD4027BMT	Texas Instruments	CMOS Dual J-K Master-Slave Flip-Flop 16-SOIC -55 to 125

SUITE SLAVE Datasheets Context Search

Catalog Datasheet	Type	Document Tags	PDF
edge-detection sharpening verilog code Abstract: verilog code for 2D linear convolution verilog code for 2D linear convolution filtering video pattern generator vhdl ntsc BT1120 free verilog code of median filter 1080p black test pattern scaler verilog code source code verilog for matrix transformation composite video input to output vga schematic Contextual Info: Video and Image Processing Suite User Guide Video and Image Processing Suite User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-VIPSUITE-10.0 Document last updated for Altera Complete Design Suite version: Document publication date: 10.0	Original	UG-VIPSUITE-10 AN427: edge-detection sharpening verilog code verilog code for 2D linear convolution verilog code for 2D linear convolution filtering video pattern generator vhdl ntsc BT1120 free verilog code of median filter 1080p black test pattern scaler verilog code source code verilog for matrix transformation composite video input to output vga schematic	PDF
Bluetooth working principle Abstract: bluetooth speaker bluetooth RS232 block diagram bluetooth headset bluetooth headset DK-9240 digianswer rs232 Contextual Info: BLUETOOTH APPROVED PRODUCT SHEET DIGIANSWER / BLUETOOTH SOFTWARE SUITE Bluetooth approved solution: PC stacks/embedded stacks The Digianswer Bluetooth PC Software Suite BTSWS is a complete Bluetooth host system solution for the Microsoft Windows Environments. The Software Suite contains a full-featured	Original		PDF
microSD slot Abstract: modem MMI bidirectional wiegand G4D32RS CR2032 SNAP-M32 POWER CR2032 FACTORYFLOOR SNAP-M64 Contextual Info: Legacy and Current Product Comparison and Compatibility Charts Software Suite Comparison: PAC Project , ioProject™, FactoryFloor™ Current Software Suite: PAC Project FEATURE Software included PAC Project Basic Control programming: PAC Control™ Basic	Original	1693-100416--Legacy microSD slot modem MMI bidirectional wiegand G4D32RS CR2032 SNAP-M32 POWER CR2032 FACTORYFLOOR SNAP-M64	PDF
lwIP Abstract: programmer EPLD EP2S60 Contextual Info: Nios II Embedded Design Suite 6.1 Errata Sheet December 2006 Errata Sheet This document addresses known errata and documentation issues for the Nios II Embedded Design Suite EDS version 6.1. Errata are functional defects or errors, which might cause the product to deviate from published	Original		PDF
6 WAY HEADER JTAG PORT Abstract: Free Projects of nios ii assembly language tse altera electrical engineering projects nios2 2s60 rohs 1C20 2C35 2S60 EP2S60 Contextual Info: Nios II Embedded Design Suite 7.1 Errata Sheet May 2007 Errata Sheet This document addresses known errata and documentation issues for the Nios II Embedded Design Suite EDS version 7.1. Errata are functional defects or errors, which might cause the product to deviate from published	Original		PDF
2C35 Abstract: 2S60 EP2S60 Contextual Info: Nios II Embedded Design Suite 7.0 Errata Sheet March 2007 Errata Sheet This document addresses known errata and documentation issues for the Nios II Embedded Design Suite EDS version 7.0. Errata are functional defects or errors, which might cause the product to deviate from published	Original		PDF
Contextual Info: Avalon Interface Specifications Avalon Interface Specifications 101 Innovation Drive San Jose, CA 95134 www.altera.com MNL-AVABUSREF-2.1 Document last updated for Altera Complete Design Suite version: Document publication date: 13.0 May 2013 Feedback Subscribe	Original		PDF
TVL320AIC33 Abstract: TH8200 VARTA 500 RST 3.5mm Stereo jack pinout female TVL320 RPACK8-33 RPACK4-33 infrared LED with MSP430 SFM-105-02-S-D-LC SFM-105-02-s-d Contextual Info: TMS320DM355 Evaluation Module Technical Reference 2008 DSP Development Systems TMS320DM355 Evaluation Module Technical Reference 509905-0001 Rev. E April 2008 SPECTRUM DIGITAL, INC. 12502 Exchange Drive, Suite 440 Stafford, TX. 77477 Tel: 281.494.4505 Fax: 281.494.5310	Original	TMS320DM355 TMS320DM355 TP-60 TP-30 DM355 DM355 TVL320AIC33 TH8200 VARTA 500 RST 3.5mm Stereo jack pinout female TVL320 RPACK8-33 RPACK4-33 infrared LED with MSP430 SFM-105-02-S-D-LC SFM-105-02-s-d	PDF
TVL320AIC3106 Abstract: AIC3106 RJ9 connector BLMG1P500SPT TVL320 RPACK8-10 HALO HFJ11-2450E-L21 connector Rj9 HFJ11-2450E-l21 MHC-W21-601 Contextual Info: OMAP-L137 Evaluation Module Technical Reference 2008 DSP Development Systems OMAP-L137 Evaluation Module Technical Reference 511345-0001 Rev. A November 2008 SPECTRUM DIGITAL, INC. 12502 Exchange Drive, Suite 440 Stafford, TX. 77477 Tel: 281.494.4505 Fax: 281.494.5310	Original	OMAP-L137 OMAP-L137 FJV3109R TVL320AIC3106 AIC3106 RJ9 connector BLMG1P500SPT TVL320 RPACK8-10 HALO HFJ11-2450E-L21 connector Rj9 HFJ11-2450E-l21 MHC-W21-601	PDF
5AGXFB3H4F35C5 Abstract: UG-01062-4 EP4CGX150DF31 5AGX vhdl code lte vhdl code scrambler 5SGXE 5SGXEA7N3F45C4 cyclone4 EP2AGX260FF35 Contextual Info: CPRI MegaCore Function User Guide CPRI MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01062-4.1 Document last updated for Altera Complete Design Suite version: Document publication date: 11.1 November 2011 Subscribe	Original	UG-01062-4 5AGXFB3H4F35C5 EP4CGX150DF31 5AGX vhdl code lte vhdl code scrambler 5SGXE 5SGXEA7N3F45C4 cyclone4 EP2AGX260FF35	PDF
pc keyboard ic Abstract: EP3CLS200 freescale m9k Contextual Info: Cyclone III Device Handbook Volume 1 Cyclone III Device Handbook Volume 1 101 Innovation Drive San Jose, CA 95134 www.altera.com CIII5V1-4.0 2011 Document last updated for Altera Complete Design Suite version: Document publication date: 11.1 December 2011	Original		PDF
Contextual Info: DPAA Configuration Tool User Guide Document Number: QCSDPAAUG Rev 3.0, 09/2013 DPAA Configuration Tool User Guide, Rev. 3.0, 09/2013 2 Freescale Semiconductor, Inc. Contents Section number Title Page Chapter 1 QorIQ Configuration Suite DPAA Configuration Tool	Original		PDF
VMS747 Abstract: architecture arm7 PHILIPS SEMICONDUCTORS SECURE PRODUCTS 627-060 ipsec amba ARM7 PCI interface "ESP" AMBA Peripheral Bus decoder Contextual Info: A comprehensive suite of data security functions in a single integrated circuit. VMS747 Security Processor SECURITY SYSTEM ON A CHIP • 100 MHz ARM7 CPU Subsystem • External Memory Interface Controller • PCI 2.2 Compliant Interface • Serial Interfaces	Original	VMS747 1024-bit VMS747 architecture arm7 PHILIPS SEMICONDUCTORS SECURE PRODUCTS 627-060 ipsec amba ARM7 PCI interface "ESP" AMBA Peripheral Bus decoder	PDF
Contextual Info: Arria II Device Handbook Volume 1: Device Interfaces and Integration Arria II Device Handbook Volume 1: Device Interfaces and Integration 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V1-4.1 Document last updated for Altera Complete Design Suite version:	Original		PDF

Contextual Info: Arria II Device Handbook Volume 1: Device Interfaces and Integration Arria II Device Handbook Volume 1: Device Interfaces and Integration 101 Innovation Drive San Jose, CA 95134 www.altera.com AIIGX5V1-4.3 Document last updated for Altera Complete Design Suite version:	Original		PDF
H948 Abstract: ethernet mac fpga frame by vhdl examples 10 Gbps phy ALTERA PART MARKING ethernet mac chip testbench of an ethernet transmitter in verilog AN320 CRC-32 M20K Contextual Info: 10-Gbps Ethernet MAC MegaCore Function User Guide 10-Gbps Ethernet MAC MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01083-1.1 Document last updated for Altera Complete Design Suite version: Document publication date:	Original	10-Gbps UG-01083-1 H948 ethernet mac fpga frame by vhdl examples 10 Gbps phy ALTERA PART MARKING ethernet mac chip testbench of an ethernet transmitter in verilog AN320 CRC-32 M20K	PDF
Contextual Info: 10-Gbps Ethernet MAC MegaCore Function User Guide 10-Gbps Ethernet MAC MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01083-3.2.1 Document last updated for Altera Complete Design Suite version: Document publication date:	Original	10-Gbps UG-01083-3	PDF
Contextual Info: External Memory Interface Handbook Volume 5 Section I. ALTMEMPHY Design Tutorials External Memory Interface Handbook Volume 5 Section I. ALTMEMPHY Design Tutorials 101 Innovation Drive San Jose, CA 95134 www.altera.com EMI_TUT_DDR-3.0 Document last updated for Altera Complete Design Suite version:	Original		PDF
intel 8259 with pinout diagram Abstract: 8259 Programmable Interrupt Controller pdf file application of 8259 microcontroller "Programmable Interrupt Controller" 8259 Programmable Interrupt Controller intel 8259 programmable interrupt controller programmable interrupt controller 8259 microcontroller datasheet programmable interrupt controller 8259 XC4000E Contextual Info: M8259 Programmable Interrupt Controller January 12, 1998 Product Specification AllianceCORE Facts Virtual IP Group, Inc. 1094 E. Duane Ave., Suite 211 Sunnyvale, CA 94086 USA Phone: +1 408-733-3344 Fax: +1 408-733-9922 E-mail: sales@virtualipgroup.com URL:	Original	M8259 intel 8259 with pinout diagram 8259 Programmable Interrupt Controller pdf file application of 8259 microcontroller "Programmable Interrupt Controller" 8259 Programmable Interrupt Controller intel 8259 programmable interrupt controller programmable interrupt controller 8259 microcontroller datasheet programmable interrupt controller 8259 XC4000E	PDF
P26SD Abstract: QFP-44 VMX1016-QAC14 i2c interfacing with 8051 asm code j1708 to RS232 converter 11110011B Contextual Info: VMX1016 VERSA MIX Datasheet Rev 1.0 VMX1016: MIXED-SIGNAL, FULLY INTEGRATED MICROCONTROLLER WITH DSP Datasheet Rev 1.0 1 1134 Ste-Catherine St. W, Suite 900, Montreal, Quebec, Canada H3B 1H4 Tel: 514 871-2447 http://www.goalsemi.com VMX1016 VERSA MIX	Original	VMX1016 VMX1016: P26SD QFP-44 VMX1016-QAC14 i2c interfacing with 8051 asm code j1708 to RS232 converter 11110011B	PDF
digital FIR Filter VHDL code Abstract: verilog code for interpolation filter code iir filter in vhdl verilog code for decimation filter digital FIR Filter verilog code application circuit for FIR filter matlaB design FIR filter matlaB design FIR Filter verilog code 00D8 EP3C16F484C6 Contextual Info: FIR Compiler II MegaCore Function User Guide FIR Compiler II MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-01072-2.0 Document last updated for Altera Complete Design Suite version: Document publication date: 10.0 July 2010	Original	UG-01072-2 digital FIR Filter VHDL code verilog code for interpolation filter code iir filter in vhdl verilog code for decimation filter digital FIR Filter verilog code application circuit for FIR filter matlaB design FIR filter matlaB design FIR Filter verilog code 00D8 EP3C16F484C6	PDF
cx2056 Contextual Info: Broadband Access – Client Side DSL Solutions Integrated VDSL2 Gateway Chipsets CX96xxx - VDSL2 Chipset Family Conexant’s portfolio includes a comprehensive suite of semiconductor solutions for broadband communications and the digital home. The CX96xxx chipset family enables next-generation, wireless VDSL2	Original	CX96xxx PBR-201091 cx2056	PDF
altera marking Code Formats Cyclone 2 Abstract: verilog code for spi4.2 to fifo vhdl 4-bit binary calculator cyclone FPGA 144 EP3C40F780C6 EP4SGX230DF29C3ES EP4SGX70 PM3388 EP3SE50F780 OIF-SPI4-02 Contextual Info: POS-PHY Level 4 MegaCore Function User Guide POS-PHY Level 4 MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-IPPOSPHY4-10.0 Document last updated for Altera Complete Design Suite version: Document publication date: 10.0	Original	UG-IPPOSPHY4-10 altera marking Code Formats Cyclone 2 verilog code for spi4.2 to fifo vhdl 4-bit binary calculator cyclone FPGA 144 EP3C40F780C6 EP4SGX230DF29C3ES EP4SGX70 PM3388 EP3SE50F780 OIF-SPI4-02	PDF
Controller Abstract: AR1000 SERIES AR1010 AR1020 C Code ar1020 ic ar1010 BLOCK DIAGRAM OF 4 wire resistive TOUCH screen BLOCK DIAGRAM OF TOUCH sensor display technology AR1000 AR1010-I/SS Contextual Info: AR1000 Series Resistive Touch Screen Controller DS41393A Contact Information Microchip Technology, Inc. mTouch Touchscreen Controller Products 9055 N. 51st Street, Suite H Brown Deer, WI 53223 www.Microchip.com Phone: 414-355-4675 Fax: 414-355-4775 Information contained in this publication regarding device	Original	AR1000 DS41393A DS41393A-Page Controller AR1000 SERIES AR1010 AR1020 C Code ar1020 ic ar1010 BLOCK DIAGRAM OF 4 wire resistive TOUCH screen BLOCK DIAGRAM OF TOUCH sensor display technology AR1010-I/SS	PDF

SUITE SLAVE Search Results

SUITE SLAVE Result Highlights (5)

SUITE SLAVE Datasheets Context Search

edge-detection sharpening verilog code

Bluetooth working principle

microSD slot

lwIP

6 WAY HEADER JTAG PORT

2C35

TVL320AIC33

TVL320AIC3106

5AGXFB3H4F35C5

pc keyboard ic

VMS747

H948

intel 8259 with pinout diagram

P26SD

digital FIR Filter VHDL code

cx2056

altera marking Code Formats Cyclone 2

Controller