STR F 6553 Search Results

DI024

Abstract: C166 DOR25
Contextual Info: Softwaremanual CPU- und Modultreiber für CPU8051 und CPU167 Version 1.0 Ausgabe Juni 1998 PHYTEC Elektronik GmbH • August-Bebel-Str. 29 • D-07973 Greiz Telefon: +49 03661 62 79-0 • Telefax: +49(03661)62 79-48 WWW: http://www.phytec.de • E-Mail: info@phytec.de

Contextual Info: 8 ^1 7 2 4 TEXAS Q 0 fi2S fll IN STR 7 • H I M L IN /IN T F C T - 7S -M S -0 S MQE SN75150 DUAL LINE DRIVER J> D951, JANUARY 1971 —REVISED MAY 1990 D, JG, OR P PACKAGE Satisfies Requirement of EIA Standard RS-232-C (TOP VIEW) Withstands Sustained Output Short-Circuit

Contextual Info: TPS5210 PROGRAMMABLE SYNCHRONOUS-BUCK REGULATOR CONTROLLER SLVS171 - SEPTEMBER 1998 ±1% Reference over Full Operating Temperature Range Synchronous Rectifier Driver for Greater than 90% Efficiency Programmable Output Voltage Range of 1.3 V to 3.5 V User-Selectable Hysteretic Type Control

y6we

Contextual Info: SN74LVC1G98ĆEP CONFIGURABLE MULTIPLEĆFUNCTION GATE SCES462B − JUNE 2003 − REVISED FEBRUARY 2005 D Controlled Baseline D D D D D D − One Assembly/Test Site, One Fabrication Site Enhanced Diminishing Manufacturing Sources DMS Support Enhanced Product-Change Notification

6N140A

Contextual Info: TEXAS INSTR OPTO Wt fl^blTSb GD7b32G T • T i l t 3SE D p i f I 6N140A FO U R -C H A N N EL O PTO C O U PLER /O P TO IS O LATO R i l - D 3622, JA N U A R Y 1991

PJ 976 lv

Abstract: DS90UH926Q
Contextual Info: J / l T exas * In stru m en ts DS90UH927Q 5M Hz - 85M Hz 24-bit C olor FPD -Link III S erializer w ith HDCP General Description Features The DS90UH927Q serializer, in conjunction with a DS90UH928Q or DS90UH926Q deserializer, provides a so­ lution for secure distribution of content-protected digital video

TLV411XA

Abstract: TLV41111
Contextual Info: TLV4110, TLV4111, TLV4112, TLV4113 FAMILY OF HIGH OUTPUT DRIVE OPERATIONAL AMPLIFIERS WITH SHUTDOWN SLOS289 - DECEMBER 1999 • Rail-To-Rail Output • Wide Bandwidth TLV4112 D, DGN, OR P PACKAGE TOP VIEW - 1.5 V/(as Slew Rate 10U TŒ 1 IN -Œ Specified for:

75558

Abstract: D2999 SN75557
Contextual Info: SN65557, SN65558, SN75557, SN75558 ELECTROLUMINESCENT ROW DRIVERS D2999, DECEMBER 1985-REVISED OCTOBER 1989 SN 65557, SN 75S57 . . . FN PACKAGE • Each Device Drives 32 Electrodes • High-Voltage Open-Collector N-P-N Outputs Using Ramped Supply • TOP VIEW

Contextual Info: SN74AVC16244 16-BIT BUFFER/DRIVER WITH 3-STATE OUTPUTS SCES141D - JULY 1 9 9 8 - REVISED SEPTEMBER 1998 Member of the Texas Instruments Widebus Family EPIC™ Enhanced-Performance Implanted CMOS Submicron Process Dynamic Drive Capability Is Equivalent to

C4094

Abstract: CD54HC4094 CD54HC4094F3A CD74HC4094 CD74HC4094E CD74HC4094M CD74HC4094M96 CD74HCT4094
Contextual Info: [ /Title CD74H C4094, CD74H CT4094 /Subject (High Speed CMOS Logic 8- CD54HC4094, CD74HC4094, CD74HCT4094 Data sheet acquired from Harris Semiconductor SCHS211C November 1997 - Revised May 2003 High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State

C4094

Abstract: CD54HC4094 CD54HC4094F3A CD74HC4094 CD74HC4094E CD74HC4094M CD74HC4094MT CD74HCT4094 74*4094
Contextual Info: [ /Title CD74H C4094, CD74H CT4094 /Subject (High Speed CMOS Logic 8- CD54HC4094, CD74HC4094, CD74HCT4094 Data sheet acquired from Harris Semiconductor SCHS211D November 1997 - Revised October 2003 High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State

tlc5411

Contextual Info: TLC540I, TLC541I 8-BIT ANALOG-TO-DIGITAL CONVERTERS WITH SERIAL CONTROL AND 11 INPUTS SLAS065A - OCTOBER 1983 - REVISED MARCH 1995 • 8-Bit Resolution A/D Converter • Microprocessor Peripheral or Stand-Alone Operation • On-Chip 12-Channel Analog Multiplexer

lh4a

Contextual Info: 74ACT11157 QUADRUPLE 2-LINE TO 1-LINE DATA SELECTOR/MULTIPLEXER SCAS180 - D3908, SEPTEMBER 1991 - REVISED APRIL 1993 ' Inputs Are TTL-Voltage Compatible DW OR N PACKAGE TOP VIEW * Flow-Through Architecture Optimizes PCB Layout a /b [ 1 1Y[ 2 2Y [ 3 g n d [ 4

TL494C pin diagram

Abstract: L494C TL494 circuit testing system TL494 TL494 push-pull for Push-Pull TL494 TL494I Pulse-Width-Modulation Control Circuit TL494C D2535
Contextual Info: TL494 PULSE-WIDTH-MODULATION CONTROL CIRCUIT _ D2535, JANUARY 1983-REVISED SEPTEMBER 1991 • Complete PWM Power Control Circuitry • Uncommitted Outputs for 200-mA Sink or T L 494C , T L 494I . . . d Source Current error AMP1 •

Contextual Info: [ /Title CD74H C4094, CD74H CT4094 /Subject (High Speed CMOS Logic 8- CD54HC4094, CD74HC4094, CD74HCT4094 Data sheet acquired from Harris Semiconductor SCHS211D November 1997 - Revised October 2003 High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State

Contextual Info: [ /Title CD74H C4094, CD74H CT4094 /Subject (High Speed CMOS Logic 8- CD54HC4094, CD74HC4094, CD74HCT4094 Data sheet acquired from Harris Semiconductor SCHS211D November 1997 - Revised October 2003 High-Speed CMOS Logic 8-Stage Shift and Store Bus Register, Three-State

Contextual Info: 54AC11030, 74AC11030 8-INPUT POSITIVE-NAND GATES D2957, JUNE 1987 - REVISED APRIL 1993 Flow-Through Architecture Optimizes PCB Layout 54AC11030. . . J PACKAGE 74AC11030 . . . D OR N PACKAGE TOP VIEW Center-Pin Vcc and QND Configurations Minimize High-Speed Switching Noise

Contextual Info: CDC305 OCTAL DIVIDE-BY-2 CIRCUIT/CLOCK DRIVER SCAS326 - JUNE 1990 - REVISED MARCH 1994 Replaces SN74AS305 Maximum Output Skew of 1 ns Maximum Pulse Skew of 1 ns TTL-Compatible Inputs and Outputs Center-Pin Vqc and GND Configurations Minimize High-Speed Switching Noise

mcr 6 13

Abstract: id82c50 736T
Contextual Info: 82C50A HARRIS S E M I C O N D U C T O R CMOS Asynchronous Communications Element March 1997 Description Features Single Chip UART/BRG DC to 625K Baud DC to 10MHz Clock Crystal or External Clock Input On Chip Baud Rate Generator 1 to 65535 Divisor Generates 16X Clock

Contextual Info: SN74CBT3253 DUAL 4-BIT TO 1-BIT FET MULTIPLEXER/DEMULTIPLEXER I S C D S 0 1 8 - M AY 1995 D, DB, O R PW P A C K A G E TO P V IEW • Functionally Equivalent to QS3253 • 5 -Q Switch Connection Between Two Ports Ü E T I 1 U 16 1 V C C 15 ] OE2 S1 [ 2 14 ] S O

TRANSISTOR PNP B1443

Abstract: B1565 transistor B1274 transistor 13001 s 6d B1273 transistor B0615 DIODE Transistor B1203 transistor b1274 transistor b1134 transistor B1204
Contextual Info: Version 1.7 Produced in June 1998 Sharp Programmable Controller New Satellite JW20H Programming Manual * Ladder instruction version 04000 F — 44 O I F — 08 1 O C T 100 09000 0000 09000 F — 00 X F E R □ F — 05 D M P X F — 63 IN C 09000 09000 09000

Contextual Info: CXK77B1810AGB -5/6 High Speed Bi-CMOS Synchronous Static RAM Description The CXK77B1810AGB-5/6 is a high speed 1M bit Bi-CMOS synchronous static RAM organized as 65536 words by 18 bits. This SRAM integrates input registers, high speed SRAM and write buffer onto a

Contextual Info: SN74CBTD3861 10-BIT FET BUS SWITCH WITH LEVEL SHIFTING S C D S 084-JU LY 1998 5-0 Switch Connection Between Two Ports DBQ, DGV, DW, OR PW PACKAGE TOP VIEW TTL-Compatible Input Levels Designed to Be Used in Level-Shifting Applications NC [ 1 U A1[ 2 24 ] V CC

Contextual Info: SN54ALVTH16240, SN74ALVTH16240 2.5-V/3.3-V 16-BIT BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SCES138A - JULY 1998 - REVISED JANUARY 1999 • State-of-the-Art Advanced BiCMOS Technology ABT Widebus Design for 2.5-V and 3.3-V Operation and Low Static Power Dissipation