ST ZD 52 Search Results

Contextual Info: <s> CO i\i 53-53 "sT in CO m LD 45=52 V <*3 47.42±0.1 3.7 MIN 43.815) o Q (0=635) PI TCH « d BSÏ ÿ^ JJU Ç _ m u ffi m m S 7 Ei . m r-ir.1 'fih : ~ r u p ~ :zd 1 " b L|- [ . (0.27) [ [join: n : ^ j | f D “ : z iD p i^ z ir - r 3 ^ \ ~ v .

cnz916

Abstract: 5242C LX5241CDB LX5241CPW LX5241CTF LX5242CDB LX5242CPW LX5242CTF zd 4.1
Contextual Info: LIN Doc #: UltraWMUr LX5241/5242 M ultimode T H I n f i n i t e P o w e r I n n o v a t i o n o f 52 4 1 SCSI P r e l i m i n a r y DESCRIPTION T erm inator D ata S h e e t KEY FEATURES T h e L X 5 2 4 1 /4 2 is a m u ltim o d e SCSI term in ato r is tied to th e D IFFSE N SE in p u t o f th e c o rre ­

das2

Abstract: ATIC 39 b4 18.432M YAMAHA 64 sdip
Contextual Info: YAMAHA L S I Preliminary 1995.12. 8 YSS241 DPLD2 Dolby Pro Logic Decoder 2 • OUTLINE The Y SS241 D PLD 2 is a Dolby Pro logic decoder LSI, offering high-quality sound processing by all digital sound processing. In addition, because digital delay m em ory and all other functions for Dolby Pro

ZD-98 F

Contextual Info: LIN Doc #; 5241 UltraMAX M T H I n f i n i t e P o w e r o f I n n o v a t i o n L X 5 2 4 1 /5 2 4 2 ultimode SCSI P r e l i m i n a r y D ata DESCRIPTION T he LX5241/42 is a m ultim ode SCSI terminator that conform s to the SCSI Parallel Interconnect2 SPI-2 specification d eveloped by the T 10

Contextual Info: Z9104 Variable Delay Motherboard Clock Buffer Preliminary PRODUCT FEA TURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ Output phase relationship is precisely controllable with respect to input clock via a dedicated external feedback path. 6 Low Skew Clocks Generated

Contextual Info: f i l i Z9104 IH rJli v H I H « • '* i i s f isa W Variable Delay Motherboard Clock Buffer Preliminary PRODUCT FEA TURES • ■ ■ ■ ■ ■ ■ ■ ■ ■ Output phase relationship is precisely controllable with respect to input clock via a dedicated external feedback path.

Contextual Info: Z9102 Variable Delay Motherboard Clock Buffer Approved Product PRODUCT FEA TURES • ■ ■ ■ ■ ■ ■ ■ ■ Output phase relationship is precisely controllable with respect to input clock via a dedicated external feedback path. 6 Low Skew Clocks Generated

Contextual Info: MM! Z9102 mñMi Variable Delay Motherboard Clock Buffer Approved Product PRODUCT FEA TURES • ■ ■ ■ ■ ■ ■ ■ ■ Output phase relationship is precisely controllable with respect to input clock via a dedicated external feedback path. 6 Low Skew Clocks Generated

Contextual Info: Z9102 Fï Variable Delay Motherboard Clock Buffer Approved Product PRODUCT FEA TURES • ■ ■ ■ ■ ■ ■ ■ ■ Output phase relationship is precisely controllable with respect to input clock via a dedicated external feedback path. 6 Low Skew Clocks Generated

GR-253-CORE

Contextual Info: Datasheet Multi-Rate 10 Gbps 48 km XFP Transceivers XFP-10GD-IR04P Features XFP transceiver Data Rates: 9.95 - 11.1 Gbps Protocols: - 10 Gbps Ethernet - 10 Gbps Fibre Channel - OC-192/STM-64 Single-mode fiber 1550 nm 8 to 52 km Duplex LC connector Digital Diagnostics (SFF-8472)

MOLEX 5275

Contextual Info: Ì b3 NOTES © ri i ') 1„ m rn f\ | 1<) LS ) 1 f 1 / ) MAT ER IAL MS-, U L 9 4 V - 0 t r jV 'j'j : l c p HOUSING:LCP(LIQUID (0.5) TER MI NA L :C OP PE R CR Y ST A L POLYM ER ),GLA SS C t = 0 . 1 5) A L L O Y ( t =0 . 15) •^4 J L =10 # Ct = 0 „ 1 5 )

Contextual Info: Lattice ;Semiconductor I Corporation ispLSI 5256V In-System Programmable 3.3V SuperWIDE High Density PLD — Productivity Enhancing Timing Analyzer, Explore Tools, Timing Simulator and ispANALYZER™ — PC and UNIX Platforms Features SuperWIDE™ HIGH-DENSITY IN-SYSTEM

fm 4213 ic

Contextual Info: MX66X4000 •W A Extra Low Power/Voltage 512k x 8 CMOS SRAM FEATURES DESCRIPTION The MX66X4000 is a high performance, extra low power CMOS Static Random Access Memory organized as 524,288 words by 8 bits and operates from a very low range of supply voltage.

Contextual Info: HD64180S-Network Processing Unit NPU The HD64180S network processing unit (NPU) contains a 2-channel high-speed, multifunction serial in terface, 8-bit CPU , 2-channel d irect memory access controller (DMAC) with a chained block transfer function, timers, etc., all integrated

TPA0102

Abstract: TPA0102PWP TPA4860 TPA4861 17E4
Contextual Info: TPA0102 STEREO 1.5-W AUDIO POWER AMPLIFIER -_ _ • High Power with PC Power Supply - 1.5 W/Ch at 5 V - 600 mW/Ch at 3 V • Ultra-Low Distortion < 0.05% THD+N at 1.5 W and 4-£2 Load • Bridge-Tied Load BTL or Single Ended

Contextual Info: KM49C512LL CMOS DRAM 5 1 2 K x 9 Bit CMOS Dynamic RAM with Fast Page Mode FEATURES GENERAL DESCRIPTION • Performance range: The Samsung KM49C512LL is a CMOS high speed 524,288 b it x 9 Dynamic Random Access Memory. Its design is optimized for high performance applications

PG-DSO-20-32

Abstract: BTS4130QGA GPS05094 SO20 ST01 Q100-012 Q101-006
Contextual Info: D a t a S h e e t , R e v. 1 . 0 , M ar c h 2 00 8 B TS 41 30 Q G A S m a rt H i g h - S i d e P o w e r S w i t c h A u to m o t i v e P o w e r BTS 4130QGA 1 Overview 3 2 Block Diagram 5 3 3.1 3.2 3.3 Pin Configuration 6 Pin Assignment 6 Pin Definitions and Functions 6

mb88625b

Abstract: MB88625B-PF MBM27C256A-25CZ D64001S-3C P Channel Equivalent to buz 350 MBM27C256A-25CV MB88625B-PSH pa2al MB886 GD03
Contextual Info: FUJITSU LTD S3E D m 3 7 4 cì75fc. GD03131 bOQ * F C A J cP June 1992 E m h n 1 -° T _ DATA SHEET = = = - FUJITSU / F2MCB-4L FAMILY MB88620B SERIES SINGLE CHIP MICROCONTROLLER WITH ADC AND VFD DRIVER DESCRIPTION The Fujitsu MB88620B Seríes is a member of the F2M C -4L Family, and features a 26

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA 16K x 16 Bit Cache Tag RAM for PowerPC Processors The MPC27T416 is a 262,144 bit cache-tag static RAM designed to support PowerPC microprocessors at bus speeds up to 66 MHz. It is organized as 16K words of 16 bits each. There are 14 common I/O tag bits and 2 separate I/O

Contextual Info: PRELIMINARY IDT77V400 SWITCHStAR ATM CELL BASED 8 X 8 NON-BLOCKING SINGLE CHIP SWITCHING MEMORY In teg ra ted D e v i l e T e c h n o lo g y , l i e . FEATURES • Configurable cell lengths of 52, 53, 54, 55, or 56 bytes can be independently chosen for Input and Output ports

ES981

Abstract: WAVETABLE
Contextual Info: ESS Technology, Inc. ES690 Wavetable Music Synthesizer Product Brief DESCRIPTION FEATURES The ES690 is a single, highly integrated, high-performance, and economical wavetable music synthesizer for personal computers, delivering superior acoustic sound comparable to expensive

urst 1336

Contextual Info: A CM8888-3 CM8888-1/3 CALIFORNIA MICRO DEVICES CMOS 3 Volt DTMF Transceiver Features • 3 to 5.25 volt operating range • Advanced CMOS technology for low power consumption and increased noise immunity • Complete DTMF transmitter/receiver • Standard 8051, 8086/8 microprocessor port

DP-64S

Abstract: FP-80B HD81901 HD81901CPS2 HD81901FS2 HD81901PS2 V27bis D2738 d2144
Contextual Info: HD81901 -Single Chip Modem Supporting V.27ter/bis and V.26/bis Description The HD81901 is a single chip CMOS LSI modem based on the CCITT V.27ter/bis and V.26/bis stan­ dards. It can be used in the All Japan Bank network protocol, in the JCA protocol, and in JUST-PC, PC,

ADR21

Abstract: MC16S2CPU20B1
Contextual Info: _. . Order this document by MC68HC16S2TS/D MOTOROLA SEMICONDUCTOR TECHNICAL DATA MC68HC16S2 Technical Summary 16-Bit Modular Microcontroller 1 Introduction The MC68HC16S2 is a high-speed 16-bit microcontroller. It is a member of the MC68300/68HC16 family.