SSTUA32 Search Results

DDR2-667

Abstract: SSTUA32864 SSTUA32866 SSTUA32S865 TFBGA160
Contextual Info: SSTUA32S865 1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-667 RDIMM applications Rev. 02 — 16 March 2007 Product data sheet 1. General description The SSTUA32S865 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank by four 2R x 4 and similar high-density Double Data Rate 2 (DDR2) memory

DDR2 DIMM 240 pinout

Abstract: DDR2-667 Q11A Q13A SSTUA32864 SSTUA32864EC 96-ball
Contextual Info: SSTUA32864 1.8 V configurable registered buffer for DDR2-667 RDIMM applications Rev. 01 — 12 May 2005 Product data sheet 1. General description The SSTUA32864 is a 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer designed for 1.7 V to 2.0 V VDD operation.

DDR2-667

Abstract: Q11A SSTUA32866 SSTUA32866EC
Contextual Info: SSTUA32866 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications Rev. 01 — 15 July 2005 Product data sheet 1. General description The SSTUA32866 is a 1.8 V configurable register specifically designed for use on DDR2

Contextual Info: Search Entire Site Contact IDT | Investors | Press Document Search | Package Search | Parametric Search | Cross Reference Search | Green & RoHS | Calculators | Thermal Data | Reliability & Quality | Military Home > Products > PLL and Registers > RDIMM > DDR2 > DDR2 Register > SSTUA32864B > SSTUA32864BHMLF

DDR2-667

Abstract: Q11A SSTUA32866 SSTUA32866EC
Contextual Info: SSTUA32866 1.8 V 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer with parity for DDR2-667 RDIMM applications Rev. 02 — 26 March 2007 Product data sheet 1. General description The SSTUA32866 is a 1.8 V configurable register specifically designed for use on DDR2

Contextual Info: Search Entire Site Contact IDT | Investors | Press Document Search | Package Search | Parametric Search | Cross Reference Search | Green & RoHS | Calculators | Thermal Data | Reliability & Quality | Military Home > Products > > SSTUA32S865A > SSTUA32S865AHLF

DDR2-667

Abstract: Q11A Q13A SSTUA32864 SSTUA32864EC
Contextual Info: SSTUA32864 1.8 V configurable registered buffer for DDR2-667 RDIMM applications Rev. 02 — 9 March 2007 Product data sheet 1. General description The SSTUA32864 is a 25-bit 1 : 1 or 14-bit 1 : 2 configurable registered buffer designed for 1.7 V to 2.0 V VDD operation.

Contextual Info: SSTUA32S865 1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-667 RDIMM applications Rev. 02 — 16 March 2007 Product data sheet 1. General description The SSTUA32S865 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank by four 2R x 4 and similar high-density Double Data Rate 2 (DDR2) memory

BKG160

Contextual Info: Search Entire Site Contact IDT | Investors | Press Document Search | Package Search | Parametric Search | Cross Reference Search | Green & RoHS | Calculators | Thermal Data | Reliability & Quality | Military Home > Products > > SSTUA32S865A > SSTUA32S865AHLFT

K5 diode smd

Abstract: DDR2-667 SSTUA32864 SSTUA32866 SSTUA32S865 TFBGA160
Contextual Info: SSTUA32S865 1.8 V 28-bit 1 : 2 registered buffer with parity for DDR2-667 RDIMM applications Rev. 01 — 25 May 2005 Product data sheet 1. General description The SSTUA32S865 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank by four 2R x 4 and similar high-density Double Data Rate 2 (DDR2) memory

SSTUA32864

Abstract: SSTUA32866
Contextual Info: SSTUG32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-1G RDIMM applications Rev. 01 — 23 April 2007 Product data sheet 1. General description The SSTUG32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank

DDR2-800

Abstract: SSTUA32864 SSTUA32866 E6G3
Contextual Info: SSTUM32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications Rev. 02 — 2 March 2007 Product data sheet 1. General description The SSTUM32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank

CSPUA877

Abstract: 2506036017Y0 CSPUA877A CUA877 IDTCSPUA877A
Contextual Info: IDTCSPUA877A 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER COMMERCIAL TEMPERATURE RANGE 1.8V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER IDTCSPUA877A DESCRIPTION: FEATURES: The CSPUA877A is a PLL based clock driver that acts as a zero delay buffer

DDR2-400

Abstract: DDR2-533 DDR2-667 EBE20RE4ABFA EBE20RE4ABFA-4A-E EBE20RE4ABFA-5C-E EBE20RE4ABFA-6E-E CS 3820
Contextual Info: PRELIMINARY DATA SHEET 2GB Registered DDR2 SDRAM DIMM EBE20RE4ABFA 256M words x 72 bits, 1 Rank Specifications Features • Density: 2GB • Organization  256M words × 72 bits, 1 rank • Mounting 18 pieces of 1G bits DDR2 SDRAM sealed in FBGA • Package: 240-pin socket type dual in line memory

ICS98ULPA877A

Abstract: 2506036017Y0 MO-205 410mH
Contextual Info: ICS98ULPA877A Advance Information Integrated Circuit Systems, Inc. 1.8V Low-Power Wide-Range Frequency Clock Driver Recommended Application: • DDR2 Memory Modules / Zero Delay Board Fan Out • Provides complete DDR DIMM logic solution with ICSSSTU32864/SSTUF32864/SSTUF32866/

E0901E20

Abstract: EBE41AE4ABHA DDR2-667
Contextual Info: DATA SHEET 4GB Registered DDR2 SDRAM DIMM EBE41AE4ABHA 512M words x 72 bits, 2 Ranks Specifications Features • Density: 4GB • Organization  512M words × 72 bits, 2 ranks • Mounting 36 pieces of 1G bits DDR2 SDRAM with sFBGA • Package: 240-pin socket type dual in line memory

DDR2-667

Abstract: EBE21RD4AEFA EDE5104AESK-6E-E
Contextual Info: DATA SHEET 2GB Registered DDR2 SDRAM DIMM EBE21RD4AEFA-6 256M words x 72 bits, 2 Ranks Features The EBE21RD4AEFA is a 256M words × 72 bits, 2 ranks DDR2 SDRAM Module, mounting 36 pieces of 512M bits DDR2 SDRAM sealed in FBGA package. Read and write operations are performed at the cross

Contextual Info: SSTUB32868 1.8 V 28-bit 1 : 2 configurable registered buffer with parity for DDR2-800 RDIMM applications Rev. 04 — 22 April 2010 Product data sheet 1. General description The SSTUB32868 is a 1.8 V 28-bit 1 : 2 register specifically designed for use on two rank

Contextual Info: IDTCSPUA877A 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER COMMERCIAL TEMPERATURE RANGE 1.8V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER IDTCSPUA877A FEATURES: DESCRIPTION: • 1 to 10 differential clock distribution • Optimized for clock distribution in DDR2 Double Data Rate

CSPUA877

Contextual Info: IDTCSPUA877 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER COMMERCIAL TEMPERATURE RANGE 1.8V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER IDTCSPUA877 FEATURES: DESCRIPTION: • 1 to 10 differential clock distribution • Optimized for clock distribution in DDR2 Double Data Rate

VFQFPN 28

Contextual Info: IDTCSPUA877A 1.8V PLL DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER COMMERCIAL TEMPERATURE RANGE 1.8V PHASE LOCKED LOOP DIFFERENTIAL 1:10 SDRAM CLOCK DRIVER IDTCSPUA877A DESCRIPTION: FEATURES: The CSPUA877A is a PLL based clock driver that acts as a zero delay buffer

Contextual Info: DATA SHEET 2GB Registered DDR2 SDRAM DIMM EBE21RD4AEFA-6 256M words x 72 bits, 2 Ranks Description Features The EBE21RD4AEFA is a 256M words × 72 bits, 2 ranks DDR2 SDRAM Module, mounting 36 pieces of 512M bits DDR2 SDRAM sealed in FBGA (µBGA) package. Read and write operations are performed at

schematic diagram atx Power supply 500w

Abstract: pioneer PAL 012A 1000w inverter PURE SINE WAVE schematic diagram 600va numeric ups circuit diagrams winbond bios 25064 TLE 9180 infineon smsc MEC 1300 nu TBE schematic diagram inverter 2000w DK55 circuit diagram of luminous 600va UPS
Contextual Info: QUICK INDEX NEW IN THIS ISSUE! Detailed Index - See Pages 3-24 Digital Signal Processors, iCoupler , iMEMS® and iSensor . . . . . 805, 2707, 2768-2769 Connectors, Cable Assemblies, IC Sockets . . . . . . . . . . . 28-568 RF Connectors . . . . . . . . . . . . . . . . . . . . . . Pages 454-455

DDR2-667

Abstract: EBE41AE4ABHA
Contextual Info: PRELIMINARY DATA SHEET 4GB Registered DDR2 SDRAM DIMM EBE41AE4ABHA 512M words x 72 bits, 2 Ranks Specifications Features • Density: 4GB • Organization  512M words × 72 bits, 2 ranks • Mounting 36 pieces of 1G bits DDR2 SDRAM with sFBGA • Package: 240-pin socket type dual in line memory