Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    sstl-135 Datasheets

    Top Results (6)

    Part ECAD Model Manufacturer Description Download Buy
    74SSTV16857PAG Renesas Electronics Corporation 14-Bit Registered Buffer with SSTL I/O Visit Renesas Electronics Corporation
    74SSTV16857PAG8 Renesas Electronics Corporation 14-Bit Registered Buffer with SSTL I/O Visit Renesas Electronics Corporation
    74SSTVF16857PAG Renesas Electronics Corporation 14-Bit Registered Buffer with SSTL I/O Visit Renesas Electronics Corporation
    74SSTVF16857PAG8 Renesas Electronics Corporation 14-Bit Registered Buffer with SSTL I/O Visit Renesas Electronics Corporation
    74SSTVF16859PAG Renesas Electronics Corporation 13-Bit to 26-Bit Registered Buffer with SSTL I/O Visit Renesas Electronics Corporation
    74SSTVN16859PAG8 Renesas Electronics Corporation 13-Bit to 26-Bit Registered Buffer with SSTL I/O Visit Renesas Electronics Corporation

    sstl-135 Datasheets Context Search

    Catalog Datasheet MFG & Type PDF Document Tags

    M2SSK1-101

    Abstract: C3SS1-10B-20 MP1-11r MPMT3-11R CL-520Y MEPY1-1024 ML1-100W MCB-20 KA2-2223 KA2-2221
    Text: Kiertämällä Vetämällä Hätäseispainike-kaluste CE3T-10R-20 CE4T-10R-20 23 135 22 23 135 38 Tyyppi CE3T-10R-02 CE3P-10R-02 CE4T-10R-02 23 135 24 23 135 28 23 135 40 23 135 44 Tyyppi CE3T-10R-11 CE3P-10R-11 CE4T-10R-11 CE4P-10R-11 SSTL 1S+1A 23 135 36 Tyyppi SSTL 2A 23 135 20 SSTL 2S CE3T-10R-01 SSTL 1A Tyyppi CE4T-10R-01 23 135 26 23 135 30 23 135 42 23 135 46 CE4P-10R-02 Hätäseispainikkeet, avainvapautus


    Original     		PDF 1SFC150001B1801 A003248 SK615502-B SK615516-1 SK615546-13 SK615546-5 M2SSK1-101 C3SS1-10B-20 MP1-11r MPMT3-11R CL-520Y MEPY1-1024 ML1-100W MCB-20 KA2-2223 KA2-2221

    HSUL-12

    Abstract: SSTL-12 SSTL-125 SSTL-135 SSTL12
    Text: €” LVPECL Video graphics and clock distribution — SSTL-15 DDR3 SDRAM JESD79-3D SSTL-135 , SDRAM — Differential SSTL-15 DDR3 SDRAM JESD79-3D Differential SSTL-135 DDR3L SDRAM , -15 VCCPD 1.5 2.5 0.75 SSTL-135 VCCPD 1.35 2.5 0.675 SSTL-125 VCCPD 1.25 , Differential SSTL-15 VCCPD 1.5 2.5 — Differential SSTL-135 VCCPD 1.35 2.5 â , as SSTL-12, SSTL-15, SSTL-125, SSTL-135 , and HSUL-12. High-Speed Differential I/O with DPA Support


    Original     		PDF SV51006 HSUL-12 SSTL-12 SSTL-125 SSTL-135 SSTL12

    2003 - JESD22

    Abstract: JESD78 PC3200 PCKV857 SSTVF16857 TSSOP-48 ci 2003 ci2003
    Text: UNIT 2.3 2.5 2.7 V 2.3 2.5 2.7 V 1.15 PC1600-PC2700 1.25 1.35 V VREF Reference voltage (VREF = 0.5 x VDDQ) 1.25 1.30 1.35 V VTT Termination , VCC = 2.7 V; VI = 2.7 V or 0 V VREF = 1.15 V or 1.35 V VREF = 1.15 V or 1.35 V µA µ µA µ , RESET = VCC - 10 25 mA VI = VREF ± 310 mV, VCC = 2.5 V VREF = 1.15 V or 1.35 V 2.5 2.9 3.4 CLK, CLK VICR = 1.25 V, VI(PP) = 360 mV, VCC = 2.5 V VREF = 1.15 V or 1.35


    Original     		PDF SSTVF16857 PC1600-PC3200 14-bit 14-bit PC1600/PC2100 PC3200 JESD22 JESD78 PCKV857 SSTVF16857 TSSOP-48 ci 2003 ci2003

    2010 - HSUL-12

    Abstract: jesd79-3d lpddr2 lpddr2 datasheet SSTL-12 SSTL-135 DDR3U Datasheet LPDDR2 SDRAM DDR3L SSTL135
    Text: -15 Class I and II DDR3 SDRAM SSTL-15 DDR3 SDRAM SSTL-135 DDR3L SDRAM SSTL-125 DDR3U , interfaces Differential SSTL-15 DDR3 SDRAM Differential SSTL-135 DDR3L SDRAM Differential SSTL , (3) 1.5 2.5 0.75 0.75 SSTL-15 JESD79-3D (3) 1.5 2.5 0.75 (4) SSTL-135 , SSTL-135 - (3) 1.35 2.5 - (4) Differential SSTL-125 - (3) 1.25 2.5 , -12, SSTL-15, SSTL-125, SSTL-135 , and HSUL-12. High-Speed Differential I/O with DPA Support Stratix V


    Original     		PDF

    1997 - SSTL16837

    Abstract: JC-16-97-58 JC-16-97-04 IBIS Models
    Text: CL = 30 pF VCC = VDDQ = 2.7 V VREF = 1.35 V TA = 70°C VIL = 1.17 V VIH = 1.53 V CL = 30 pF , 2.7 V 1.8 V VREF 1.5 V 1.35 V 0.9 V VTT 1.5 V 1.35 V 0.9 V VIH 1.68 V , 1.35 V TA = 70°C VIL = 1.17 V VIH = 1.53 V VCC = VDDQ = 1.8 V VREF = 0.9 V TA = 70°C VIL =


    Original     		PDF SCBA014 SSTL16837, SSTL16837 JC-16-97-58 JC-16-97-04 IBIS Models

    Not Available

    Abstract: No abstract text available
    Text: / 1.5V/ 1.8V supply voltage, POD_12, SSTL_ 135 , SSTL_15 or SSTL_18 signaling and CMOS select input , ÎÎ DDR3/DDR4 Memory Bus System ÎÎ POD_12, SSTL_12, SSTL_ 135 , SSTL_15 or SSTL_18 Îà , (measured in respect to GND) + 1.35 Typ. Max. +85 °C +2.0 1.8 Unit V Static , Current Conditions Min. 1.35 Typ. Max. Unit 1.5 / 1.8 2 V EN= HIGH; VDD =1.8V


    Original     		PDF PI2DDR3212 2133Mbps, 14-bit 2133Mbps PI2DDR3212 14-bit MO-220 52-Pin, PD-2102

    2000 - SSTV16857

    Abstract: SW00424
    Text: TYP 2.5 2.5 1.25 VREF MAX 2.7 2.7 1.35 VREF + 40 mV VCC UNIT V V V V V V V V V mA mA °C Tamb , 2.7 V; VI = 2.7 V or 0 V 15 V or 1 35 V VREF = 1 1.15 1.35 VREF = 1 1.15 15 V or 1 1.35 35 V VREF = 1.15 V or 1.35 V 0.97 360 0.01 0.01 0.05 0.05 0.05 12 10 ±5 ±5 ±5 ±5 ±5 25 mA 25 VCC ­ 0.2 1.95 1.95


    Original     		PDF SSTV16857 14-bit ICL03 SSTV16857 JESD22. SW00424

    2001 - SSTV16857

    Abstract: A114 JESD22 JESD78 PCKV857 SSTL16877 TSSOP-48
    Text: 1.25 1.35 VTT Termination voltage VREF ­ 40 mV VREF VREF + 40 mV V VI Input , 35 V 1.15 1.35 VREF = 1 15 V or 1 35 V 1.15 1.35 V V µA µA VREF ICC VCC = 2.7 V VREF = 1.15 V or 1.35 V - 0.05 ±5 µA Quiescent supply current CLK and CLK in opposite


    Original     		PDF SSTV16857 14-bit ICL03 JESD22. SSTV16857 A114 JESD22 JESD78 PCKV857 SSTL16877 TSSOP-48

    2001 - SSTV16857

    Abstract: No abstract text available
    Text: (VREF = 0.5 × VDDQ) 1.15 1.25 1.35 VTT Termination voltage VREF ­ 40 mV VREF , 2.7 V ; VI = 1.7 V or 0.8 V VCC = 2.7 V ; VI = 2.7 V or 0 V VREF = 1 15 V or 1 35 V 1.15 1.35 VREF = 1 15 V or 1 35 V 1.15 1.35 VREF = 1.15 V or 1.35 V 1.53 0.01 ±5 0.01 ±5 0.05


    Original     		PDF SSTV16856 14-bit ICL03--PC SSTV16857

    2008 - 10600R

    Abstract: No abstract text available
    Text: 43 42 125 126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 162 Pin Buffer Function , Par_In EVENT NC 48, 49, PWR 120 , 240 236 168 53 68 187 I O I O - 79, 126, 135 , 144, 153, 162, 167 , DDR31333G 8-8-8 -13G Min. 12.0 12.0 12.0 48.0 Max. 20.0 - - - DDR31333H 9-9-9 -13H Min. 13.5 13.5 13.5 , 120 121 122 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 Description , 31 33 48 0x xx 85 51 Label Code JEDEC SPD Revision Byte# 127 128 129 130 131 132 133 134 135 136


    Original     		PDF IMSH4GP12A1F2C IMSH8GP22A1F2C 240-Pin IMSH4GP12A1F2C, IMSH8GP22A1F2C 10600R

    1999 - Altera Quartus II v.1.0

    Abstract: JESD8-8 advanced graphics port JESD87 Altera Quartus II v.11.0 AGP"Advanced Graphics Port"
    Text: VCCIO V GTL+ I/ODC VTT 1.35 1.5 1.65 V VREF 0.88 1.0 , 2.3 2.5 2.7 V VREF - 0.04 VREF VREF + 0.04 V 1.15 1.25 1.35 V VREF , VREF VREF + 0.04 V 1.15 1.25 I OL = 15.2 mA 1.35 V VREF + 0.18 VCCIO + 0.3 , 1.65 V 0 < V IN < V CCIO VOH Low II 1.35 I/O 3.0 VCCIO


    Original     		PDF 7000BI/O 7000B 20KEMAX I/O622 08MbpsMega -AN-117-01/J 7000ices Altera Quartus II v.1.0 JESD8-8 advanced graphics port JESD87 Altera Quartus II v.11.0 AGP"Advanced Graphics Port"

    2001 - SSTV16857

    Abstract: No abstract text available
    Text: 1.35 VREF + 40 mV VCC - VREF ­ 350 mV VDDQ + 0.5 V VREF ­ 180 mV ­20 20 70 UNIT V V V V V V V V V mA , 15 V or 1 35 V VREF = 1 1.15 1.35 VREF = 1 1.15 15 V or 1 1.35 35 V VREF = 1.15 V or 1.35 V RESET =


    Original     		PDF SSTV16857 14-bit ICL03 SSTV16857 JESD22.

    2001 - SSTV16857

    Abstract: 0.5 mm pitch TSSOP SSTV16857DGG A114 JESD22 JESD78 PCKV857 SSTL16877 TSSOP-48
    Text: 1.25 1.35 VTT Termination voltage VREF ­ 40 mV VREF VREF + 40 mV V V VI , VCC = 2.7 V; VI = 2.7 V or 0 V VREF = 1 15 V or 1 35 V 1.15 1.35 VREF = 1 15 V or 1 35 V 1.15 1.35 µA µA VREF ICC VCC = 2.7 V VREF = 1.15 V or 1.35 V - 0.05 ±5 µA


    Original     		PDF SSTV16857 14-bit ICL03 JESD22. SSTV16857 0.5 mm pitch TSSOP SSTV16857DGG A114 JESD22 JESD78 PCKV857 SSTL16877 TSSOP-48

    2001 - SSTV16857

    Abstract: No abstract text available
    Text: VREF + 180 mV VSS ­ 0.5 V - - 0 TYP 2.5 2.5 1.25 VREF - - - - - - - - MAX 2.7 2.7 1.35 VREF + , V VREF = 1 1.15 1.35 VREF = 1 1.15 15 V or 1 1.35 35 V VREF = 1.15 V or 1.35 V RESET = GND RESET =


    Original     		PDF SSTV16857 14-bit ICL03 SSTV16857 JESD22.

    2008 - 92-100-B

    Abstract: No abstract text available
    Text: 137 135 154 152 171 169 188 186 11 28 46 63 136 153 170 187 202 200 197 201 CMOS Serial Address , RESERVED 1.875 1.5 2.5 1.875 Max. 20.0 - - - DDR3-1333H 9-9-9 -13H Min. 13.5 13.5 13.5 49.5 5, 6, 7 , 119 120 121 122 125 126 127 128 129 130 131 132 133 134 135 Description Minimum Four Activate , Label Code JEDEC SPD Revision Byte# 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 , 85 51 JEDEC SPD Revision Byte# 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143


    Original     		PDF IMSH1GS14A1F1C IMSH1GS03A1F1C IMSH2GS13A1F1C 204-Pin IMSH2GS13A1F1CT16H. 92-100-B

    1999 - A115-A

    Abstract: C101 SN74SSTL16857
    Text: VREF V 1.35 V VREF+40 mV VCC V VREF+350 mV V VREF­350 mV VREF+180 mV , 1.35 VREF = 1 15 V or 1 35 V 1.15 1.35 Data inputs RESET ±5 ±5 ±5 ±1 ±1 ±1 36V 3.6 , VCC = 3.3 V, TA = 25°C. mA ±1 3.6 V VREF = 1 15 V or 1 35 V 1.15 1.35 µA ±5 2.7 , 35 V 1.15 1.35 V 1.95 2.3 23V VREF = 1 15 V or 1 35 V 1.15 1.35 UNIT VCC


    Original     		PDF SN74SSTL16857 14-BIT SCAS625C 000-V A114-A) A115-A) A115-A C101 SN74SSTL16857

    TZX 214 transistor

    Abstract: 7480 full adder 1 bit MAX4967 EP1S60 SSTL-18
    Text: ­65 150 °C 135 °C Table 4­2. Stratix Device Recommended Operating Conditions (Part 1 of , Maximum Unit VTT Termination voltage 1.35 1.5 1.65 V VREF Reference voltage , Termination voltage VREF Reference voltage 1.35 V VIH(DC) High-level DC input voltage , Reference voltage 1.15 1.25 1.35 V VIH(DC) High-level DC input voltage VREF + 0.18 , voltage 2.05 3.3 3.6 V VTT/VREF Termination and input reference voltage 1.35 1.5


    Original     		PDF S51004-3 TZX 214 transistor 7480 full adder 1 bit MAX4967 EP1S60 SSTL-18

    Not Available

    Abstract: No abstract text available
    Text: PI2DDR3212 1.35V/ 1.5V/1.8V 14 bit 2:1 DDR3/DDR4 Switch Features Description ÎÎ bit 2:1 switch that supports DDR3 800 2133Mbps, DDR4 14 This 14-bit DDR3/DDR4 switch is designed for 1.35V/ 1.5V/ 1.8V supply voltage, POD_12, SSTL_ 135 , SSTL_15 or SSTL_18 signaling and CMOS select input , ÎÎ DDR3/DDR4 Memory Bus System ÎÎ POD_12, SSTL_12, SSTL_ 135 , SSTL_15 or SSTL_18 Îà , Current Conditions Min. Typ. Max. Unit 1.35 / 2 1.5 / 1.8 V EN= HIGH; VDD =1.8V


    Original     		PDF PI2DDR3212 2133Mbps, 14-bit 2133Mbps PI2DDR3212 14-bit MO-220 52-Pin, PD-2102 PI2DDR3212ZLE

    2008 - IMSH1GS14A1F1C-08E

    Abstract: PC3-10600S
    Text: 137 135 154 152 171 169 188 186 11 28 46 63 136 153 170 187 202 200 197 201 CMOS Serial Address , 12.0 48.0 Max. 20.0 - - - DDR31333H 9-9-9 -13H Min. 13.5 13.5 13.5 49.5 Max. 20.0 - - - DDR3 , 119 120 121 122 125 126 127 128 129 130 131 132 133 134 135 Description Minimum Four Activate , Label Code JEDEC SPD Revision Byte# 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 , 85 51 JEDEC SPD Revision Byte# 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143


    Original     		PDF IMSH1GS14A1F1C IMSH1GS03A1F1C IMSH2GS13A1F1C 204-Pin IMSH2GS13A1F1CT16H IMSH1GS14A1F1C-08E PC3-10600S

    3a bus termination regulator psop

    Abstract: VFB11 20PF CM8500 CM8500IS CM8500IT PT16 CM85001
    Text: 1.15 1.18 V VCCQ = 2.5V 1.22 1.25 1.28 V VCCQ = 2.7V 1.32 1.35 1.38 , VCCQ = 2.7V 1.28 1.35 1.42 V VCCQ = 2.3V 1.139 1.15 1.162 V VCCQ = 2.5V 1.238 1.25 1.263 V VCCQ = 2.7V 1.337 1.35 1.364 V K 690 KHz VIN/2 = , 2.5 2.7 V VREF Input Reference Voltage 1.15 1.25 1.35 V VTT Termination


    Original     		PDF CM8500 CM8500 3a bus termination regulator psop VFB11 20PF CM8500IS CM8500IT PT16 CM85001

    2005 - Not Available

    Abstract: No abstract text available
    Text: 1.28 V VCCQ = 2.7V 1.32 1.35 1.38 IOUT = VCCQ = 2.3V 1.09 1.15 1.21 V ±3A, VCCQ = 2.5V 1.19 1.25 1.31 V VCCQ = 2.7V 1.28 1.35 1.42 V , 1.337 1.35 1.364 V KΩ 690 KHz VIN/2 = open Note 2 VL Output Voltage, SSTL , Termination Voltage TYP MAX UNITS N/A 2.5 V 2.7 V 1.15 1.25 1.35 V VREF -


    Original     		PDF CM8500A CM8500A

    2008 - DDR3 timing parameters

    Abstract: No abstract text available
    Text: Select Bus [1:0] Data Mask Signals [7:0] Data Strobe Signals [7:0] 12 10 29 27 47 45 64 62 137 135 154 , 12.0 48.0 Max. 20.0 - - - DDR31333H 9-9-9 -13H Min. 13.5 13.5 13.5 49.5 Max. 20.0 - - - DDR3 , 122 125 126 127 128 129 130 131 132 133 134 135 Description Minimum Four Activate Window Delay Time , Label Code JEDEC SPD Revision Byte# 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 , 85 51 JEDEC SPD Revision Byte# 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143


    Original     		PDF IMSH1GS14A1F1C IMSH1GS03A1F1C IMSH2GS13A1F1C 204-Pin DDR3 timing parameters

    2008 - IMSH4GP12A1F1C

    Abstract: No abstract text available
    Text: 84 94 93 103 102 112 111 43 42 125 126 134 135 143 144 152 153 203 204 212 213 221 222 230 231 161 , 79, 126, 135 , 144, 153, 162, 167, 198, 204, 213, 222, 231, 1) The EDA (Electronic Design , 12.0 12.0 48.0 Max. 20.0 - - - DDR31333H 9-9-9 -13H Min. 13.5 13.5 13.5 49.5 Max. 20.0 - - - DDR3 , 117 118 119 120 121 122 125 126 127 128 129 130 131 132 133 134 135 136 137 138 Description Reserved , 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 175 176 255


    Original     		PDF H1GP03A1F1C 240-Pin H1GP03A1F1C, IMSH4GP12A1F1C

    2001 - SSTV16857

    Abstract: q11 hbm SSTV16857DGG A114 JESD22 JESD78 PCKV857 SSTL16877
    Text: 2.7 V VREF Reference voltage (VREF = 0.5 x VDDQ) 1.15 1.25 1.35 VTT , ; VI = 1.7 V or 0.8 V VCC = 2.7 V; VI = 2.7 V or 0 V VREF = 1 15 V or 1 35 V 1.15 1.35 VREF = 1 15 V or 1 35 V 1.15 1.35 V V µA µA VREF ICC VCC = 2.7 V VREF = 1.15 V or 1.35 V


    Original     		PDF SSTV16857 14-bit ICL03 JESD22. SSTV16857 q11 hbm SSTV16857DGG A114 JESD22 JESD78 PCKV857 SSTL16877

    1999 - SN74SSTL32877

    Abstract: No abstract text available
    Text: ­40mV 0 VREF+350mV VREF­350mV 1.25 VREF NOM MAX 2.7 2.7 1.35 VREF+40mV VCC UNIT V V V V V V V V V V V V mV , 0 VI = 1.7 V or 0.8V VI = 2.7 V or 0 VREF = 1.15 V or 1.35 V VI = 1.7 V or 0.8 V VI = 2.7 V or 0 VI , V 2.3 V 2.3 V to 2.7 V 2.3 V VREF = 1.15 V or 1.35 V 2.7 V VREF = 1.15 V or 1.35 V MIN TYP MAX ­ 1.2


    Original     		PDF SN74SSTL32877 26-BIT SCES241A
    ...

    Privacy Policy | Digital Services Act | Contact Us | About Us

    Copyright © 2023.

    Supplyframe Tracking Pixel