SPI PHY Search Results

JTAG MODULE SPI

Abstract: spi flash parallel port TSOP 28 SPI memory Package flash 88P8341
Contextual Info: SPI EXCHANGE SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors

IDT88P8344

Abstract: 88P8344
Contextual Info: SPI EXCHANGE 4 x SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors

TSX 07 software

Abstract: DPRAM Quad SPI MPC860 ORSPI4-2FE1036C SPI-324P-O4-N1 OIF-SPI4-02
Contextual Info: Quad SPI-3 to SPI-4 PHY Layer Bridge Core April 2004 IP Data Sheet Features – Configurable through the MicroProcessor Interface MPI ORCA 4 System Bus – Programmable parity type on SPI-3 bus • Complete Quad SPI-3 to SPI-4 PHY Layer Bridge Solution Based on the ORCA

TSOP 48 thermal resistance type1

Abstract: IDT88P8342 drw22
Contextual Info: SPI EXCHANGE 2 x SPI-3 TO SPI-4 Issue 1.0 FEATURES • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation - Maskable interrupts for fatal errors

Contextual Info: PRODUCT BRIEF IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4 - Number of errors - Number of bytes FEATURES • • • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation

spi FIFO

Abstract: IDT88P8344 DSC-6370
Contextual Info: PRODUCT BRIEF IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4 - Number of errors - Number of bytes FEATURES • • • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation

spi on parallel port

Abstract: IDT88P8342
Contextual Info: PRODUCT BRIEF IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4 - Number of errors - Number of bytes FEATURES • • • Functionality - Low speed to high speed SPI exchange device - Logical port LP mapping (SPI-3 <-> SPI-4) tables per direction - Per LP configurable memory allocation

Tresos

Abstract: UM0565 SPI105 automotive ecu manual SPC563M SPI156 SPI DRIVER autosar autosar can driver
Contextual Info: UM0565 User manual SPC563M SPI driver Introduction This user manual describes the AUTOSAR serial peripheral interface SPI driver. AUTOSAR SPI driver configuration parameters and deviations from the specification are described in SPI driver chapter. AUTOSAR SPI driver requirements and APIs are described

Contextual Info: ispLever CORE TM Quad SPI-3 to SPI-4 Link Layer Bridge Core User’s Guide October 2005 ipug29_02.0 Quad SPI-3 to SPI-4 Link Layer Bridge Core User’s Guide Lattice Semiconductor Introduction Lattice’s Quad SPI-3 System Packet Interface Level 3 to SPI-4 (System Packet Interface Level 4) Bridge is an IP

lps 256

Contextual Info: PRODUCT BRIEF IDT88P8341 SPI EXCHANGE SPI-3 TO SPI-4 To request the full IDT88P8341 datasheet, please contact your local IDT Sales Representative or call 1-800-345-7015, you may also email SPI@idt.com FEATURES • • • Functionality - Low speed to high speed SPI exchange device

0123F POWER SUPPLY

Abstract: 0880E 0830B mcu 08300 0080D 0847f fcbg AA23 AC25 IDT7172604
Contextual Info: IDT88K8483 SPI-4 Exchange Document Issue 1.0 Description Features Functionality – Multiplexes logical ports LPs from SPI-4A and SPI-4B to SPI4M – Optionally converts between interleaved packet transfers and whole packet transfers per logical port – Data redirection per LP between SPI-4A, SPI-4B and 10G

spi demux

Abstract: fujitsu lvds standard DDR PHY ASIC OC192 SPI4 SPI-4PS
Contextual Info: System Packet Interface Level-4P2 OIF Compliant SPI-4P2 IO macro and core logic IP for SPI-4PS and NPSI Link Device Rx-Link Tx-Link SPI-4 Core Logic data receive SPI-4 IO data receiver LVDS receiver deskew 1:4 Parallel-Serial SPI-4 Core Logic (data transmit)

Contextual Info: PRODUCT BRIEF IDT88P8344 SPI EXCHANGE 4 x SPI-3 TO SPI-4 To request the full IDT88P8344 datasheet, please contact your local IDT Sales Representative or call 1-800-345-7015, you may also email SPI@idt.com FEATURES • • • Functionality - Low speed to high speed SPI exchange device

Contextual Info: PRODUCT BRIEF IDT88P8342 SPI EXCHANGE 2 x SPI-3 TO SPI-4 To request the full IDT88P8342 datasheet, please contact your local IDT Sales Representative or call 1-800-345-7015, you may also email SPI@idt.com FEATURES • • • Functionality - Low speed to high speed SPI exchange device

AN1149

Abstract: NDS352P PIC18F14K50 PIC18F2321 PIC18F2331 USB-232
Contextual Info: USB-SPI TM Driver-free USB to synchronous serial SPI slave interface Mechanical Specifications Summary USB-SPI is a single chip USB to synchronous serial SPI slave interface. It greatly simplifies the connection of personal computer to a microcontroller capable of

Contextual Info: SS8219 Ultra320 Multi-mode LVD/SE SCSI Terminator Features General Description Auto-selectable multi-mode single-ended or LVD termination Meets SCSI-1, SCSI-2, SCSI-3 SPI Ultra Fast-20 , Ultra 2 (SPI-2 LVD), Ultra160 (SPI-3 LVD) and Ultra320 (SPI-4 LVD) standards

Contextual Info: Dual Laminated 0.025” TPO MQT UL Style: 21057 UL Voltage: 150V UL Temp: 90ºC Ultra 320 Compliant to SPI-4 Full 40mm Flat Section for Connector and Terminator Stranded Construction for Flexibility Balanced Impedance within Pair and across Pair Applications: SPI-4, SPI-3, SPI-2, Internal

cheetah

Abstract: Leopard Logic WIN32
Contextual Info: Cheetah SPI Host Adapter Features • SPI Master • Full Duplex SPI at 40 MHz • Unsupported Overclocking up to 50 MHz • All Modes Supported • High-Speed USB Device 480 Mbps transfer to host PC • Actual Host Data Throughput Nearly 100% of SPI Clock Rate

vhdl code for spi

Abstract: vhdl code for spi xilinx OC192 OC48 XAPP525 verilog code for spi4.2 to fifo spi 4.2 master code verilog code for 16 bit ram SPI Verilog HDL vhdl code for DCM
Contextual Info: Application Note: Virtex-II Series R SPI-4.2 to Quad SPI-3 Bridge XAPP525 v2.0 October 15, 2004 Summary This application note describes a reference design used to bridge one 4-channel Xilinx SPI-4.2 (PL4) core (v6.1) to four 1-channel SPI-3 (PL3) Link Layer cores (v3.2). The design is

DPRAM

Abstract: MPC860 SPI-324L-O4-N1
Contextual Info: Quad SPI-3 to SPI-4 Link Layer Bridge Core April 2004 IP Data Sheet Features – Standard 10Gbps physical to Link Layer interface – Support for “static” and “dynamic” alignment at the receive interface – Single-link and multi-link operation – SPI-4.2 transmit data protocol support logic

AN10369

Abstract: UART Program Examples ARM pcf8574 c code ARM LPC Microcontroller Family LDR Datasheet pcf8574 Application Note PCF8574A tera term LPC2000 LPC2106
Contextual Info: AN10369 UART/SPI/I2C code examples Rev. 01 — 06 April 2005 Application note Document information Info Content Keywords UART, SPI, I2C Abstract 2 Simple code examples are provided for UART0, SPI and I C. AN10369 Philips Semiconductors Philips ARM LPC microcontroller family

National smd sop 4 pin

Abstract: SPI MICROWIRE communication controller spi lm74 How to read marking code of smd IC
Contextual Info: LM74 LM74 SPI/ MICROWIRE 12-Bit Plus Sign Temperature Sensor Literature Number: SNIS107J LM74 SPI/MICROWIRE 12-Bit Plus Sign Temperature Sensor General Description Features The LM74 is a temperature sensor, Delta-Sigma analog-todigital converter with an SPI and MICROWIRE compatible

lm95071

Contextual Info: LM95071 LM95071 SPI/MICROWIRE 13-Bit Plus Sign Temperature Sensor Literature Number: SNIS137B LM95071 SPI/MICROWIRE 13-Bit Plus Sign Temperature Sensor General Description Features The LM95071 is a low-power, high-resolution digital temperature sensor with an SPI and MICROWIRE compatible

vhdl spi bus

Abstract: SPI Verilog HDL 16 bit register vhdl
Contextual Info: Nios SPI January 2003, Version 2.1 General Description Data Sheet The Nios serial peripheral interface SPI module is an Altera® SOPC Builder library component included in the Nios development kit. The SPI module is a simple, industry standard communications interface