SOC 2152 Search Results

H8005

Abstract: rca 3868 4558 lowpass filter CIRCUIT DIAGRAM 4558 lowpass filter 4634 h8022 100L LQFP100 LQFP-100 XE8802
Contextual Info: XE8802 Sensing Machine Data Acquisition MCU with ZoomingADC and LCD driver XE8802 Sensing Machine Data Acquisition SoC with 16+10 bit ZoomingADC™ Embedded RISC controller and LCD driver General Description The XE8802 includes a high resolution acquisition

sprug83

Contextual Info: OMAPL137-HT www.ti.com SPRS677B – FEBRUARY 2012 – REVISED FEBRUARY 2013 Low-Power Applications Processor Check for Samples: OMAPL137-HT 1 Low-Power Applications Processor 1.1 Features 12345 • Highlights – Dual Core SoC • 300-MHz ARM926EJ-S RISC MPU

stn 9014 c 521

Abstract: 8080 display driver omapl137-ht AXR111 ARMv5TE
Contextual Info: OMAPL137-HT www.ti.com SPRS677B – FEBRUARY 2012 – REVISED FEBRUARY 2013 Low-Power Applications Processor Check for Samples: OMAPL137-HT 1 Low-Power Applications Processor 1.1 Features 12345 • Highlights – Dual Core SoC • 300-MHz ARM926EJ-S RISC MPU

alarm sonar 560 r

Contextual Info: OMAPL137-HT www.ti.com SPRS677B – FEBRUARY 2012 – REVISED FEBRUARY 2013 Low-Power Applications Processor Check for Samples: OMAPL137-HT 1 Low-Power Applications Processor 1.1 Features 12345 • Highlights – Dual Core SoC • 300-MHz ARM926EJ-S RISC MPU

Contextual Info: ec N o ew m m D e es n ig de ns d fo r XE8802 Sensing Machine Data Acquisition MCU with ZoomingADC and LCD driver XE8802 Sensing Machine Data Acquisition SoC with 16+10 bit ZoomingADC™ Embedded RISC controller and LCD driver General Description R The XE8802 includes a high resolution acquisition

asus motherboard circuit diagram

Abstract: SuperSpeed USB 3.0 to Serial ATA Bridge P1263 intel MOTHERBOARD SERVICE MANUAL
Contextual Info: Intel Atom Processor E3800 Product Family Datasheet October 2013 Revision 1.0 Reference Number: 538136 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS

oa31 diode

Abstract: oa211 diode KT 839 250kHz-10MHz 8-669 VIA Apollo Design Guide KT 829 KT 829 b schematic diagram display samsung SOC 2152
Contextual Info: Introduction 1 Table of Contents 1.1 Library Description . 1-1 1.2 Features . 1-2

Contextual Info: Revision 13 IGLOOe Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology

Contextual Info: Revision 12 IGLOOe Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology

RT3PE3000L CQ256

Abstract: CG484 RT3PE3000L LG484 CCGA CCGA 472 CCGA 472 mechanical drawing RT3PE600L IO30PDB1V1 IO283PDB7V1
Contextual Info: Revision 5 Radiation-Tolerant ProASIC3 Low Power Spaceflight Flash FPGAs with Flash*Freeze Technology Features and Benefits MIL-STD-883 Class B Qualified Packaging • Ceramic Column Grid Array with Six Sigma Copper-Wrapped Lead-Tin Columns • Land Grid Array

RT3PE3000L CQ256

Abstract: RT3PE3000L CQ256 RT3PE600L IO30PDB1V1 IO283PDB7V1 actel package mechanical drawing
Contextual Info: Revision 4 Radiation-Tolerant ProASIC3 Low Power Spaceflight Flash FPGAs with Flash*Freeze Technology Features and Benefits MIL-STD-883 Class B Qualified Packaging • Ceramic Column Grid Array with Six Sigma Copper-Wrapped Lead-Tin Columns • Land Grid Array

Contextual Info: Revision 5 Radiation-Tolerant ProASIC3 Low Power Spaceflight Flash FPGAs with Flash*Freeze Technology Features and Benefits MIL-STD-883 Class B Qualified Packaging • Ceramic Column Grid Array with Six Sigma Copper-Wrapped Lead-Tin Columns • Land Grid Array

Contextual Info: Revision 23 IGLOO Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

Contextual Info: Revision 24 IGLOO Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

Contextual Info: Revision 2 Extended Temperature Fusion Family of Mixed Signal FPGAs Features and Benefits • Extended Temperature Tested • Each Device Tested from –55°C to 100°C Junction Temperature High-Performance Reprogrammable Flash Technology • • • • Advanced 130-nm, 7-Layer Metal, Flash-Based CMOS Process

actel core 8051

Contextual Info: Revision 4 Fusion Family of Mixed Signal FPGAs Features and Benefits In-System Programming ISP and Security • ISP with 128-Bit AES via JTAG • FlashLock Designed to Protect FPGA Contents High-Performance Reprogrammable Flash Technology • • • •

Contextual Info: Revision 22 IGLOO Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation 5 µW Power Consumption in Flash*Freeze Mode

a51 ZENER DIODE

Abstract: transistor 2n2222 bipolar ROM EQUIVALENCES TRANSISTOR LIST ProASIC3 lvds yl 1060
Contextual Info: Revision 3 Fusion Family of Mixed Signal FPGAs Features and Benefits In-System Programming ISP and Security • ISP with 128-Bit AES via JTAG • FlashLock Designed to Protect FPGA Contents High-Performance Reprogrammable Flash Technology • • • •

Contextual Info: Revision 13 ProASIC3L Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • Dramatic Reduction in Dynamic and Static Power Savings • 1.2 V to 1.5 V Core and I/O Voltage Support for Low Power • Low Power Consumption in Flash*Freeze Mode Allows for

Contextual Info: Revision 6 Fusion Family of Mixed Signal FPGAs Features and Benefits In-System Programming ISP and Security • ISP with 128-Bit AES via JTAG • FlashLock Designed to Protect FPGA Contents High-Performance Reprogrammable Flash Technology • Advanced 130-nm, 7-Layer Metal, Flash-Based CMOS

Contextual Info: Revision 5 Fusion Family of Mixed Signal FPGAs Features and Benefits In-System Programming ISP and Security • ISP with 128-Bit AES via JTAG • FlashLock Designed to Protect FPGA Contents High-Performance Reprogrammable Flash Technology • • • •

Contextual Info: Revision 9 IGLOOe Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology

Contextual Info: Revision 11 IGLOOe Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology

8323

Contextual Info: Revision 10 IGLOOe Low Power Flash FPGAs with Flash*Freeze Technology Features and Benefits Low Power • • • • 1.2 V to 1.5 V Core Voltage Support for Low Power Supports Single-Voltage System Operation Low-Power Active FPGA Operation Flash*Freeze Technology