S7-200 CPU 212 Search Results

PolySwitch SMD 185F

Abstract: NANOSMDM020F MINISMDC125 transistor smd marking S7c nanoSMDM050F 185f hydrocarbon polymeric led smd 5050 miniSMDC020 MINISMDC125-2
Contextual Info: Surface-mount PolySwitch Surface-mount Resettable Devices More than ten years ago, Raychem Circuit Protection introduced the SMD product family, and polymeric PTC devices quickly became the computer industry standard for keyboard, mouse, and disk drive protection.

80c86 intel

Abstract: 8405201Qa hm6616 ss 6616 I80C86-2 80c86-2 intel MD80C86 hm-6616 ic smd code AD9 Intel 80c86
Contextual Info: 80C86 TM CMOS 16-Bit Microprocessor March 1997 Features Description • Compatible with NMOS 8086 • Completely Static CMOS Design - DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5MHz 80C86 - DC . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8MHz (80C86-2)

XD 5252 F

Abstract: LM 4863 D 46460 TMS 2708 JL Dynamic Memory Refresh Controller
Contextual Info: YU h«s:* hl ' M / A l ) i"3T INTEGRATED ECOOO PROCESSOR USER'S MANUAL jg *m " * M . .1 , ^ 4 •# - M O T O R O L A O rtJe r tin s d o c u m e n t by M C 6 B 3 0 6 U M A D /A D MOTOROLA M ic r o p r o c e s s o r a n d M em o ry T e c h n o lo g ie s G ro u p

Contextual Info: MSP430C32x, MSP430P325A MIXED SIGNAL MICROCONTROLLER SLAS219B − MARCH 1999 − REVISED MARCH 2000 D Low Supply Voltage Range, 2.5 V − 5.5 V D Low Operation Current, 400 mA at 1 MHz, D Integrated 12+2 Bit A/D Converter D Family Members Include: 3V D Ultra-Low Power Consumption Standby

sab80188

Abstract: SAB 8086 80188 siemens EM 235 cn
Contextual Info: 47E » • SIEMENS B235b05 GG313b4 T « S I E G SIEMENS AKTIENGESELLSCHAF High-lntegration SAB 80188/80188-1 8-Bit Microprocessor Preliminary SAB 80188 8 MHz • Integrated feature set - enhanced SAB 8088-2 CPU - clock generator - 2 independent high-speed DMAchannels

73k222u

Abstract: v21 modem 8250A uart 39JD 73D2180
Contextual Info: SSI 73D2180 Bell 212A/103, CCITT V.22, V.21 Modem Device Set ¿ iu c M M k m s ' A TDK Group/Company November 1991 DESCRIPTION FEATURES The SSI 73D2180 consists of two CMOS integrated circuits which provide the data pump functions and command interpretation required to construct a high

73K222U

Abstract: design HF modem
Contextual Info: McmMbttí SSI 73D2180 Bell 212A/103, CCITT V.22, V.21 Modem Device Set July, 1989 DESCRIPTION FEATURES The SSI 73 D2180 consists of two CMOS integrated cir­ cuits which provide the data pump functions and command interpretation required to construct a high

Contextual Info: OKI Semiconductor MSC2121A FEDL2121A-03 Issue Date: Jul. 16, 2002 14.4 kbps Full Duplex Modem Chip Set With Built-in Protocols GENERAL DESCRIPTION The MSC2121A is a modem chip-set that provides full duplex data transmission capability of up to 14400 bits/s conforming to ITU-T Recommendation V.32 bis, V.22 bis, V.22, and V.21 and Bell

780326GC

Abstract: 78F0338GC
Contextual Info: User’s Manual µPD780318, 780328, 780338 Subseries 8-Bit Single-Chip Microcontrollers µPD780316 µPD780318 µPD780326 µPD780328 µPD780336 µPD780338 µPD78F0338 Document No. U14701EJ2V0UD00 2nd edition Date Published March 2002 N CP(K) Printed in Japan

IDT39C60

Abstract: 1002B 74FCT245 AN-24 IDT49C460 IDT71256 IDT74FCT245 IDT74FCT646 1002d
Contextual Info: DESIGNING WITH THE IDT49C460 AND IDT39C60 ERROR DETECTION AND CORRECTION UNITS Integrated Device Technology, Inc. DESIGNING WITH THE IDT49C460 AND IDT39C60 ERROR DETECTION AND CORRECTION UNITS INTRODUCTION APPLICATION NOTE AN-24 APPLICATION NOTE AN-24 By Robert Stodieck

Contextual Info: T7100A X.25 Protocol Controller Features • 5-MHz clock max ■ Triple-channel DMA w ith standard interface ■ 250-kb/s serial data rate (max) ■ Program mable retransmission counter (N2) ■ 8-bit data bus ■ Password exchange mechanism fo r dial-up

DUAL ASYNCHRONOUS COMMUNICATIONS ELEMENT

Abstract: PR11
Contextual Info: i Data Sheet I AT&T T7100A X.25 Protocol Controller Features • 5-MHz clock max ■ Triple-channel DMA with standard interface ■ 250-kb/s serial data rate (max) ■ Programmable retransmission counter (N2) ■ 8-bit data bus ■ 16-bit address bus ■ Password exchange mechanism for dial-up

Contextual Info: Integrated Device Technology, Inc* Single, double-frequency clock input 16.67MHz, 20MHz, 25M Hz and 33MHz operation 16MIPS a t2 0M H z Low cost 84-pin PLCC packaging O n-chip 4-deep write buffer elim inates memory write stalls O n-chip 4-word read buffer supports burst o r sim ple block

2421 synchronous circuit

Abstract: IC tda 2151 str - z 2156
Contextual Info: S I L I CO N S Y S T EM S INC 4bE D • ÔSSB'îbS D0DS7ÔS T « S I L SSI 73D2420/2421 CCITT V.42/V.42bis Protocol and Controller IC Set w m s i i s k m s ' A TDK Group/Company Advance Information 1 - 7 5 ~3j ’-^ N o v e m b e r 1991 ~ DESCRIPTION FEATURES

t7231

Contextual Info: n o . Datasheet : .A T & T ? Microelectronics T7231 IEEE 802.3 LANPACER Controller Features Description • Supports IEEE 802.3 for 10BASE-5, 10BASE-2, and 10BASE-T The T7231 IEEE 802.3 LANPACER Controller is a high-performance controller that integrates an IEEE

2162

Abstract: HCD66712UA02 HD44780 HD66712 HD66712SA00FS HD66712SA01FS HD66712SA02FS HD66712U HD66712UA02TA0 HD66712UA03TA0
Contextual Info: To all our customers Information regarding change of names mentioned within this document, to Renesas Technology Corp. On April 1st 2003 the following semiconductor operations were transferred to Renesas Technology Corporation: operations covering microcomputer, logic,

SIS 661

Abstract: VM009 CA95C68 CA95C18 CA95C09 AM9518 AM9568 SDS S4 24V Z8000 nb11c
Contextual Info: NEWBRIDGE MICROSYSTEMS NEWBRIDGE MICROSYSTEMS =,4E D JANUARY 1993 • bSflfilOl DQOSQSS 35S ■ NBMC CA95C68/18/09 DES DATA CIPHERING PROCESSORS (DCP • Encrypts/Decrypts data using National Bureau of Standards Data Encryption Standard (DES) • High speed, pin and function compatible version

sn -1025

Abstract: TA-3080 NJU6676 NJU6676CL S100 S101 S102 S103 S104 S105
Contextual Info: NJU6676 64 コモンx コモン×132 セグメント＋ セグメント＋1 マーク用 マーク用コモン出力 コモン出力 ビットマップ LCD ドライバ • 概 要 NJU6676 は64 ｺﾓﾝ×132 ｾｸﾞﾒﾝﾄ＋1 ﾏｰｸ用ｺﾓﾝ出力ﾋﾞｯﾄ

Contextual Info: F28M35H52C, F28M35H22C F28M35M52C, F28M35M22C, F28M35M20B F28M35E20B www.ti.com SPRS742F – JUNE 2011 – REVISED APRIL 2013 Concerto Microcontrollers Check for Samples: F28M35H52C 1 F28M35x Concerto MCUs 1.1 Features • Master Subsystem — ARM Cortex™-M3

Contextual Info: PRELIMINARY a Enhanced Am486 Microprocessor Family Advanced Micro Devices DISTINCTIVE CHARACTERISTICS Complete 32-Bit Architecture • High-Performance Design — Improved cache structure supports industrystandard write-back cache — Frequent instructions execute in one clock

NJU6655

Abstract: Ka 2535 data sheet NJU6655CJ S130 C31-C0 S124
Contextual Info: NJU6655 暫定資料 64 コモンx コモン×160 セグメント＋ セグメント＋1 マーク用 マーク用コモン出力 コモン出力 ビットマップ LCD ドライバ ! 概 要 NJU6655 は64 コモン×160 セグメント＋1 マーク用

Contextual Info: F28M35H52C, F28M35H22C F28M35M52C, F28M35M22C, F28M35M20B F28M35E20B www.ti.com SPRS742G – JUNE 2011 – REVISED AUGUST 2013 Concerto Microcontrollers Check for Samples: F28M35H52C, F28M35H22C, F28M35M52C, F28M35M22C, F28M35M20B, F28M35E20B 1 F28M35x Concerto MCUs

78064Y

Abstract: PD78062 uPD78062Y uPD78063Y uPD78064 uPD78P0308Y
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD78062Y, 78063Y, 78064Y 8-BIT SINGLE-CHIP MICROCONTROLLER DESCRIPTION The µPD78062Y, 78063Y and 78064Y are the same as the µPD78062, 78063, and 78064 with I2C bus control functions added and are suitable for AV applications. They incorporate LCD controller/driver, 8-bit resolution A/D converter, timer,

Contextual Info: F28M36P63C, F28M36P53C F28M36H53C, F28M36H53B, F28M36H33C, F28M36H33B www.ti.com SPRS825B – OCTOBER 2012 – REVISED SEPTEMBER 2013 Concerto Microcontrollers Check for Samples: F28M36P63C, F28M36P53C, F28M36H53C, F28M36H53B, F28M36H33C, F28M36H33B 1 F28M36x Concerto MCUs