S40CTM Search Results

s40c

Abstract: CRC-32
Contextual Info: µ PD98409 ATM LIGHT SAR CONTROLLER NEASCOT-S40CTM Features • Conforms to the ATM-Forum recommendations • Implements PCI bus interface (5/3.3 V, 32-bit, 33 MHz): PCI Specification Revision 2.1 compliant • Implements AAL-5 SAR sublayer and ATM layer

AD30

Abstract: PD98409GN-LMU TSE2P IR50-207-3 IR502
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD98409 ATM LIGHT SAR CONTROLLER DESCRIPTION The µPD98409 NEASCOT-S40CTM is a high-performance SAR chip for segmentation and reassembly of ATM cells. Provided with a PCI (Peripheral Component Interconnect) bus interface control memory and supporting a

Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD98409 ATM LIGHT SAR CONTROLLER DESCRIPTION The µPD98409 NEASCOT-S40CTM is a high-performance SAR chip for segmentation and reassembly of ATM cells. Provided with a PCI (Peripheral Component Interconnect) bus interface control memory and supporting a

cd 1619 CP

Abstract: IC cd 1619 CP IR-35-203-1 IR50-207-3 AD30 PD98409GN-LMU 2565 eeprom
Contextual Info: データ・シート MOS集積回路 MOS Integrated Circuit µPD98409 ATM LIGHT SAR CONTROLLER µ チップで す。PCI（Peripheral Component Interconnect）バス・インタフェース，コントロール・メモリを内蔵，CPUの画像

AD27

Abstract: AD29 AD30 PD98409GN-LMU
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD98409 ATM LIGHT SAR CONTROLLER DESCRIPTION The µPD98409 NEASCOT-S40CTM is a high-performance SAR chip for segmentation and reassembly of ATM cells. Provided with a PCI (Peripheral Component Interconnect) bus interface control memory and supporting a

AD27

Abstract: AD29 AD30 PD98409GN-LMU
Contextual Info: DATA SHEET MOS INTEGRATED CIRCUIT µPD98409 ATM LIGHT SAR CONTROLLER DESCRIPTION The µPD98409 NEASCOT-S40CTM is a high-performance SAR chip for segmentation and reassembly of ATM cells. Provided with a PCI (Peripheral Component Interconnect) bus interface control memory and supporting a

MPEG-TS stream

Abstract: MPEG-TS CRC-10 PD98409GN-LMU
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