S A 8 . 0 Search Results

SN54AS808A

Abstract: 74ALS808
Contextual Info: TYPES SNS4ALS80B, SN54AS808A, SN74ALS808, SN74AS80BA HEX 2-INPUT AND DRIVERS D 2 6 6 1 , DECEMBER 1 9 8 2 - R E V IS E D DECEMBER 1 9 8 3 • S N 54 A L S 8 0 8 , S N 5 4 A S 8 0 8 A . . . J PACKAGE High Capacitive Drive Capability S N 74 A L S 8 0 8 , S N 7 4 A S 8 0 8 A . . . N PACKAGE

74AS871

Contextual Info: TEXAS INSTR LOGIC NOTICE SEE ORDER OF DATA FOR ERRATA ESE D • fiU17S3 QOflBTEE 1 ■ T-Vg-0?-0? S N 5 4 A LS 8 70 , SN 5 4AS 8 70 , S N 5 4 A LS 8 71, SN 5 4 A S 8 71 S N 74 A LS 8 70 , S N 74 A S 8 70 , S N 7 4 A L S 8 7 1 , S N 74 A S 8 71 INFORMATION

74als871

Abstract: 74AS870 74ALS870 74as871 2A3J
Contextual Info: SN54ALS870, SN54AS870, SN 5 4ALS 8 71, SN54AS871 S N 74 ALS 870, SN74AS870, S N 7 4 A L S 8 7 1 , SN 74AS 8 71 DUAL 16-BY-4 REGISTER FILES D 2 6 6 1 , DECEMBER 1 9 8 2 - REVISED M A Y 1 9 8 6 S N 5 4 A L S 8 7 0 , S N 5 4 A S 8 7 0 . . . J T PACKAGE S N 7 4 A L S 8 7 0 , S N 7 4 A S 8 7 0 . . . D W OR N T PACKAGE

74ALS180

Abstract: 74ALS1808 SN74AS1805
Contextual Info: SN54ALS1808A, SN54AS1808. SN74ALS1808A, SN74AS1808 HEX 2 INPUT AND DRIVERS AU G U S T 1 9 8 4 — REVISED M A Y 1986 S N 5 4 Â L S 18 0 8 A , S N 5 4 A S 1 8 0 8 . High Capacitive Drive Capability SN 74A LS 1808A, SN74AS1805 . . 'A L S 1 8 0 8 A Has Typical Delay Tim e of

Contextual Info: v is s a s ? QoeaM si S G S - T U O M S O N î[L[lCT ^ [M D©S b B D 6 7 5 /7 5 A /7 7 /7 7 A /7 9 /7 9 A /8 1 B D 6 7 6 /7 6 A /7 8 /7 8 A /8 0 /8 0 A /8 2 S G S-THOMSON 3DE » MEDIUM POWER DARLINGTONS DESCRIPTION The BD675, BD675A, BD677, BD677A, BD679,

74AS1804

Contextual Info: SN54ALS1804A, SN54AS1804, SN74ALS1804A, SN74AS1804 HEX 2-INPUT NAND DRIVERS A U G U S T 1 9 8 4 — R E V IS E D M A Y 1 9 8 6 • S N 5 4 A L S 1 8 0 4 A , S N 5 4 A S 1 8 0 4 . . . J P AC KA G E High Capacitive Drive Capability S N 7 4 A L S 1 8 0 4 A , S N 7 4 A S 1 8 0 4 , . . D W OR N P AC KA G E

ELSY

Abstract: MSM82C88-2RS
Contextual Info: OKI semiconductor MSM82C88-2 RS/GS /JS BUS CONTROLLER GENERAL DESCRIPTION T h e M S M 8 2 C 8 8 is a b u s c o n tr o lle r f o r th e M S M 8 0 C 8 6 a n d th e M S M 8 0 C 8 8 C P U s. B a sed o n s ilic o n g a te C M O S te c h n o lo g y , a lo w - p o w e r 1 6 - b it m ic r o p r o c e s s o r s y s te m c a n be re a liz e d .

Contextual Info: SN54ALS1804A, SN54AS1804, SN74ALS1804A, SN74AS1804 HEX 2-INPUT NAND DRIVERS AU G U ST 1 9 8 4 -R EVISED M A Y 1 9 8 6 S N 5 4 A L S 1 8 0 4 A , S N 5 4 A S 1 8 0 4 . . . J PACKAGE High Capacitive Drive Capability SN74A LS1804A , S N 74A S 1804 'A L S 1 8 0 4 A Has Typical Delay Time of 4 ns

ALS573

Abstract: 5Q14
Contextual Info: S N 5 4 A L S 5 8 0 , S N 5 4 A S 5 80 , S N 7 4 A L S 5 8 0 , S N 7 4 A S 5 8 0 O C T A L D T Y P E T R A N S P A R E N T L A T C H E S W ITH 3 S T A T E O U T P U T S D 2 6 6 1 , DECEMBER 1 9 8 2 - 3-State Buffer-Type Outputs Drive Bus-Lines Directly REVISED M A Y 1 9 8 6

74as10

Contextual Info: SN 54ALS1008A, SN54AS1008A, S N 74 A L S 10 0 8 A , S N 74 A S 10 0 8 A QU AD RUPLE 2-INPUT POSITIVE AND BUFFERS/DRIVERS D2661, DECEMBER 1982-REVISED MAY 1986 • • 'ALS1008A is a Buffer Version of 'ALS08 SN54A LS1008A . SN 54A S 1008A . . J PACKA GE S N 7 4 A L S 1 0 0 8 A , S N 7 4 A S 1 0 0 8 A . . . D OR N PACKAGE

54als157

Abstract: 74als15
Contextual Info: T YP E S S N 5 4 A L S 1 5 7 , SN54ALS158, S N 5 4 A S 15 7, SN54AS158 S N 7 4 A L S 1 5 7 , S N 74 A L S 15 8 , S N 7 4 A S 1 5 7 , SN 74AS 15 8 Q U AD R UPLE 1 OF 2 D A T A SELECTORS/M ULTIPLEXERS 0 2 6 6 1 , APRIL 1 9 8 2 —REVISED DECEMBER 1 9 8 3 •

M53325P

Abstract: M5L8080AP 8228 DI M5L8228P 8228P intel 8228 28P1 M53348P M5L8080A M5L8224P
Contextual Info: MITSUBISHI LSIs M5L8228P S Y S T E M CONTROLLER AND BUS DRIVER FOR M 5 L 8 0 8 0 A P , S CPU DESCRIPTION PIN CONFIGURATION TOP VIEW T h e M 5 L 8 2 2 8 P is a system c o n tr o lle r and bus d riv e r fo r M 5 L 8 0 8 0 A P , S C P U s . It g e n e r a te s a ll s ig n a ls re q u ire d to

Contextual Info: ii W\ 91 91 91 A ♦S' B B m ft¡ 8 8 8 s 11 s d u s a s i d ü ni BBS 0 8 B 808 ut a s U S I ] im # # $ $ $• # $• B8 B S B B 1 1 1 § B B § § H 8 B B U D Ì ] S 8 § B B B A ® Mp» ¡"“S=ï? I ] II S ® I «?ó I I ® U [1 US ® IV tv IS (0 IE?

74AS882

Contextual Info: SN54AS882A, SN74AS882A 32 BIT LOOK AHEAD CARRY GENERATORS D 2 6 6 1 , DECEMBER 1 9 8 2 REVISED NOVEMBER 1985 SN 54A S882A . J T P A C KA G E S N 7 4 A S 8 8 2 A . . DW OR NT P A C K A G E Directly Compatible with 'A S 1 8 1 B , 'A S 1 1 8 1 , 'A S 8 8 1 B , and A S 1 8 8 1 A LU s

Contextual Info: M E M O R Y M O D U L E S D R a m 1 0 2 4 M x 8 -S O P D D R D D R S y n c h r o n o u s D y n a m ic R a m 8 G b it D M O D U L E 3 D D R S D R a m 1 D 8 G 0 8 T S 8 1 7 7 o r g a n iz e d a s 1 0 2 4 M x 8 , b a s e d o n 1 2 8 M x 8 P in A s s ig n m e n t T o p V ie w

Contextual Info: M E M O R Y M O D U L E S D R a m 5 1 2 M x 8 -S O P S y n c h r o n o u s D y n a m ic R a m M O D U L E 3 D S D 4 G 0 8 V S 8 1 8 4 4 G b it S D R a m o r g a n iz e d a s 5 1 2 M x 8 , b a s e d o n 1 2 8 M x 4 P in A s s ig n m e n t T o p V ie w S O P 5 4 - ( P itc h : 0 .8 0 m m )

Contextual Info: M E M O R Y M O D U L E S R a m 4 M x 8 -B G A S ta tic R a m M O D U L E 3 D S R 3 2 M 0 8 V B 2 3 6 8 3 2 M b it S R a m o r g a n iz e d a s 4 M x 8 , b a s e d o n 2 M x 8 P in A s s ig n m e n t T o p V ie w B G A 4 8 - ( 6 x 8 P itc h : 0 .7 5 m m )

Contextual Info: M E M O R Y M O D U L E S D R a m 5 1 2 M x 8 -S O P S y n c h r o n o u s D y n a m ic R a m M O D U L E 3 D S D 4 G 0 8 V S 8 1 8 4 4 G b it S D R a m o r g a n iz e d a s 5 1 2 M x 8 , b a s e d o n 1 2 8 M x 4 P in A s s ig n m e n t T o p V ie w S O P 5 4 - ( P itc h : 0 .8 0 m m )

74ALS1805

Abstract: 74ALS180 SN74AS1805
Contextual Info: SN54ALS1805A, SN54AS1805, SN74ALS1805A, SN74AS1805 HEX 2-INPUT NOR DRIVERS AU G U S T 1 9 8 4 -R E V IS E D M A Y 1 9 8 6 S N 5 4 A L S 18 0 5 A , S N 5 4 A S 1 8 0 5 . S N 74A LS 1805A, SN 74A S 1806 . High Capacitive Drive Capability 'A L S 1 8 0 5 A Has Typical Delay Time of

Contextual Info: M E M O R Y M O D U L E S R a m 4 M x 8 -S O P S ta tic R a m M O D U L E 3 D 3 2 M b it S R a m S R 3 2 M 0 8 C S 8 1 3 9 o r g a n iz e d a s 4 M x 8 , b a s e d o n 5 1 2 K x 8 P in A s s ig n m e n t T o p V ie w S O P 4 4 - ( P itc h : 0 .8 0 m m )

Contextual Info: SN54ALS805A, SN54AS805B, SN74ALS805A, SN74AS805B HEX 2-INPUT NOR DRIVERS D 2 66 1 . DECEMBER 1982 - REVISED MAY 1986 High Capacitive Drive Capability S N 5 4 A L S 8 0 5 A , S N 5 4 A S 8 0 5 B . . . J P AC K A G E S N 7 4 A L S 8 0 5 A . S N 7 4 A S 8 0 5 B . . . D W OR N P AC K A G E

Contextual Info: M E M O R Y M O D U L E S R a m 4 M x 8 -S O P S ta tic R a m M O D U L E 3 D 3 2 M b it S R a m S R 3 2 M 0 8 C S 8 1 3 9 o r g a n iz e d a s 4 M x 8 , b a s e d o n 5 1 2 K x 8 P in A s s ig n m e n t T o p V ie w S O P 4 4 - ( P itc h : 0 .8 0 m m )

82LS181

Abstract: 1mF CAPACITOR 82LS180 SIGNETICS* fusing procedure
Contextual Info: 8 2 L S 1 8 0 -F .N • 8 2 L S 1 8 1 -F .N DESCRIPTION FEATURES T h e 8 2 L S 1 8 0 and 8 2 L S 1 8 1 a re fie ld p ro ­ g ra m m a b le , w h ic h m e an s th a t c u s to m p a t­ te rn s a re im m e d ia te ly a v a ila b le by fo llo w in g t h e fu s in g p r o c e d u r e g iv e n in th is d a ta

Contextual Info: M E M O R Y M O D U L E D D R 2 S D R a m 1 2 8 M x 8 -S O P D D R 2 S D R A M M O D U L E 3 D 2 D 1 G 0 8 U S 1 2 8 5 1 G b it D D R 2 S D R a m o r g a n iz e d a s 1 2 8 M x 8 , b a s e d o n 1 2 8 M x 8 P in A s s ig n m e n t T o p V ie w S O P 7 4 - ( P itc h : 0 .6 5 m m )