S 178 A INTEGRATED CIRCUIT Search Results

Contextual Info: SIEMENS GSM Receiver Circuit PMB 2401 Preliminary Data Bipolar 1C Features • Heterodyne receiver with demodulator • Down mixing from 900 MHz receiver band to the base band • Demodulation and generation of l/Q-baseband components • Low mixer noise 10 dB SSB

Contextual Info: ICS1574 Integrated Circuit Systems, Inc. User Programmable Laser Engine Pixel Clock Generator Description Features The ICS1574 is a very high performance monolithic phaselocked loop PLL frequency synthesizer designed for laser engine applications. Utilizing ICS’s advanced CMOS mixed­

RY 485 ESA

Contextual Info: MAR 2 3 Î992 PRELIMINARY Information Storage Devices, Inc. IS D 1 0 1 2 A /1 0 1 6 A /1 0 2 0 A Single-Chip Voice Record/Playback Devices FEATURES • N a tu ral, h ig h -q u ality p lay b ack su itab le fo r v o ice , m u sic, an d to n e s • F le x ib le re c o r d a n d p la y b a ck c o n tro l o p tion s

PCM2902

Contextual Info: BurrĆBrown Products from Texas Instruments PCM2900 PCM2902 SLES035B − MARCH 2002 − REVISED JUNE 2004 STEREO AUDIO CODEC WITH USB INTERFACE, SINGLEĆENDED ANALOG INPUT/OUTPUT AND S/PDIF FEATURES D Stereo DAC D PCM2900: Without S/PDIF D PCM2902: With S/PDIF

ISD2500-SERIES

Abstract: ISP2500
Contextual Info: INFORMATION STORAGE b7E » • TOOBBTD GOODlEh t m «ISDI - PRELIMINARY DATA S H E E T - M j ; ; r ON

INTELDX4 write-through

Abstract: 242202
Contextual Info: in t e i EMBEDDED WRITE-BACK ENHANCED lntelDX4 PROCESSOR Up to 100 MHz Operation Data Bus Parity Generation and Checking Integrated Floating-Point Unit Speed-Multiplying Technology Boundary Scan JTAG 32-Bit RISC Technology Core 3.3-Volt Processor, 75 MHz, 25 MHz

Contextual Info: Intel 80960CA-33, -25, -16 32-BIT HIGH-PERFORMANCE EMBEDDED PROCESSOR • Two Instructions/Clock Sustained Execution • Four 59 Mbytes/s DMA Channels with Data Chaining • Dem ultiplexed 32-bit Burst Bus with Pipelining • 32-bit Parallel Architecture — Two Instructions/clock Execution

Contextual Info: LS120 Data Sheet I-Cube Quad-Port Ethernet Switch Interface Description Features Supports both 10 and 100 Mbit Ethernet, with Half Duplex and Full Duplex modes. Cut-through or Store-and-Forward switching, selectable on a per-port basis. Supports Half Duplex and Full Duplex Flow

Contextual Info: TPS60120, TPS60121, TPS60122, TPS60123, TPS60124, TPS60125 REGULATED 200-mA HIGH EFFICIENCY CHARGE PUMP DC/DC CONVERTERS SLVS257B – NOVEMBER 1999 – REVISED AUGUST 2000 features applications D D D D D D D D D D D D D D D D D D D D High Average Efficiency Over Input Voltage

Contextual Info: TLV247xĆQ1, TLV247xAĆQ1 FAMILY OF 600ƵA/Ch 2.8ĆMHz RAILĆTOĆRAIL INPUT/OUTPUT HIGHĆDRIVE OPERATIONAL AMPLIFIERS SGLS180A − AUGUST 2003 − REVISED OCTOBER 2004 D Qualification in Accordance With D D D D D D D D High Output Drive Capability AEC-Q100†

Contextual Info: in te i 82375EB PCI-EISA Bridge PCEB Provides the Bridge Between the PCI Bus and EISA Bus 32-Bit Data Paths 100% PCI and EISA Compatible — PCI and EISA Master/Slave Interface — Directly Drives 10 PCI Loads and 8 EISA Slots — Supports PCI at 25 MHz to 33 MHz

S-PBGA-N272

Abstract: 6713 SPRU266
Contextual Info: TMS320C6713, TMS320C6713B FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SPRS186J − DECEMBER 2001 − REVISED FEBRUARY 2005 D Highest-Performance Floating-Point Digital D D D D D Signal Processors DSPs : C6713/C6713B − Eight 32-Bit Instructions/Cycle − 32/64-Bit Data Word

ea8 diode

Abstract: 6713 SPRU266
Contextual Info: TMS320C6713, TMS320C6713B FLOATINGĆPOINT DIGITAL SIGNAL PROCESSORS SPRS186J − DECEMBER 2001 − REVISED FEBRUARY 2005 D Highest-Performance Floating-Point Digital D D D D D Signal Processors DSPs : C6713/C6713B − Eight 32-Bit Instructions/Cycle − 32/64-Bit Data Word

Contextual Info: 0 M IF IR IfflM D @ R 9 in te i 82395DX HIGH PERFORMANCE SMART CACHE Optimized Intel386 DX Microprocessor Companion Concurrent Line Buffer Cacheing Multiprocessor Support Integrated 16KB Data RAM Expandable - up to 64KB 4 Way SET Associative with Pseudo

TMS320C6455 rapid io

Abstract: SPRAAA8
Contextual Info: TMS320C6455 Fixed-Point Digital Signal Processor www.ti.com SPRS276A – MAY 2005 – REVISED JULY 2005 TMS320C6455 Fixed-Point Digital Signal Processor 1.1 • • • • • • • • • Features High-Performance Fixed-Point DSP C6455 – 1.39-, 1.17-, 1-ns Instruction Cycle Time

Intel overdrive

Contextual Info: in t e i Intel486 SX M ICROPROCESSOR IM PORTANT— Read This Section Before Reading The Rest Of The Data Sheet This data sheet describes the Intel486 SX microprocessor, the Intel OverDrive™ Processor, and the l n t e l 4 8 7 TM S X Math Coprocessor. All normal text describes the functionality for the Intel486 SX microproces­

XC90

Abstract: intel 82358
Contextual Info: 82355 BUS MASTER INTERFACE CONTROLLER BMIC • Designed for use in 32-Bit EISA Bus Master Expansion Board Designs — Integrates Three interfaces (EISA, Local CPU, and Transfer Buffer) ■ Supports 16- and 32-Bit Burst Transfers — 33 Mbytes/Sec Maximum Data