RES 364 Search Results

RES 364

Abstract: XC95288
Contextual Info: HXILINX XC9500 Series Table of Contents XC9500 In-System Programmable CPLD Family F eatu res. Family O verview .

piezoelectric microphone

Abstract: 208 SOT-163 Automatic Voltage stabilizer dynamic microphone tea1066t circuit diagram for automatic voltage regulator Wheatstone Resistive Bridge amplifier S020 TEA1060 capacitive Wheatstone Bridge amplifier
Contextual Info: Product specification Philips Semiconductors Versatile telephone transmission circuit with dialler interface TEA1066T • Receiving amplifier for magnetic, dynamic or piezoelectric earpieces FEA TU RES • Voltage regulator with adjustable static resistance

Contextual Info: Diaphragm Patterns - Circular Micro-Measurements Transducer-Class Strain Gages GAGE PATTERN Actual size shown. Enlarged when necessary for definition. inch DIMENSIONS GAGE DESIGNATION See Note 1 RES. IN OHMS STANDARD CREEP CODE millimeter ENCAPSULATION

mitel hdlc

Abstract: T8972
Contextual Info: ISO-CMOS ST-BUS FAMILY MITEL F e atu res MT8952B HDLC Protocol Controller _ ISSUE6_March 1997 Form ats data as per X.25 CCITT level-2 standards G o-Ahead sequence generation and detection S ingle byte address recognition

182JB

Abstract: N2A-XX-S046R-350 EA-XX-S046R-350 EA-XX-S070R-10C Strain Gages 455jb DIAPHRAGM PATTERNS
Contextual Info: Circular Diaphragm Patterns Vishay Micro-Measurements Transducer-Class Strain Gages size shown. GAGE PATTERN Actual Enlarged when necessary for definition. inch millimeter DIMENSIONS GAGE DESIGNATION RES. IN OHMS STANDARD CREEP CODE Similar to a 182JB/JC pattern in Catalog 500.

Contextual Info: Thal H E W L E T T mLEMP A C K A R D 4.8 V NPN Common E m itter Output Power Transistor for GSM Class IV Phones Technical Data AT-36408 F eatu res • 4.8 Volt Pulsed Operation pulse width = 577 usee, duty cycle = 12.5% • +35.0 dBm Pout @ 900 MHz, Typ.

Contextual Info: Programmable Array Logic Very High Speed/Asynchronous PAL20RA10 -2 0 Series q q i c i j u a Advanced Micro Devices U.S. Patent 4124899 F eatu res/ Benefits • 30-MHz max frequency and 20-ns propagation delay • Individually programmable asynchronous set, reset and

HSCH-5315

Abstract: HSCH-5316
Contextual Info: T h p l H EW LETT 1 "EM PACKARD Beam Lead Schottky Diodes for M ixers and D etectors 1 - 2 6 GHz Technical Data HSCH-5300 Series Featu res • Platinum Tri-Metal System High Temperature Stability • Silicon Nitride Passivation Stable, Reliable Performance

Contextual Info: EDI444096CA 4Megx4 EDO DRAM ELfCTROMC DESIGNS, N C 4 Megabit x 4 Dynamic RAM 5V, Extended Data Out The EDI444096CA is a high performance, low power CMOS F eatu res Dynamic RAM organized as 4 Megabit x 4. The EDI444096CA features EDO Mode operation which allows high speed random

PAL Encoders

Abstract: digital multimedia broadcasting PIR KDS-9H
Contextual Info: Multimedia ICs Digital NTSC/PAL Encoder BU1419K The BU1419K is an LSI IC that converts digital YUV input into analog video signals in the NTSC or PAL format. •Applications Video CDs •Featu res 1 Supported input clocks : 27.0/13.5MHz. 2) 16-bit input Y, U and V signals.

pa 2030a

Abstract: 2SC4520 QGQ711G K 2038
Contextual Info: SANYO SE MI COND UC TO R CORP 2SC4520 7*H707b Q0Q711G 1 22E D T ~ 3 5 ~ n % NPN Epitaxial Planar Silicon Transistor 2038 High-Speed Switching Applications 3I39 F ea tu res . Adoption o f FBET, MBIT processes • Large current capacity •Low collector-to-emitter saturation voltage

Contextual Info: 74HC/HCT166 MSI 8-BIT PARALLEL-IN/SERIAL-OUT SHIFT REGISTER FEA TU RES T Y P IC A L • Synchronous parallel-to-serial applications • Synchronous serial data input for easy expansion Clock enable for “ do nothing" mode Asynchronous master reset For asynchronous parallel data load

Contextual Info: SIP RESISTOR NETWORKS 1 RSL H = .200 Vsw RSCH = .256’/.w RSHH = .355'/*w MARKING: Pin 1 Location No. of Pins No. of Resistors Circuit Type Res. Value Code Tolerance Date Code Yr, Wk X-CIRCUIT— PARALLEL Y -C IR C U IT- DISCRETE pAAAn R 13 Elements Max.

STM-1 Physical interface PHY

Abstract: TCA240 341fh rca 645 PM4341A PM6341 PM7344 PM7345 PUB54016 E1 HDB3
Contextual Info: PMC-Sierra, Inc. • " ISSUE 5 PM7344 S/UNI-MPH SATURN QUAD T1/E1 MULTI-PHY USER NETWORK INTERFACE FEA TU RES • Single chip quad ATM User Network Interface operating at 1.544 Mbit/s or 2.048 Mbit/s. • Implements the ATM Forum User Network Interface Specification V3.1 for DS1

D311 equivalent

Abstract: DIODE d307 D312 diode JS 684 THYRISTOR OE 90C 2600 diode lt 445 ic "D312"
Contextual Info: International S Rectifier s e r ie s i r k . f i 52 FAST SCR I DIODE and SCR / SCR INT-A-PAK Power Modules F eatu res Fast turn-off thyristor Fast recovery diode High surge capability Electrically isolated baseplate 3000 V RMS isolating voltage Industrial standard package

transistor on 4673

Contextual Info: What HEWLETT mL'HM P A C K A R D Avantek Products Surface Mount Cascadable Am plifier 5 to 200 MHz Technical Data 1 PPA-253 F eatu res D escription Pin C onfiguration • F requency Range: 5 to 200 MHz The PPA-253 high-gain, low bias voltage, two-stage bipolar RF

4558p

Abstract: 4094 bp 5314P 095.956 diode wg 599 126701 6208p chebyshev 0.2dB FC-10n 6034b
Contextual Info: F L J-D 1,D 2,D C D IG ITA L PRO GRAM M ABLE FILT ER FEA TU RES • Cutoff frequency is set by logic inputs. • Lowpass, Highpass and Bandpass output functions are available simul­ taneously. • Gain and Q are set by external com­ ponents. • High accuracy, high stability

93c46 wm

Abstract: 22 pin ccd, dip, bar code HBCR2311 MSI IC decoder SMD 5 PIN CODE ad2 AD438 IC LA 4044 AUDIO
Contextual Info: W m HEW LETT WL'liM P A C K A R D Program m able Bar Code D ecode ICs Technical Data HBCR-2310 HBCR-2311 HBCR-2312 F eatu res • Supports 8 Bar Code Sym bologies • Ideal for Hand, CCD, and Laser Scanning Applications • Autom atic Code Recognition • Serial or Parallel I/O

pin configuration of 7486 IC

Abstract: pin DIAGRAM OF IC 7486 pin configuration OF IC 7486 IC 7486 MC6809 package 7486 ic truth table connection diagram IC 7486 DIAGRAM OF IC 7486 ic 7409 TTL 7486
Contextual Info: MT88V32 8 x 4 High Performance Video Switch Array M ITEL Prelim inary Inform ation F e atu res ISSUE 1 August 1993 O rdering Inform ation 32 bidirectional CM OS "T" sw itches in an 8 x 4 non-blocking array M T88V32AP 44 Pin PLCC -40° to 85°C B reak-before-m ake sw itching configuration

C1933

Abstract: VOLTAGE REGULATOR IC LM SERIES transistor 4429 watch stepping motor MSI MS-3
Contextual Info: RCL Semiconductors Ltd. 32 KHz Standard Watch CMOS 1C C1933 / C1933B GENERAL DESCRIPTION FEATU RES The C 1933/C 1933B is an integrated circu it fabricated in P olysilicon-G ate C M OS technology fo r application in b ip o la r ste p p in g m otor driven ana log tim e p ie ce s.

cpu 8082

Abstract: dmo 365 r Z80 Assembly Language Programming Manual Z80180 technical manual Z64180 zilog z80 CKAJ dmo 365 Z8018008 Z80 CPU
Contextual Info: é^ Z i Iîj G P r o d u c t S p e c if ic a t io n Z80180 Z180 M PU FEA TU RES: • • • • • • Operating Frequency to 12.5 MHz On-Chip MMU Supports Extended Address Space Two DMA Channels On-Chip Wait State Generators Two U A RT Channels Two 16-Bit Tim er Channels

Bt468

Abstract: rso p2f
Contextual Info: P relim inary Inform ation T his docum ent contains inform ation o n a p ro d u ct u n d er developm ent. T he param etric inform ation contain s targ et p aram eters and is subject to change. D istin gu ishin g Featu res A p p lica tio n s 200, 170 M H z O p eratio n

2709759

Abstract: 80C188XL20
Contextual Info: - I I [p [^@ B [L D T in tb l« 80C188XL20, 16, 12, 10 16-BIT HIGH INTEGRATION EMBEDDED PROCESSOR • Low Power, Full Static Version of the 80C188 ■ D ire c t A d d res sin g C a p a b ility to 1 M b yte M e m o ry and 64 K b y te I/O ■ Operation Modes Include:

transistor N43

Abstract: 4083C
Contextual Info: HIGH PERFORMANCE ANALOG iNTEOTATÊDCMCUfTS F eatu res Current Mode Four Quadrant Multiplier G eneral D escrip tion T he 4083C m akes use of an E lantec fully com plim entary oxide isolated bipolar process to produce a p a te n t pending cu rren t in, cu rren t out four q uadrant m ultiplier. In p u t and o u tp u t signal