REGISTER 1871 7 Search Results

Contextual Info: ¿ = 7 S C S -T H O M S O N *JÆ, 6aiD g ®IlL[I irMDȧ TS68951 MODEM RECEIVE ANALOG INTERFACE • TWO CHANNEL 12-BIT ANALOG TO DIGITAL CONVERTER FOR RECEPTION OF DIGITAL DATA FROM THE TELEPHONE LINE AND ECHO CANCELLATION (WITH ASYNCHRO­ NOUS MULTIPLEXING OF 2 PLESIOCHRONOUS CHANNELS

Contextual Info: Si GEC PLESSEY S E M I C O N D U C T O R S VP2611 H.261 ENCODER Supersedes January 1996 Edition, DS3478 - 3.0 D E S C R IP TIO N FE A TU R E S Fully integrated H261 video encoder Up to full CIF resolution and 30 Hz frame rates Inputs YUV data in 8 x 8 sub block format

VP510

Abstract: VP520 VP520S DS3487 H261 VP2611 VP2612 VP2614 VP2615 PAL colour coder block diagram
Contextual Info: VP2611 VP2611 H.261 Encoder Supersedes June 1996 edition, DS3487 - 4.0 DS3487 - 4.1 December 1998 FEATURES DESCRIPTION • Fully integrated H261 video encoder ■ Up to full CIF resolution and 30 Hz frame rates ■ Inputs YUV data in 8 x 8 sub block format

Contextual Info: VP2611 JANUARY 1996 ADVANCE INFORMATION DS3478 - 3.0 VP2611 H.261 ENCODER Supersedes version in June 1995 Digital Video & DSP IC Handbook, HB3923-2 FEATURES DESCRIPTION • Fully integrated H261 video encoder ■ Up to full CIF resolution and 30 Hz frame rates

MACROBIOCK

Contextual Info: MITEL VP2611 _ H.261 Encoder QPvynrnMni inrm o Supersedes June 1996 edition, DS3487 - 4.0 DS3487 - 4.1 December 1998 FEATURES DESCRIPTION • Fully integrated H261 video encoder ■ Up to full CIF resolution and 30 Hz fram e rates ■ Inputs YUV data in 8 x 8 sub block form at

Contextual Info: J'îV ’ ' 31 G F C Pi FSSFY JUNE 1993 S l M I C: « N l U C T l) K S PRELIMINARY INFORMATION DS3478 • 1.4 VP 2611 H .261 ENCODER FEATURES DESCRIPTION I Fully integrated H261 video encoder H Up to full CIF resolution and 30 Hz frame rates H Inputs YUV data in 8 x 8 sub block format

DS3487

Abstract: H261 VP2611 VP2612 VP2614 VP2615 VP510 VP520 VP520S
Contextual Info: VP2611 VP2611 H.261 Encoder Supersedes June 1996 edition, DS3487 - 4.0 DS3487 - 4.1 December 1998 FEATURES DESCRIPTION • Fully integrated H261 video encoder ■ Up to full CIF resolution and 30 Hz frame rates ■ Inputs YUV data in 8 x 8 sub block format

gc132

Contextual Info: a i GEC PLESSEY SEPTEMBER 1994 PRELIMINARY INFORMATION S E M I C O N D U C T O R S DS3478 - 2.3 VP2611 H.261 ENCODER Supersedes version in December 1993 Digital Video & DSP 1C Handbook, HB3923-1 DESCRIPTION FEATURES Fully integrated H261 video encoder Up to full CIF resolution and 30 Hz frame rates

Contextual Info: M ITEL VP2611 _ H.261 Encoder SE M IC O N D U C T O R Supersedes January 1996 edition, DS3487 - 3.0 DS3487 - 4.0 June 1996 FEATURES DESCRIPTION • Fully integrated H261 video encoder ■ Up to full CIF resolution and 30 Hz frame rates ■ Inputs YUV data in 8 x 8 sub block format

monochrome display

Abstract: 2272 DECODER H8/325 HOLT INC HCD66421BP HD66421 HD66421TB0 BK17
Contextual Info: Rev. 1.1E '99.02.10 Preliminary HD66421 HD66421 RAM-Provided 160 Channel 4-Level Grey Scale Driver for Dot Matrix Graphics LCD Description The HD66421 drives and controls a dot matrix graphic LCD(Liquid Crystal Display) using a bit-mapped method. It provides a highly

HITACHI HX 2272

Abstract: HX 2272 Hitachi DSA002733 Nippon capacitors
Contextual Info: HD66420 RAM-Provided 160 Channel 4-Level Grey Scale Driver for Dot Matrix Graphics LCD ADE-207-299(Z) Rev. 4.0 '99.12 Description The HD66420 drives and controls a dot matrix graphic LCD(Liquid Crystal Display) using a bit-mapped method. It provides a highly flexible display through its on-chip display RAM, in which each two bits of

LCD 320x80

Abstract: 320x80 Hitachi DSA002780 COM21 bsl4
Contextual Info: Rev. 3.0E '99.06.16 HD66420 HD66420 RAM-Provided 160 Channel 4-Level Grey Scale Driver for Dot Matrix Graphics LCD Description The HD66420 drives and controls a dot matrix graphic LCD (Liquid Crystal Display) using a bit-mapped method. It provides a highly

00365R

Abstract: 00365 r hs1-3282-5 Arinc 429 Harris harris arinc 429 bus interface line receiver circuit hs1-3282-8 HS3282 HS-3282
Contextual Info: HARRIS SEUICOND SECTOR 4b E D • M3Q5571 0030^00 S ■ HAS^ H S -3282 2 HARRIS REFERENCE AN400 CMOS ARINC Bus Interface Circuit January 1992 Features Pinouts 40 LEAD DIP TOP VIEW • ARINC Specification 429 Compatible • Data Rates of 100 Kilobits or 12.5 Kilobits

H34C

Abstract: Hitachi DSA00279 Nippon capacitors
Contextual Info: HD66421 RAM-Provided 160 Channel 4-Level Grey Scale Driver for Dot Matrix Graphics LCD ADE-207-300(Z) Rev.2.0 99.12 Description The HD66421 drives and controls a dot matrix graphic LCD(Liquid Crystal Display) using a bit-mapped method. It provides a highly flexible display through its on-chip display RAM, in which each two bits of

Contextual Info: To all our customers Information regarding change of names mentioned within this document, to Renesas Technology Corp. On April 1st 2003 the following semiconductor operations were transferred to Renesas Technology Corporation: operations covering microcomputer, logic,

Contextual Info: W78C31B jOj'inbond x m lV Electronics Corp. 8-BIT MICROCONTROLLER GENERAL DESCRIPTION The W78C31B microcontroller supplies a wider frequency range than most 8-bit microcontrollers on the market. It is compatible with the industry standard 80C31 microcontroller series.

ST7783

Abstract: Sitronix Technology ST7783 ST7781 929 rev oh s26 G86 703 A2 s534 diode 929 rev oh S29 G82 770 A2 HEF 4543 IC Sitronix Technology
Contextual Info: ST ST7781 262K Color Single –Chip TFT Controller/Driver 1. Introduction The ST7781 is a single-chip controller/driver for 262K-color, graphic type TFT-LCD. It consists of 720 source line and 320 gate line driving circuits. This chip is capable of connecting directly to an external microprocessor, and accepts,

M25PX64

Contextual Info: M25PX64 64-Mbit, dual I/O, 4-Kbyte subsector erase, serial Flash memory with 75 MHz SPI bus interface Features • SPI bus compatible serial interface ■ 75 MHz maximum clock frequency ■ 2.7 V to 3.6 V single supply voltage ■ Dual input/output instructions resulting in an

gmzan1

Contextual Info: PRELIMINARY DATA SHEET gmZAN1 Flat Panel Monitor Controller IC DAT-0021-A December 1999 Genesis Microchip 165 Commerce Valley Drive West • Thornhill • ON • Canada • L3T 7V8 • Tel: 905 889-5400 • Fax: (905)889-0035 1871 Landings Drive • Mountain View • CA • USA • 94043 • Tel: (650)428-4277 • Fax: (650)428-4288

M8254

Contextual Info: in t e i M8254 PROGRAMMABLE INTERVAL TIMER Military • Compatible with M8080A, M8085AH, M6086, M8088 and M80186 ■ Handles Inputs from DC to 8 MHz ■ Six Programmable Counter Modes ■ Status Read-Back Command ■ Available in 24-Pin Cerdip and 28-Pad LCC Packages

mx 362-0

Abstract: EL 817 c221 mx c346 diode MX C322 MX C339 DSA25 ram 6164 mv silicon c320 6164 ram EL 817 c336
Contextual Info: INTEGRATED CIRCUITS DATA SHEET PCF8832 STN RGB - 384 output column driver Preliminary specification 2002 Aug 16 Philips Semiconductors Preliminary specification STN RGB - 384 output column driver CONTENTS PCF8832 8.2 8.3 8.4 8.5 8.6 Set Y-address Set X-address

TMS370C002A

Abstract: SE370C712A TMS370Cxxx C702 C722 SE370C702 TMS370 TMS370C012A TMS370C302A TMS370C702
Contextual Info: Chapter 18 Electrical Specifications and Timings This chapter contains electrical and tinning information for the TMS370 family devices. This information is presented according to device category. Topic Page 18.1 Timing Parameter S y m b o ls . 18-2

SE370C712A

Abstract: digital clock notes C702 C722 SE370C702 TMS370 TMS370C002A TMS370C012A TMS370C302A TMS370C702
Contextual Info: Chapter 18 Electrical Specifications and Timings This chapter contains electrical and tinning information for the TMS370 family devices. This information is presented according to device category. Topic Page 18.1 Timing Parameter S y m b o ls . 18-2

TMS370C777A

Abstract: SE370C712A TMS370C756A SE370C756A TMS370C712A SE370C712B SE370C777A SE370C758A
Contextual Info: Chapter 18 Electrical Specifications and Timings This chapter contains electrical and tinning information for the TMS370 family devices. This information is presented according to device category. Topic Page 18.1 Timing Parameter S y m b o ls .18-2