REFCL Search Results

MQUAD

Abstract: TQ2059 TQ2059-MC
Contextual Info: T R I Q U I N T S E M I C O N D U C T O R, I N C . TQ2059 REFCLK GND NC NC 10 9 8 7 6 5 High-Frequency Clock Generator 4 NC 12 Phase Detector ÷10 VCO NC 13 TEST1 14 TEST2 15 NC 16 NC 17 27 NC GND 18 26 MUX ÷2 MUX 3 NC 2 NC 1 NC Control 28 NC 19 20 21 22

S3030

Abstract: e4 fault
Contextual Info: JU * EC TARGET SPECIFICATION E4/STM-1/O C-3 ATM T R AN SC EIVER WITH TTL REFCLK FEATURES • • • • • • • • • • • • • GENERAL DESCRIPTION Complies with ANSI, Bellcore, and ITU-T specifications On-chip high-frequency PLLs for clock generation and clock recovery

Contextual Info: W42C07A-01G IL08 C-MOS CPU FREQUENCY GENERATOR —TOP VIEW— 1 FS0 1 8 REFCLK 5 FS0 CPUCLK FS1 REFCLK VDD 7 2 GND X1/ICLK 3 X2 6 8 4 6 CPUCLK X2 4 5 FS1 3 X1/ICLK INPUT : FREQENCY SELECTION INPUT FS0 : FREQENCY SELECTION INPUT, LSB FS1 X1/ICLK : CRYSTAL CONNECTION / EXTERNAL CLOCK FREQENCY INPUT

20560

Abstract: pcm multiplexer
Contextual Info: Delta Sheet DS 2, 04.00 DSP Oriented PBX Controller DOC PEB 20560 Version 3.1 Compared to the DOC Version 2.1, the Version 3.1 will provide the following changes in functionality: 1 Switchable REFCLK Multiplexer Logic With the DOC V2.1 it was not possible to switch the reference clock dynamically without

LOF atm

Abstract: CY7B9514V
Contextual Info: fax id: 5018 PRELIMINARY CY7B9514V 3.3V Quad SONET Transceiver • Transition between REFCLKs is slowed to prevent data recovery errors • Single +3.3V ±10% supply • 100-pin TQFP • Compatible with fiber-optic modules, coaxial cable, and twisted pair media

AD9952ASV

Abstract: 250kHz-10MHz
Contextual Info: 400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer A Preliminary Technical Data AD9952 Support for 5v input levels on most digital inputs PLL REFCLK multiplier 4X to 20X Internal oscillator, can be driven by a single crystal Phase modulation capability

AD9951 Application Notes

Abstract: 1ad9951
Contextual Info: 400 MSPS 14-Bit, 1.8V CMOS Direct Digital Synthesizer A Preliminary Technical Data AD9951 PLL REFCLK multiplier 4X to 20X Internal oscillator, can be driven by a single crystal Phase modulation capability FEATURES 400 MSPS Internal Clock Speed Integrated 14-bit D/A Converter

AD9951

Abstract: AD9951 Application Notes AD9951YSV AD9951YSV-REEL7 cfr13
Contextual Info: 400 MSPS 14-Bit, 1.8 V CMOS Direct Digital Synthesizer AD9951 FEATURES PLL REFCLK multiplier 4x to 20× Internal oscillator, can be driven by a single crystal Phase modulation capability Multichip synchronization 400 MSPS internal clock speed Integrated 14-bit DAC

MIPI dphy

Abstract: MIPI DSI 4 lane MIPI bridge RGB mipi bridge mipi d-phy Arasan MIPI DSI to RGB MIPI EMI LVDS to mipi bridge MIPI DSI to lvds
Contextual Info: SN65DSI83 www.ti.com SLLSEC1D – SEPTEMBER 2012 – REVISED DECEMBER 2012 MIPI DSI BRIDGE TO FLATLINK LVDS Single Channel DSI to Single-Link LVDS Bridge Check for Samples: SN65DSI83 FEATURES 1 • • • • • • Reference Clock REFCLK 1.8 V Main VCC Power Supply

386DX

Abstract: 386SX 486DX 486DX2 486SX AV9107C
Contextual Info: AV9107C Integrated Circuit Systems, Inc. CPU Frequency Generator General Description The AV9107C offers a tiny footprint solution for generating two simultaneous clocks. One clock, the REFCLK, is a fixed output frequency which is the same as the input reference

Contextual Info: PM8356 QuadPHY FC Preliminary TEST FEATURES • Supports differential PECL REFCLK at 106.25 MHz. • Programmable output current that directly drives 50 ohms. • Provides internal 100 ohm differential termination on transmit and receive high-speed signals for optimal signal

Contextual Info: PHYSICAL LAYER PRODUCTS PRODUCT DATACOM VSC7226 VSC7226 Quad 3.125Gb/s Backplane Transceiver S P E C I F I C AT I O N S : REFCLK: 24.5 MHz - 312.5 MHz 4Tx/Rx REFCLK Offset: 200 ppm 4Serial Input Differential Terminations Adjustable Between 100Ω and 150Ω

VSC7216

Abstract: Rtxa
Contextual Info: VITESSE SEMICONDUCTOR CORPORATION SEMICONDUCTOR CORPORATION Advance Product Information Multi-Gigabit Interconnect Chip VSC7216 Condensed Features • 4 ANSI X3T11 Compliant Fibre Channel and 802.3z Compliant Gigabit Ethernet Transceivers • Received Data Aligned to Local REFCLK or

LVDS to mipi bridge

Abstract: LVDS to MIPI DSI LVDS to MIPI DSI Bridge mipi DSI protocol SN65DSI85 MIPI DSI to RGB mipi controller
Contextual Info: SN65DSI84 www.ti.com SLLSEC2B – SEPTEMBER 2012 – REVISED DECEMBER 2012 MIPI DSI BRIDGE TO FLATLINK LVDS Single Channel DSI to Dual-Link LVDS Bridge Check for Samples: SN65DSI84 FEATURES 1 • • • • • • Reference Clock REFCLK 1.8 V Main VCC Power Supply

d1nc7

Abstract: AN-20 CA-200 TTL 7450 SDI SERIALIZER SMPTE292M
Contextual Info: VITESSE SEMICONDUCTOR CORPORATION Advance Product Information SMPTE-292M Reclocker and Cable Driver at 1.485 Gb/s VSC6501 Features • Compliant with SMPTE-292M @ 1.485Gb/s • Buffered REFCLK output for distribution to additional devices • Clock and Data Recovery

AD9873

Abstract: AD9877 OP250 REF12 AD9877ABS v8322
Contextual Info: Mixed-Signal Front End Set-Top Box, Cable Modem AD9877 FUNCTIONAL BLOCK DIAGRAM FEATURES COS Tx DATA Tx 12 INTERPOLATOR FILTER Tx DAC 3 SIN PLL SPORT PROFILE DDS 12 4 CONTROL FUNCTIONS 2 8 RxIQ DATA 12 CA Σ-Δ SDELTA0 Σ-Δ SDELTA1 REFCLK ADC I IN ADC Q IN

Contextual Info: RGB526/RGB526DB 13.0 Pin Descriptions Table 11. Pin Descriptions Signal ¡1 1 1 1 Description xxiÊxxx REFCLK I 80 FS[1:0] I 96,83 DDOTCLK o 116 SCLK 113 LCLK I 109 SYSCLK o 75 PIX[63:0] I 10 «1ft *7 66,65,64, ÎP3 1.22 121320.119,118, 117 140.139,138,137,136,

Contextual Info: IL f f E W J AV9107C Integrated Circuit Systems, Inc. CPU Frequency Generator General Description Features The AV9107C offers a tiny footprint solution for generating two simultaneous clocks. One clock, the REFCLK, is a fixed output frequency which is the same as the input reference

AD9833

Abstract: AD9858/PCBZ AD9854ASQZ AD9854ASQZ-ND AWA24S AWS24S AD9835BRUZ-ND AWP24S AD9834CRUZ-ND AD9912BCPZ
Contextual Info: DDSs Tuning Nominal I Supply FS lout Compliance Master Resolution Word Width Supply Total Nom. Range REFCLK On-Board I/O fclk Bits (Bits) (V) (Max.) (mA) (V) Multiplier Comparator Interface Package Single (+3.3), 10 32 15mA 4 1.5 No No Parallel 48-LQFP 25MHz

AD9953

Abstract: AD9953YSV
Contextual Info: 400 MSPS, 14-Bit, 1.8 V CMOS Direct Digital Synthesizer AD9953 PLL REFCLK multiplier 4x to 20× Internal oscillator, can be driven by a single crystal Phase modulation capability Multichip synchronization FEATURES 400 MSPS internal clock speed Integrated 14-bit DAC

Oscilloscope USB 200Mhz Schematic

Abstract: 24LC001 ad9958 Application 74LVC125A AD9958 AD9959 ETC1-1-13 1KP0
Contextual Info: Evaluation Board for 2-Channel 500 MSPS DDS with 10-Bit DACs AD9958/PCB EVALUATION BOARD BLOCK DIAGRAM AD9958 EVALUATION BOARD XTAL BUFFER/XTAL OSCILLATOR J9 BALUN REFCLK MULTIPLIER 4X TO 20X MUX REF_CLK SYS CLK J3 DAC 0 OUT J7 J13 ÷4 SYNC_CLK SYS CLK SYS

AD9959

Abstract: design signal generator with ad9959 FMCW Radar aotf AD9959/PCBZ CW10 FMCW circuit 500MSPS AD8346 AD8347
Contextual Info: 4-Channel, 500 MSPS DDS with 10-Bit DACs AD9959 FEATURES Software-/hardware-controlled power-down Dual supply operation 1.8 V DDS core/3.3 V serial I/O Multiple device synchronization Selectable 4x to 20× REFCLK multiplier (PLL) Selectable REFCLK crystal oscillator

Q7-Q10

Contextual Info: T R I Q U I N T S E M I C O N D U C T O R , I N C 7Q £t FBIN S1 REFCLK SO F1 FO GND GA1088 11-Output Configurable Clock Buffer Features o u tp u ts, operating ove r a w ide range o f frequencies — fro m 18 M Hz to 105 MHz. The o u tp u ts are available at either 1 x a n d 2x o r at 1 x and 1/2 x

UA 758

Abstract: AV9107C-14CN08
Contextual Info: AV9107C-14 Integrated Circuit Systems, Inc. CPU Frequency Generator General Description Features The AV9107C-14 offers a tiny footprint solution for generating two simultaneous clocks. One clock, the REFCLK, is a fixed output frequency which is the same as the input