RANDOM PATTERN GENERATOR Search Results

Contextual Info: Data Retiming Phase-Locked Loop AD805* ANALOG ► DEVICES FEATURES 155 Mbps Clock Recovery and Data Retiming Permits CCITT G.958 Type A Jitter Tolerance Permits CCITT G.958 Type B Jitter Transfer Random Jitter: 0.6° rms Pattern Jitter: Virtually Eliminated

AD805-VCXO

Abstract: schematic diagram of digital combination lock analog delay line SAW rd805 10H116 AD805 AD805BN phase sequence detector vectron Co
Contextual Info: ANALOG DEVICES Data Retiming Phase-Locked Loop AD805* FEATURES 155 Mbps Clock Recovery and Data Retiming Permits CCITT G.958 Type A Jitter Tolerance Permits CCITT G.958 Type B Jitter Transfer Random Jitter: 0.6° rms Pattern Jitter: Virtually Eliminated Jitter Peaking: Fundamentally None

10H116

Abstract: tqs-610
Contextual Info: ANALOG DEVICES FEATURES 155 Mbps Clock Recovery and Data Retiming Permits CCITT G.958 Type A J itte r Tolerance Permits CCITT G.958 Type B J itte r Transfer Random Jitter: 0.6° rms Pattern Jitter: V irtually Eliminated Jitter Peaking: Fundam entally None

Contextual Info: EEPROM Highlights WHY USE EEPROMS? A wide spectrum of memory devices have been devel­ oped to fill particular needs. Read-Only Memories ROMs have high density and fast data access. The biggest disadvantage is the production volume required with an unalterable data pattern. Random-Access

Contextual Info: T7001 Random Number Generator Features On-chip or external high-frequency oscillator source option On-chip or external jitter oscillator source option Data ready and alarm output flags readable from the data bus or independent output pins, allowing either processor interrupt or

Contextual Info: T7001 Random Number Generator Features • O n-chip or external high-frequency o scillator source option ■ O n-chip or external jitte r oscillator source option ■ Data ready and alarm o u tp u t flags readable from the data bus or independent output pins, allow ing either processor interrupt or

PSPL1P602

Contextual Info: Programmable Pulse/Pattern Generator PSPL1P601 and PSPL1P602 Datasheet Applications Serial data generation Jitter tolerance testing General purpose pulse generator The PSPL1P601 and PSPL1P602 are effectively two instruments in one, a programmable pulse generator and a programmable pattern generator.

Contextual Info: STICK-ON SERIES Model ST-NG1 Random Noise Generator ANYWHERE YOU NEED. • • • • • True Random Noise Source Masking Noise Sources Pink Noise White Noise Mic and/or Line Level Noise Signals You Need The ST-NG1! The ST-NG1 is part of the group of versatile STICK-ON products from Radio Design Labs. STICK-ONs

prbs pattern generator

Abstract: K286 post on self test circuit diagram
Contextual Info: 8. Stratix GX Built-In Self Test BIST SGX52008-1.1 Introduction Each Stratix GX channel in the gigabit transceiver block contains embedded built-in self test (BIST) circuitry, which is available for quick device verification. The BIST circuitry consists of a data generator that

HT83XXX

Abstract: HT83060 HT83120 HT83180 HT83240 HT83360 HT83V31 HT83V32 HT83V33 HT83V34
Contextual Info: HT83XXX Magic Voice Features • • • • • • • Operating voltage: 2.4V~5.0V Programmable speech synthesizer Programmable tone melody generator ADPCM, PCM synthesis Internal voice ROM Range of voice sampling rate: 4kHz~10kHz for PCM synthesis 4kHz~8kHz for ADPCM synthesis

Contextual Info: VSC3402 PRODUCT BRIEF Multirate SDI Video Reclocker and Cable Driver Single input, low power digital reclocker with cable driver includes built-in SMPTE pattern generator and HDVScope diagnostics for broadcast video applications. Highlights • Integrated reclocker and line driver

Contextual Info: HCSL/LVCMOS Clock Generator IDT6T49278BI DATA SHEET General Description Features The IDT6T49278BI is a PLL-based clock generator for Freescale systems. This high performance device is optimized to generate the processor core reference clock, the PCI-Express, sRIO, XAUI,

ICS43312AIL

Abstract: ICS843312AKI ICS843312I MO-220
Contextual Info: Crystal-to-LVPECL Clock Synthesizer ICS843312I DATA SHEET General Description Features The ICS843312I is a high frequency clock generator. The ICS843312I uses an external 25MHz crystal to synthesize 312.5MHz and 125MHz clocks. The ICS843312I has excellent RMS period jitter

72-LEAD

Abstract: pci expres card ICS8413S12BKI
Contextual Info: HCSL/LVCMOS Clock Generator ICS8413S12BI DATA SHEET General Description Features The ICS8413S12BI is a PLL-based clock generator. This high performance device is optimized to generate the processor core reference clock, the PCI-Express, sRIO, XAUI, SerDes reference

9985 agilent

Abstract: agilent 9985 81134A N4871A versa max nano & micro Micro yig oscillator 5988-9591EN
Contextual Info: Agilent Technologies 81133A and 81134A 3.35 GHz Pulse Pattern Generators Data Sheet Key features Figure 1: 81134A 81133A and 81134A 3.35 GHz Pulse Pattern Generators The need for pulse and pattern generation is fundamental to digital device characterization

Contextual Info: Crystal-to-LVPECL Clock Synthesizer ICS843156I DATA SHEET General Description Features The ICS843156I is a high frequency clock generator. The ICS843156I uses an external 25MHz crystal to synthesize 156.25MHz clock. The ICS843156I has excellent cycle-to-cycle and

CN63XX

Contextual Info: Clock Generator for Cavium Processors ICS8413S12BI DATA SHEET General Description Features The ICS8413S12BI is a PLL-based clock generator specifically designed for Cavium Networks Octeon II processors. This high performance device is optimized to generate the processor core

Contextual Info: Agilent ESG-A and ESG-D RF Signal Generators Data Sheet Discontinuance Notice On 1 March 2007, the ESG-A/D Series will be discontinued. Agilent willcontinue to support these products until 1 March 2012. The recommended replacement is the Agilent MXG signal generator.

hitachi h8

Abstract: IA64F3048SEC Hitachi DSA0073
Contextual Info: IA64F3048SEC Advance Information Sheet SECURITY-ENHANCED MICROCONTROLLER FEATURES • • • • • • • • • • • • • • • • • • • • • • • • 4 Kbytes SRAM 128 Kbytes EEPROM Additional 32x32 multiply instruction Hardware random number generator

Contextual Info: VSC3401 PRODUCT BRIEF Multirate SDI Video Cable Equalizer and Reclocker Vitesse’s breakthrough SDI video cable equalizer integrates reclocker, SMPTE pattern generator, and Vitesse’s HDVScope diagnostics for broadcast video applications. Highlights • Integrated adaptive cable equalizer

ICS841608AKI

Abstract: 841608AKILFT 100MHZ 32-PIN ICS841608I MO-220
Contextual Info: ICS841608I FEMTOCLOCKS CRYSTAL-TO-HCSL CLOCK GENERATOR GENERAL DESCRIPTION FEATURES The ICS841608I is an optimized PCIe and sRIO ICS clock generator and member of the HiPerClocks™ HiPerClockS™ family of high-performance clock solutions from IDT. The device uses a 25MHz parallel cr ystal to

MIPI csi-2 receivers

Contextual Info: SerialXpress – Advanced Jitter Generation for AWG SDX100, SDXUP Data Sheet Programmable pre/de-emphasis and preshoot: Most of the next-generation standards like PCIe, 10GbE, SAS, or USB 3.0 need more than one tap for pre/de-emphasis signal generation. The

Hitachi DSA0047

Contextual Info: IAH8/3048 Advanced Information Sheet SECURITY-ENHANCED MICROCONTROLLER FEATURES • • • • • • • • • • • • • • • • • • • • • • • • 4 Kbytes SRAM 128 Kbytes EEPROM Additional 32x32 multiply instruction Hardware random number generator

AWG7102 user manual

Abstract: AWG7102 "hard disk" "read channel" AWG7052 hard disk read channel AWG7000 AWG7051 617 610 465 CONNECTOR PAM matlab source code matlab pn sequence generator
Contextual Info: Arbitrary Waveform Generator AWG7000 Series AWG7102, AWG7101, AWG7052, AWG7051 Features & Benefits 10 GS/s (20 GS/s) and 5 GS/s models 1 or 2 Arbitrary Waveform Outputs – Accurate Timing with only 20 pspk-pk Total Jitter (at 10-12 BER, Typical) – 45 ps Tr/Tf (20% to 80%)