RANDOM Search Results

M 5110

Abstract: m5110 UM5110
Contextual Info: UD/15110 10 Sec Voice Synthesizer with Serial/Random Trigger Features • a ■ ■ Operating Voltage Range: 2.4V - 5.2V Power supply mode selectable by PWD 10 second voice duration 12 voice sections with serial or random trigger functions ■ The STA/STB can option for stop pulse, busy, or LED

Contextual Info: TC55417P/J —15H. TC55417P/J-20H TC55417P/J—25H. TC55417P/J-35H • * 16,384 W O R D x 4 BIT CMOS STATIC RAM DESCRIPTION The TC55417P/J—H is a 65,536 bit high speed static random access memory organized as 16,384 words by 4 bits using CMOS technology, and operated from a single 5 - volt supply.

TMS4116

Abstract: TMS4132
Contextual Info: MOS LSI TMS 4132 JDL 32,768-BIT DYNAMIC RANDOM-ACCESS MEMORY NOVEMBER 1979 32,768 «AX SUPPLY 1 X 1 Organization 10% Tolerance on All Supplies • All Inputs Including Clocks TTL-Compatible

260-pin

Contextual Info: TOSHIBA TC55V1864J/FT-10/12/15 PRELIMINARY SILICON GATE CMOS 65,536 WORD x 18 BIT CMOS STATIC RAM Description TheTC55V1864J/FT is a 1,179,648 bit high speed CMOS static random access memory organized as 65,536 words by 18 bits and operated from a single 3.3V : upply. Toshiba’s advanced CMOS technology and circuit design enable high speed operation.

TC8600F

Abstract: 1126to PHOTO INTERRUPT ROTATING SPEED SENSOR 360rpm magnetic head FDD
Contextual Info: TOSHIBA INTEGRATED CIRCUIT TC8600F TECHNICAL DATA TC8600F Fl o pp y Disk Mechanism Controller INTRODUCTION The FDMC-II TC8600F is a one chip C-MOS LSI in which the control logic of FLOPPY DISK DRIVE (FDD), together with the 4-bit CPU and required random logic.

Contextual Info: • ■ ! ■ ■ ■ ■ • '|<f TOSHIBA MIOS MEMORY PRODUCTS 8,192 WORD X 8 BIT CM OS STATIC RAM SILICON GATE C M O S T C 5 5 63 A P L-1 0, T C 5563A P L-12 T C 55 6 3 A P L -1 5 DESCRIPTIO N The TC5563APL is 65,536 bit static random access memory organized as 8,1 92 words by 8 bits

44c256

Abstract: 3034C
Contextual Info: SMJ44C256 262144 BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY _ SGMS034C - MAY 1989 - B E V ILO JUNE 1965 Organization. . . 262144 Words x 4 Bits Single 5-V Supply 10% Tolerance Processed to MIL-STD-833, Class B Performance Ranges: 3-State Unlatched Output

PIEZO BUZZER DRIVER

Abstract: only love can tr66
Contextual Info: U M 5 10 8 8 Sec Voice Synthesizer with Serial/Random Trigger Features • ■ a ■ ■ ■ ■ ■ ■ Operating Voltage Range: 2.4V - 5.2V Power supply mode selectable by PWD 8 second voice duration 12 voice sections with serial or random trigger functions

TC528257

Abstract: n724
Contextual Info: TOSHIBA SILICON GATE CMOS TC528257 t a r g e t s p e c 262,144WORDS X 8BITS MULTIPORT DRAM DESCRIPTION The TC528257 is a 2M bit CM OS multiport m em ory equipped with a 262,144-w ords by 8 -bits dynam ic random access m em ory RAM port and a 512-words by 8 -bits static serial access m emory (SA M ) port. The

lt928

Abstract: 55328P TC55328J
Contextual Info: 3 2 ,7 6 8 W O R D x 8 B IT C M O S S TA TIC R A M D E S C R IP T IO N The TC55328P/J is a 262,144 bits high speed static random access memory organized as 32,768 words by 8 bits using CMOS technology, and operated from a single 5-volt supply. Toshiba's CMOS

EN 1452-3

Abstract: J416
Contextual Info: SMJ4164 65.536-BIT DYNAMIC RANDOM-ACCESS MEMORY JU LY 1985 - J D PA C K A G E 6 5 ,5 3 6 x 1 Organization TO P V IEW Single 5-V Supply (± 1 0% Tolerance) w Ç AOQ A2C A1 C VddC 8 Long Refresh Period . . . 4 ms FG PA C K A G E Low Refresh Overhead Time . .

Contextual Info: TOSHIBA TC55V1664J/FT-10/12/15 PRELIMINARY SILICON GATE CMOS 65,536 WORD x 16 BIT CMOS STATIC RAM Description The TC55V1664J/FT is a 1,048.5,'6 bit high speed CMOS static random access memory organized as 65,536 words by 16 bits and operated from a single 3.3V sjpply. Toshiba's advanced CMOS technology and circuit design enable high speed operation.

LQFP-100

Contextual Info: TOSHIBA TC55WD1618FF-133,-150,-167 TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT TENTATIVE SILICON GATE CMOS 1,048,576-WORD BY 18-BIT SYNCHRONOUS NO-TURNAROUND STATIC RAM DESCRIPTION The TC55WD1618FF is a synchronous static random access memory SRAM organized as 1,048,576 words by

912BI

Contextual Info: TOSHIBA NIOS MEMORY PRODUCTS TC55329P/J-20, TC55329P/J-25 TC55329P/J-35 DESCRIPTION The TC55329P/J is a 294,912 b i t s high speed s t a tic random access memory organ ized as 32,768 words by 9 b i t s using CMOS technolo gy, and operated from a s in g le 5 -v o lt supply.

Contextual Info: SMJ684002 512K BY 84HT STATIC RANDOM-ACCESS MEMORY _ * Single 5-V ± 10% Power Supply HJA/HKE PACKAGE TOP ViEW f • • Fast Access Time 20125/35 ns Equal Address and Chip-Enable Access Time • • • All Inputs and Outputs Are TTL-Compatible

Contextual Info: TOSHIBA MOS MEMORY PRODUCTS TC55465P/J-20, TC55465P/J-25 TC55465P/J-35 ¡d e s c r ip t io n ] The TC55465P/J is a 262,144 b i t s high speed s t a t i c random ac c e ss memory organ ized as 65,536 words by 4 b i t s using CMOS tech n o lo g y , and operated from a s in g le 5 -v o lt supply.

Contextual Info: TMS44100, TMS44100P 4194304-BIT DYNAMIC RANDOM-ACCESS MEMORY SMHS410F-SEPTEMBER 1989-REVISED DECEMBER 1992 Single 5-V Power Supply ±10% Tolerance Performance Ranges: ACCESS ACCESS ACCESS SD P AC K A G E t (TOP VIEW) DJ P A C K A G E t (TOP VIEW) Organization . . . 4194 304 x 1

Contextual Info: SMJ44C256 262,144-WORD BY 4-BIT DYNAMIC RANDOM-ACCESS MEMORY 2 6 2 .1 4 4 x 4 Organization JD PACKAGE T O P V IE W Single 5-V Supply (10% Tolerance) D Q l[ 1 U 2 0 > s s 19 Ü D Q 4 DQ2[ 2 18 D DQ3 wC 3 17 ] CAS R ASd 4 16 3 5 5 A0[ 6 15 ] A8 A1[ 7 14 ] A 7

TMS4161

Contextual Info: TMS4161 65,536 BIT MULTIPORT VIDEO RAM JU LY 1 9 8 3 —REVISED NOVEMBER 1 9 8 5 N PACKAGE Dual Accessibility — One Port Sequential Access, One Port Random Access TOP VIEW Four Cascaded 64-B it Serial Shift Registers for Sequential Access Applications

lm814

Abstract: ID32-001
Contextual Info: TOSHIBA TC59LM814/06BFT-22,-24,-30 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 4,194,304-WORDSX4BANKSX16-BITS DOUBLE DATA RATE FAST CYCLE RAM 8,388,608-WORDSX4BANKSX8-BITS DOUBLE DATA RATE FAST CYCLE RAM DESCRIPTION TC59LM814/06BFT are a CMOS Double Data Rate Fast Cycle Random Access Memory DDR

Contextual Info: TMS418160A 1048576 BY 16-BIT DYNAMIC RANDOM-ACCESS MEMORY S M K S 891C - A U G U S T 1996 - R EVISED O C TO BE R 1997 This data sheet is applicable to TMS418160As symbolized by Revision “E” and subsequent revisions as described in the device symbolization section.

Contextual Info: TOSHIBA MOS MEMORY PRODOCTS TC55417P/J-15H, TC55417P/J-20H Id e s c r i p t i o h I The TC55417P/J is a 65,536 bit high speed static random access memory organized as 16,384 words by 4 bits using CMOS technology, and operated from a single 5-volt supply. Toshiba's high performance device technology provides both high speed and low power

TC551001BPL-10

Abstract: TC551001BPL-7
Contextual Info: INTEGRATED TO SHIBA TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT CIRCUIT TECHNICAL TC551001 BPL / BFL / BFTL / BTRL - 70 TC551001 BPL / BFL / BFTL / BTRL - 85 TC551001 BPL/ BFL/ BFTL/ BTRL-10 DATA SILICON GATE CMOS 131,072-WORD BY 8-BIT STATIC RAM DESCRIPTION The TC551001BPL/BFL/BFTL/BTRL is a 1,048,576-bit static random access memory SRAM organized as

le 9148

Abstract: ma 8601
Contextual Info: UM51 WSeries 10 Sec. Ifoice Synthesizer with Serial/Random Trigger Features • Operating Voltage Range: 2.4V - 5.2V ■ Power supply m ode selectable b y PWD ■ 10-second voice duration ■ 1 2 voice sections with serial or random trigger functions ■ The STA /S TB can option tor stop pulse, busy, or LED