RAMBUS CHANNEL Search Results

coax a62

Abstract: CAT24 24C02 catalyst
Contextual Info: Direct Rambus RIMM™ Module Specification Version 1.0 Copyright 2000 Rambus Inc. All rights reserved. Rambus, RDRAM, and the Rambus Logo are registered trademarks of Rambus Inc. Direct Rambus, RIMM, SORIMM, and Direct RDRAM are trademarks of Rambus Inc.

Contextual Info: Preliminary Information Direct Rambus® Clock Generator RAMBUS Overview The Direct Rambus® Clock Generator DRCG provides the necessary clock signals to support a Direct Rambus memory subsystem. It includes signals to synchronize the Direct Rambus Channel clock to an

40A-450-GS

Abstract: HP8573E HP8753E Picoprobe RIMM-Module HP34401A SoRIMM Rambus ASIC Cell rambus RAC direct rdram rac
Contextual Info: DIRECT RAMBUSTM SO-RIMMTM MODULE VALIDATION SPECIFICATION VERSION 0.9 È Copyright November 2000 Rambus Inc. All rights reserved. Rambus, RDRAM, and the Rambus Logo are registered trademarks of Rambus Inc. Direct Rambus, RIMM, SO-RIMM, and Direct RDRAM are trademarks of Rambus Inc.

Contextual Info: Direct Rambus Clock Generator ® RAMBUS Overview The Direct Rambus® Clock Generator DRCG provides the necessary clock signals to support a Direct Rambus memory subsystem. It includes signals to synchronize the Direct Rambus Channel clock to an external system clock. Contained in a 24-pin SSOP

Rambus clock generator

Contextual Info: Direct Rambus Clock Generator ® RAMBUS Overview • The Direct Rambus® Clock Generator DRCG provides the necessary clock signals to support a Direct Rambus memory subsystem. It includes signals to synchronize the Direct Rambus Channel clock to an external system clock. Contained in a 24-pin SSOP

Contextual Info: IBI RSocket Description Rambus Module Sockets RSocket™ are used in conjunction with Rambus Modules (RModule™) to provide memory expansion capabilities of up to 320 Rambus DRAMs (RDRAM™) on a Rambus Channel with a 500 MHz data transfer rate. RSocket Features

rambus slave

Abstract: rambus channel
Contextual Info: Rambus Channel Description Overview The Rambus Channel is a high-speed, byte-wide chip-to-chip interconnect designed to facilitate a 500 MHz data transfer rate between individual Rambus devices. As the foundation of every Rambus system, the Channel achieves this 2 nanosecond per byte

RDRAM LG

Abstract: HP16517A Lg rdram rambus LG RDRAM design LG rambus design
Contextual Info: LG Semicon RAMBUS DRAM Design Information Chapter j Introduction to Channel Design The Rambus Channel is a high-speed, byte-wide, synchronous chip-to-chip interconnect designed to achieve 500 MB/ second data transfer rates between Rambus components. As the foundation of every Rambus system, the electrical

DL010

Contextual Info: Dual Direct Rambus Clock Generator ® RAMBUS Overview The Dual Direct Rambus® Clock Generator DRCG-D provides the necessary clock signals to support a Dual channel Direct Rambus memory subsystem. The DRCG-D is a functional extension of the DRCG and maintains memory channel signal integrity. It includes

rambus RAC

Abstract: Rambus ASIC Cell rambus slave RAMBUS ASIC rambus channel Signal Path designer Rambus RDRAM ASIC RAC RAMBUS
Contextual Info: Rambus ASIC Cell RAC Description Rambus System Overview The Rambus ASIC Cell (RAC™) is a standard macro­ cell used in ASIC designs to interface the core logic of a CMOS ASIC to a high speed Rambus Channel capable of transferring data at 2 nanoseconds per byte. The

dpc-b

Contextual Info: _ ü RM odule Description RModule Overview Rambus Modules RModule™ are used in conjunc­ tion with Rambus Sockets (RSocket™) and RTransceivers™ to provide memory expansion capabilities of up to 320 Rambus DRAMs (RDRAM™) on a Rambus

PCK2010

Abstract: PCK2011 SSOP24
Contextual Info: INTEGRATED CIRCUITS PCK2011 Direct RAMbus Clock Generator Preliminary specification Philips Semiconductors 1999 Jan 19 Philips Semiconductors Preliminary specification Direct Rambus Clock Generator PCK2011 Overview PIN CONFIGURATION The Direct Rambus Clock Generator DRCG provides the Channel

Rambus ASIC Cell

Abstract: Rambus RAC
Contextual Info: INTEGRATED CIRCUITS PCK2011 Direct RAMbus Clock Generator Prelim inary specification Philips Semiconductors 1998 Nov 11 PHILIPS Philips Semiconductors Preliminary specification Direct Rambus Clock Generator PCK2011 Overview PIN CONFIGURATION The Direct Rambus Clock Generator DRCG provides the Channel

CY2210

Abstract: W133 W134 W134M W134S W158 W159 W161
Contextual Info: W134 Direct Rambus Clock Generator Features Description • Differential clock source for Direct Rambus™ memory subsystem for up to 800-MHz data transfer rate • Provide synchronization flexibility: the Rambus Channel can optionally be synchronous to an external

Contextual Info: Preliminary W134K Direct Rambus Clock Generator Features • Differential clock source for Direct Rambus® memory subsystem for up to 800MHz data transfer rate • Provide synchronization flexibility: the Rambus Channel can optionally be synchronous to an external system or

Contextual Info: W134 Direct Rambus Clock Generator Features Description • Differential clock source for Direct Rambus™ memory subsystem for up to 800-MHz data transfer rate • Provide synchronization flexibility: the Rambus Channel can optionally be synchronous to an external

Contextual Info: Preliminary W134M/W134S Direct Rambus Clock Generator Features • Differential clock source for Direct Rambus® memory subsystem for up to 800MHz data transfer rate • Provide synchronization flexibility: the Rambus Channel can optionally be synchronous to an external system or

W134MHT

Abstract: CY2210 ILB1206 W133 W134M W134S W158 W159 W161
Contextual Info: W134M/W134S Direct Rambus Clock Generator Features Description • Differential clock source for Direct Rambus™ memory subsystem for up to 800-MHz data transfer rate • Provide synchronization flexibility: the Rambus Channel can optionally be synchronous to an external

CY2220

Abstract: CY26503 CY26503ZC ILB1206
Contextual Info: CY26503 533-MHz Dual Direct Rambus Clock Generator Features Overview • Differential clock source for 800-MHz and 1066-MHz Direct Rambus memory subsystem • Provide synchronization flexibility: the Rambus channel can also be synchronous to an external system

CY2210

Abstract: ILB1206 W133 W134M W134S W158 W159 W161
Contextual Info: W134M/W134S Direct Rambus Clock Generator Features Description • Differential clock source for Direct Rambus™ memory subsystem for up to 800-MHz data transfer rate • Provide synchronization flexibility: the Rambus Channel can optionally be synchronous to an external

CY2220

Abstract: CY26503 CY26503ZC ILB1206
Contextual Info: CY26503 533-MHz Dual Direct Rambus Clock Generator Features Overview • Differential clock source for 800-MHz and 1066-MHz Direct Rambus memory subsystem • Provide synchronization flexibility: the Rambus channel can also be synchronous to an external system

CY2210

Abstract: ILB1206 W133 W134M W134S W158 W159 W161
Contextual Info: W134M/W134S Direct Rambus Clock Generator Features Overview • Differential clock source for Direct Rambus™ memory subsystem for up to 800-MHz data transfer rate • Provide synchronization flexibility: the Rambus Channel can optionally be synchronous to an external system or processor clock

CY2215

Abstract: ILB1206 W133 W158 W159 W161 W167B W234
Contextual Info: 1 W234 Dual Direct Rambus Clock Generator Features Overview • Differential clock source for Direct Rambus™ memory subsystem for up to 1.6-Gb/s serial data transfer rate • Provide synchronization flexibility: the Rambus Channel can optionally be synchronous to an external system or processor clock

CY26501

Abstract: CY26501PVC CY26501PVI CY26502 CY26502PVC CY26502PVI ILB1206 W133
Contextual Info: CY26501/CY26502 533-MHz Direct Rambus Clock Generator Features Overview • Differential clock source for Direct Rambus™ memory subsystem for up to 1066-MHz data transfer rate • Provide synchronization flexibility: the Rambus Channel can optionally be synchronous to an external system or processor clock