RAM 2102 Search Results

Contextual Info: m x EDI8C16512CA m ELECTRONIC DESIGN N C 512Kx16 Static Ram PRELIMINARY 512Kx16 CMOS, High Speed Static RAM Features The EDI8C16512CA, a high speed, high performance, 8 512Kx16 bit CMOS Static megabit density Static RAM organized as 512Kx16 bits, contains two 512Kx8 SRAMs.

INS8154N

Abstract: INS8154 INS8154D AD11 INS8060 pA716 P8008
Contextual Info: e~.National ~ Semiconcluctor ~rRIL 1118 CD . CIl ~ . INS&154 N.ChanRel 12&.by.& Bit RAM Input/Outriit RAM 1/0 Z :r m General Description Features The RAM Input/Output Chip if'.' LSI device wh/ch provides random access memor' Peripheral interfacing for microcomputer

Contextual Info: November 1989 Edition 1.1 FUJITSU DATASHEET MB81C1002-70/-80/-10/-12 CMOS 1,048,576 BIT STATIC COLUMN MODE DYNAMIC RAM CMOS 1,048,576 X 1 BIT Static Column Mode Dynamic RAM The Fujitsu MB81C1002 is CMOS fully decoded dynamic RAM organized as 1,048,576 words x 1

T3A3

Contextual Info: November 1989 Edition 1.1 — = FUJITSU DATASHEET MB81C1002-70/-80/-10/-12 CMOS 1,048,576 BIT STATIC COLUMN MODE DYNAMIC RAM CMOS 1,048,576 X 1 BIT Static Column Mode Dynamic RAM The Fujitsu M B81C 1002 is CMOS fuHy decoded dynamic RAM organized as 1,046,576 words x 1

2102 Static RAM

Abstract: 2102L2
Contextual Info: Extended Temperature Range Supplement 2 1 0 2 / 2102L 1024 x 1 Static RAM MOS Memory Products Description The 2102 family consists of 1024-word by 1-bit static Random Access re a d /w rite Memories RAM that require a single 5 V supply, have fully TTL-compatible

intel 2102a

Abstract: 2102AL
Contextual Info: 2102A, 2102AL/8102A-4* 1K x 1 BIT STATIC RAM RAM P/N 2102AL-4 2102AL 2102AL-2 2102A-2 j i m 2102A-4 Operating Pwr. mW 174 174 342 342 289 289 Standby Pwr. (mW) 35 35 42 - - 5 Volts Supply Voltage SinglejHSJ/oits TDirectly TTL Compatible: All

I486

Abstract: KS84C31 KS84C32 MC68030 MC68040 RSC18 schematic diagram samsung led
Contextual Info: DYNAMIC RAM CONTROLLERS KS84C31/32 PRODUCT OVERVIEW FEATURES The Samsung KS84C31 and KS84C32 are high perform­ ance dynamic RAM DRAM controllers. They simplify the interface between the microprocessor and the DRAM array, while also significantly reducing the required de­

68030

Abstract: Motorola 68030 I486 KS84C31 KS84C32 MC68030 MC68040 tr4l Samsung KS84C32 68030 80486 microprocessor circuit diagram
Contextual Info: DYNAMIC RAM CONTROLLERS KS84C31/32 PRODUCT OVERVIEW FEATURES The Samsung KS84C31 and KS84C32 are high perform­ ance dynamic RAM DRAM controllers. They simplify the interface between the microprocessor and the ORAM array, while also significantly reducing the required de­

2102-2 RAM

Abstract: RAM 2102
Contextual Info: 2 1 0 2 /2 1 0 2 L /2 1 L 0 2 1024 x 1 Static RAM MOS Memory Products Description The 2102 family consists of 1024-word by 1-bit static Random Access re a d /w rite Memories RAM that require a single 5 V supply, have fully TTL-compatible inputs and output, and require no clocking or refresh.

Contextual Info: KS84C31/32 DYNAMIC RAM CONTROLLERS FEATURES PRODUCT OVERVIEW • 40 MHz operation The Samsung KS84C31 and KS84C32 are high perform­ ance dynamic RAM DRAM controllers. They simplify the interface between the microprocessor and the DRAM array, while also significantly reducing the required de­

Contextual Info: DS1742 Y2KC Nonvolatile Timekeeping RAM FEATURES • •          Integrated NV SRAM, Real-Time Clock, Crystal, Power-Fail Control Circuit and Lithium Energy Source Clock Registers are Accessed Identically to the Static RAM; These Registers are

BT-308

Abstract: ADSP21062 2111 ram BB128 2164 RAM 2101 ram 1kx16 AD14060
Contextual Info: DSP and MIXED SIGNAL PROCESSORS MODEL MODEL MODEL MIPS CYLCE CLK TIME IN nsec MHZ PROGRAM RAM ROM DATA RAM CACHE SERIAL HOST PORTS PORT Vcc +3.3V TEMPERATURE RANGE 0>70 -25/85 -55/125 # Pins FIXED POINT Highest Performance: Concurrent Signal Processing ADSP

Contextual Info: DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers www.maxim-ic.com FEATURES • PIN CONFIGURATIONS 80C32-Compatible TOP VIEW 8051 Pin and Instruction Set Compatible Four 8-Bit I/O Ports Three 16-Bit Timer/Counters 256 Bytes Scratchpad RAM Addresses 64kB ROM and 64kB RAM

Contextual Info: DS1742 Y2KC Nonvolatile Timekeeping RAM FEATURES • •          PIN CONFIGURATION Integrated NV SRAM, Real-Time Clock, Crystal, Power-Fail Control Circuit and Lithium Energy Source Clock Registers are Accessed Identically to the Static RAM; These Registers are

MB81C1001-12

Abstract: MB81C1001-10 81C100 81c1001 MB81C1001 MB81C1001-70 MB81C1001-80 EI96
Contextual Info: February 1990 Edition 3.0 FUJITSU MB81C100 1 -70/-80/-10/-12 CMOS 1,048,576 BIT NIBBLE MODE DYNAMIC RAM CMOS 1M x 1 Bit Nibble Mode DRAM The Fujitsu MB81C1001 is a CMOS, fully decoded dynamic RAM organized as 1,048,576 words x 1 bit. The MB81C1001 has been designed for mainframe

MB8101

Abstract: MB81C1001-10 RBS 2106 equivalent RBS 2107
Contextual Info: February 1990 Edition 3.0 FUJITSU DATA SHEET MB81C1001-70/-80/-10/-12 CMOS 1,048,576 BIT NIBBLE MODE DYNAMIC RAM CMOS 1M x 1 Bit Nibble Mode DRAM The Fujitsu MB81C1001 is a CMOS, fully decoded dynamic RAM organized as 1,048,576 words x 1 bit. The MB81C1001 has been designed for mainframe

Contextual Info: February 1990 Edition 3.0 FUJITSU DATA SHEET : MB81C1001-70/-80/-10/-12 CMOS 1,048,576 BIT NIBBLE MODE DYNAMIC RAM CMOS 1M x 1 Bit Nibble Mode DRAM The Fujitsu MB81C1001 is a CMOS, fully decoded dynamic RAM organized as 1,048,576 words x 1 bit. The MB81C1001 has been designed for mainframe

Contextual Info: ISSI IS62C1024 128K x 8 HIGH-SPEED CMOS STATIC RAM JULY1996 FEATURES DESCRIPTION • High-speed access time: 35, 45, 55, 70 ns The ISSI IS62C1024 is a low power,131,072-word by 8-bit CMOS static RAM. It is fabricated using ISSI's highperformance CMOS technology. This highly reliable process

Contextual Info: MITSUBISHI LSIs M5M5408AFP,TP,RT-55L, -70L,-10L, -55LL,-70LL,-1 OLL P R E L 1W » ^?Y 4194304-BIT 524288-WORD BY 8-BIT CMOS STATIC RAM DESCRIPTION The M5M5408A is a 4194304-blt CMOS Static RAM organized as 524288-word by 8-bit. This device is fabricated using Mitsubishi's

2102 Static RAM

Abstract: L7C161PC
Contextual Info: LOGIC DEVICES INC 2bE D • SSbSTGS 00G107S G ■ -0 ? 4K x 4 CMOS Cache-Tag Static RAM FEATURES □ 4K x 4 CMOS Static RAM with 4-bit Tag Comparison Logic □ High Speed Address-to-MATCH — 10 ns maximum □ Totem Pole L7C180 or Open Drain (L7C181) MATCH Output

RAM 2102

Contextual Info: MITSUBISHI LSIs MH1M64CPJ,CNPJ-5,-6,-7 FAST PAGE MODE 67108846-BIT 1048576 WORD BY 64-BIT DYNAMIC RAM DESCRIPTION The M H1M 64CPJ,CNPJ is a 1048576 word x 64-BIT dynamic RAM and consists of 16 industry standard 1M x4 dynamic RAMs in SOJ and two industry standard input buffers in SSOP.

2102 Static RAM

Abstract: 2102 Ram RAM 2102 2102 2102-2 RAM I2102 21l0 21L02 2102L2 2102LH
Contextual Info: 2 1 0 2 /2 1 0 2 L /2 1 L 0 2 1024 x 1 Static RAM M O S M em ory P ro d u cts Logic Sym bol D escrip tio n The 2102 fa m ily c o n s is ts of 1024-w ord by 1-bit s ta tic Random A c c e s s re a d /w rite M em o rie s RAM th a t req u ire a single 5 V supply, have fully T T L -com p a tib le

MEC0384V1-0000-A99

Abstract: 94v-0 RoHS
Contextual Info: SUNON / SPECIFICATION FOR APPROVAL V J CUSTOMER MOTOR TYPE DESCRIPTION MagLev Motor Fan DIMENSIONS 120X120X38 ram MODEL MEC0384V1-0000-A99 SUNON SPEC. NO. D12012760G-00 CUSTOMER APPROVAL NO.

sunon fan

Abstract: MEC0252V3-0000-A99 e1070 5vdc sunon fan
Contextual Info: SUNON /• \ SPECIFICATION FOR APPROVAL CUSTOMER MOTOR TYPE laMIBroiïMi DESCRIPTION MagLev Motor Fan DIMENSIONS 120X120X25 ram MODEL MEC0252V3-0000-A99 SUNON SPEC. NO. D12012090G-00 CUSTOMER APPROVAL NO.