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    QPSK MODULATOR VHDL CODE Search Results

    QPSK MODULATOR VHDL CODE Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    SF-10GSFPPLCL-000
    		Amphenol Cables on Demand Amphenol SF-10GSFPPLCL-000 SFP+ Optical Module - 10GBASE-SR (up to 300m/984') SFP+ Multimode Optical Transceiver Module (Duplex LC Connectors) - Cisco & HP Compatible PDF
    SF-SFP28LPB1W-0DB
    		Amphenol Cables on Demand Amphenol SF-SFP28LPB1W-0DB SFP28 Loopback Adapter Module for SFP28 Port Compliance Testing - 0dB Attenuation & 1W Power Consumption PDF
    SF-SFPPLOOPBK-0DB
    		Amphenol Cables on Demand Amphenol SF-SFPPLOOPBK-0DB SFP+ Loopback Adapter Module for SFP+ Port Compliance Testing - 0dB Attenuation & 0W Power Consumption PDF
    SF-SFPPLOOPBK-003.5
    		Amphenol Cables on Demand Amphenol SF-SFPPLOOPBK-003.5 SFP+ Loopback Adapter Module for SFP+ Port Compliance Testing - 3.5dB Copper/Optical Cable Emulation PDF
    SF-SFP28LPB1W-3DB
    		Amphenol Cables on Demand Amphenol SF-SFP28LPB1W-3DB SFP28 Loopback Adapter Module for SFP28 Port Compliance Testing - 3dB Attenuation & 1W Power Consumption PDF

    QPSK MODULATOR VHDL CODE Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    vhdl code for ofdm

    Abstract: ofdm matlab simulation block prbs generator using vhdl vhdl code for 16 prbs generator vhdl code for pseudo random sequence generator vhdl code for block interleaver vhdl code for interleaver ofdm code in vhdl vhdl code for ofdm transmitter DVB-T modulator
    Contextual Info: MW_DVB-T/H DVB Terrestrial/Handheld Modulator Core February 5, 2008 Product Specification AllianceCORE Facts Provided with Core Documentation S.r.l. User Guide Design File Formats VHDL synthesizable source code, NGC implementation file MindWay S.r.l. Constraints Files


    Original     		vhdl code for ofdmofdm matlab simulation blockprbs generator using vhdlvhdl code for 16 prbs generator+6vhdl code for pseudo random sequence generatorvhdl code for block interleavervhdl code for interleaverofdm code in vhdlvhdl code for ofdm transmitterdvb-t modulator PDF

    vhdl code for ofdm

    Abstract: vhdl code for ofdm transmitter OFDM Matlab code ofdm code in vhdl OFDM QPSK simulation OFDM matlab program CODES VHDL PROGRAM for ofdm vhdl code for 8 point ifft in xilinx simulation for prbs generator in matlab vhdl code for block interleaver
    Contextual Info: MW_DVB-T/H_P DVB Terrestrial/Handheld Modulator Core February 5, 2008 Product Specification AllianceCORE Facts Provided with Core Documentation S.r.l. User Guide Design File Formats VHDL synthesizable source code, NGC implementation file MindWay S.r.l. Constraints Files


    Original     		vhdl code for ofdmvhdl code for ofdm transmitterofdm matlab codeofdm code in vhdl+6ofdm qpsk simulationofdm matlab program codesvhdl program for ofdmvhdl code for 8 point ifft in xilinxsimulation for prbs generator in matlabvhdl code for block interleaver PDF

    GSM 900 simulink matlab

    Abstract: verilog code for ofdm transmitter fir filter coding for gui in matlab digital IIR Filter VHDL code digital IIR Filter verilog code qpsk modulation VHDL CODE vhdl code for ofdm transmitter vhdl code for ofdm turbo codes qam system matlab code qpsk demapper VHDL CODE
    Contextual Info: Signal Processing IP Megafunctions Signal Processing Solutions for System-on-a Programmable-Chip Designs May 2001 Signal Processing IP: Proven Performance in One Portfolio performance, high-throughput signal coding schemes, W processing algorithms. ireless and digital signal processing DSP


    Original     		m-gb-signal-01gsm 900 simulink matlabverilog code for ofdm transmitterfir filter coding for gui in matlab+7digital iir filter vhdl codedigital iir filter verilog codeqpsk modulation vhdl codevhdl code for ofdm transmittervhdl code for ofdmturbo codes qam system matlab codeqpsk demapper vhdl code PDF

    vhdl code for lte channel coding

    Abstract: vhdl code CRC for lte qpsk modulation VHDL CODE MODULATOR ofdm 64-qam lte mimo 16 bit qpsk VHDL CODE channel equalization MIMO ofdm modulator LTE baseband LTE antenna design
    Contextual Info: Agilent EEsof EDA • W1910 LTE Baseband Verification Library • W1912 LTE Baseband Exploration Library Baseband PHY Libraries for SystemVue Datasheet Turbocharge Your 3GPP LTE PHY Design Process How do you really know that your algorithm is interoperable with


    Original     		w1910w1912w1910ep/etw1912et+115990-4283envhdl code for lte channel codingvhdl code crc for lteqpsk modulation vhdl codemodulator ofdm 64-qam ltemimo16 bit qpsk vhdl codechannel equalization mimoofdm modulatorlte basebandlte antenna design PDF

    vhdl code for cordic cosine and sine

    Abstract: verilog code to generate sine wave vhdl code to generate sine wave verilog code for CORDIC to generate sine wave CORDIC to generate sine wave qpsk modulation VHDL CODE verilog code for cordic algorithm sine cosine VHDL code for CORDIC to generate sine wave vhdl code for cordic algorithm matlab code to generate sine wave using CORDIC
    Contextual Info: NCO Compiler MegaCore Function Solution Brief 49 September 2000, ver. 1.0 Target Applications: Data Storage and Retrieval Systems, Modulators, Demodulators, and Digital PLLs Features • ■ Family: APEXTM 20K, ACEXTM, FLEX 10, FLEX 8000, and FLEX 6000 ■


    Original     		vhdl code for cordic cosine and sineverilog code to generate sine wavevhdl code to generate sine waveverilog code for cordic to generate sine wave+6cordic to generate sine waveqpsk modulation vhdl codeverilog code for cordic algorithm sine cosinevhdl code for cordic to generate sine wavevhdl code for cordic algorithmmatlab code to generate sine wave using cordic PDF

    TUTORIALS xilinx FFT

    Abstract: 16 QAM modulation verilog code Xilinx usb2 cable Schematic Xilinx usb cable Schematic qpsk implementation using verilog xilinx mp3 vhdl decoder CODE VHDL TO ISA BUS INTERFACE FPGA based dma controller using vhdl VHDL code of DCT by MAC VHDL CODE FOR HDLC controller
    Contextual Info: White Paper: Spartan-II R WP137 v1.0 March 21, 2001 Summary Intellectual Property (IP) Cores for Home Networking Author: Amit Dhir Spartan -II FPGAs, programmed with IP cores, enable home networking products. Xilinx develops IP cores and partners with third-party IP providers to provide customers with a suite


    Original     		wp137tutorials xilinx fft16 qam modulation verilog codexilinx usb2 cable schematic+7xilinx usb cable schematicqpsk implementation using verilogxilinx mp3 vhdl decodercode vhdl to isa bus interfacefpga based dma controller using vhdlvhdl code of dct by macvhdl code for hdlc controller PDF

    lms algorithm using verilog code

    Abstract: lms algorithm using vhdl code ATM machine working circuit diagram using vhdl verilog code for lms adaptive equalizer verilog code for lms adaptive equalizer for audio digital IIR Filter VHDL code 8086 microprocessor based project verilog DTMF decoder qpsk demodulation VHDL CODE verilog code for fir filter using DA
    Contextual Info: AMPP Catalog June 1998 About this Catalog June 1998 AMPP Catalog Contents This catalog provides information on Altera Megafunction Partners Program AMPPSM partners and provides descriptions of megafunctions from each AMPP partner. The information in this catalog is current as of


    Original     		lms algorithm using verilog codelms algorithm using vhdl codeatm machine working circuit diagram using vhdlverilog code for lms adaptive equalizer+6verilog code for lms adaptive equalizer for audiodigital iir filter vhdl code8086 microprocessor based projectverilog dtmf decoderqpsk demodulation vhdl codeverilog code for fir filter using da PDF

    X9013

    Abstract: verilog hdl code for encoder verilog code for pseudo random sequence generator in digital FIR Filter verilog code polyphase prbs generator using vhdl vhdl code for pseudo random sequence generator in QPSK using xilinx 171OCT
    Contextual Info: DVB Satellite Modulator Core April 19, 1999 Product Specification AllianceCORE Maria Aguilar, Project Coordinator Memec Design Services 1819 S. Dobson Rd., Suite 203 Mesa, AZ 85202 Phone: +1 888-360-9044 in the USA +1 602-491-4311 (international) Fax: +1 602-491-4907


    Original     		x9013verilog hdl code for encoderverilog code for pseudo random sequence generator indigital fir filter verilog code polyphase+4prbs generator using vhdlvhdl code for pseudo random sequence generator inqpsk using xilinx171oct PDF

    vhdl code for 16 prbs generator

    Abstract: verilog code for pseudo random sequence generator in qpsk modulation VHDL CODE 0x47 EN-300-421 Convolutional vhdl code for pseudo random sequence generator interleaver by vhdl digital FIR Filter VHDL code verilog hdl code for parity generator
    Contextual Info: DVB Satellite Modulator Core January 10, 2000 Product Specification AllianceCORE 7810 South Hardy Drive, Suite 104 Tempe, Arizona 85284 USA Phone: +1 888-845-5585 USA +1 480-753-5585 Fax: +1 480-753-5899 E-mail: info@memecdesign.com URL: www.memecdesign.com


    Original     		vhdl code for 16 prbs generatorverilog code for pseudo random sequence generator inqpsk modulation vhdl code0x47+6en-300-421convolutionalvhdl code for pseudo random sequence generatorinterleaver by vhdldigital fir filter vhdl codeverilog hdl code for parity generator PDF

    EPM7128STC100-15

    Abstract: EPF10K50RI240-4 ALTERA MAX EPM7128SQC100-15 EPF10K10LC84-3 qpsk modulation VHDL CODE 304 QFP amkor ALTERA EPF10K50RI240-4 MAX7000S EPF10K10LC84-4 EPF10K20A
    Contextual Info: Newsletter for Altera Customers ◆ First Quarter ◆ February 1997 FLEX Devices: The Gate Array Alternative Altera’s FLEX 10K and FLEX 8000 devices combine the flexibility of programmable logic devices PLDs with the density and efficiency of gate arrays. As PLD unit


    Original     		epm7128stc100-15epf10k50ri240-4altera max epm7128sqc100-15epf10k10lc84-3+6qpsk modulation vhdl code304 qfp amkoraltera epf10k50ri240-4max7000sepf10k10lc84-4epf10k20a PDF

    soft 16 QAM modulation matlab code

    Abstract: qpsk demapper VHDL CODE 16 QAM modulation verilog code 16 QAM modulation matlab code vhdl code for bpsk demodulation verilog code for oqpsk modulator 16qam demapper VHDL CODE BPSK modulation VHDL CODE simulink 16QAM pulse amplitude modulation matlab code
    Contextual Info: Constellation Mapper/Demapper MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 408 544-7000 http://www.altera.com Core Version: Document Version: Document Date: 2.0.0 2.0 rev. 1 July 2002 Copyright Constellation Mapper/Demapper MegaCore Function User Guide


    Original     		soft 16 qam modulation matlab codeqpsk demapper vhdl code16 qam modulation verilog code16 qam modulation matlab code+6vhdl code for bpsk demodulationverilog code for oqpsk modulator16qam demapper vhdl codebpsk modulation vhdl codesimulink 16qampulse amplitude modulation matlab code PDF

    digital FIR Filter verilog code

    Abstract: FIR filter matlaB design FIR filter matlaB simulink design verilog code for decimation filter verilog code for interpolation filter verilog code for linear interpolation filter digital FIR Filter VHDL code FIR Filter matlab VHDL code for polyphase decimation filter using D FIR Filter verilog code
    Contextual Info: FIR Compiler MegaCore Function February 2001 User Guide Version 2.1 101 Innovation Drive San Jose, CA 95134 408 544-7000 http://www.altera.com A-UG-FIRCOMPILER-2.1 FIR Compiler MegaCore Function User Guide Altera, ACEX, APEX, APEX 20K, FLEX, FLEX 10KE, MAX+PLUS II, MegaCore, MegaWizard, OpenCore, and Quartus are


    Original     		digital fir filter verilog codefir filter matlab designfir filter matlab simulink designverilog code for decimation filter+6verilog code for interpolation filterverilog code for linear interpolation filterdigital fir filter vhdl codefir filter matlabvhdl code for polyphase decimation filter using dfir filter verilog code PDF

    free vHDL code of median filter

    Abstract: free verilog code of median filter verilog code for UART with BIST capability verilog code for 2D linear convolution rx UART AHDL design verilog code for 2D linear convolution filtering vhdl median filter verilog code for median filter 8051 interface ppi 8255 vhdl code direct digital synthesizer
    Contextual Info: AMPP Catalog February 1997 About this Catalog February 1997 AMPP Catalog Contents This catalog describes the Altera® Megafunction Partners Program AMPP . The catalog also provides megafunction descriptions and partner profiles for each AMPP partner. The information in this catalog is


    Original     		free vhdl code of median filterfree verilog code of median filterverilog code for uart with bist capabilityverilog code for 2d linear convolution+6rx uart ahdl designverilog code for 2d linear convolution filteringvhdl median filterverilog code for median filter8051 interface ppi 8255vhdl code direct digital synthesizer PDF

    verilog code for 2D linear convolution

    Abstract: verilog code for GPS correlator vhdl code numeric controlled oscillator pipeline rx UART AHDL design verilog code car parking free verilog code of median filter verilog code for 2D linear convolution filtering verilog code for median filter 16 QAM modulation verilog code LED Dot Matrix vhdl code
    Contextual Info: AMPP Catalog February 1997 AMPP Catalog February 1997 M-CAT-AMPP-02 Altera, AHDL, AMPP, OpenCore, MAX, MAX+PLUS, MAX+PLUS II, FLEX, FLEX 10K, FLEX 8000, MAX 9000, MAX 7000, EPF10K10, EPF10K20, EPF10K30, EPF10K40, EPF10K50, EPF10K70, EPF10K100, EPF8282, EPF82828A, EPF8452, EPF8452A, EPF8636A, EPF8820, EPF8820A, EPF8118,


    Original     		m-cat-ampp-02epf10k10epf10k20epf10k30+16epf10k40epf10k50epf10k70epf10k100epf8282epf82828averilog code for 2d linear convolutionverilog code for gps correlatorvhdl code numeric controlled oscillator pipelinerx uart ahdl designverilog code car parkingfree verilog code of median filterverilog code for 2d linear convolution filteringverilog code for median filter16 qam modulation verilog codeled dot matrix vhdl code PDF

    circuit diagram wireless spy camera

    Abstract: interfacing 8051 with 300 GSM Modem datasheet PIC Microcontroller GSM Modem cash box guard project with procedure pmb 4220 interfacing 8051 with GSM Modem Siemens pmb 4220 pbc 05 ericsson Marking Code SMD databook gsm coding in c for 8051 microcontroller
    Contextual Info: Contents Page Introduction . Quality Assurance . Page 3 Package Information 4 Summary of Types in Alphanumerical Order Mobile Communication ICs . 208 . 209 .


    Original     		d-81671circuit diagram wireless spy camerainterfacing 8051 with 300 gsm modem datasheetpic microcontroller gsm modem+7cash box guard project with procedurepmb 4220interfacing 8051 with gsm modemsiemens pmb 4220pbc 05 ericssonmarking code smd databookgsm coding in c for 8051 microcontroller PDF

    digital FIR Filter verilog code

    Abstract: digital FIR Filter VHDL code verilog code for decimation filter verilog code for fir filter FIR Filter matlab verilog code for interpolation filter low pass Filter VHDL code fir filter coding for gui in matlab FIR Filter verilog code FIR filter matlaB design
    Contextual Info: FIR Compiler User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com Software Version: Document Date: 10.0 July 2010 Copyright 2010 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other


    Original     		digital fir filter verilog codedigital fir filter vhdl codeverilog code for decimation filterverilog code for fir filter+6fir filter matlabverilog code for interpolation filterlow pass filter vhdl codefir filter coding for gui in matlabfir filter verilog codefir filter matlab design PDF

    code fir filter in vhdl

    Abstract: digital FIR Filter verilog HDL code low pass fir Filter VHDL code verilog code for linear interpolation filter 16 QAM adaptive modulation matlab verilog code for distributed arithmetic verilog code for interpolation filter VHDL code for polyphase decimation filter fixed point fir filter on matlab verilog coding for fir filter
    Contextual Info: FIR Compiler User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com Software Version: Document Date: 11.0 May 2011 Copyright 2011 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other


    Original     		code fir filter in vhdldigital fir filter verilog hdl codelow pass fir filter vhdl codeverilog code for linear interpolation filter+616 qam adaptive modulation matlabverilog code for distributed arithmeticverilog code for interpolation filtervhdl code for polyphase decimation filterfixed point fir filter on matlabverilog coding for fir filter PDF

    verilog code for parallel fir filter

    Abstract: 3 tap fir filter based on mac vhdl code FIR Filter matlab low pass fir Filter VHDL code vhdl code hamming VHDL code for FIR filter fir filter coding for gui in matlab 16 QAM modulation verilog code VHDL code for polyphase decimation filter using D QPSK Modulator VHDL COde
    Contextual Info: FIR Compiler User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com Software Version: Document Date: 9.1 November 2009 Copyright 2009 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo, specific device designations, and all other


    Original     		verilog code for parallel fir filter3 tap fir filter based on mac vhdl codefir filter matlablow pass fir filter vhdl code+6vhdl code hammingvhdl code for fir filterfir filter coding for gui in matlab16 qam modulation verilog codevhdl code for polyphase decimation filter using dqpsk modulator vhdl code PDF

    vhdl code for ofdm transceiver using QPSK

    Abstract: soft 16 QAM modulation matlab code verilog code for ofdm transmitter dac 0808 interfacing with 8051 microcontroller vhdl code for ofdm transmitter VHDL PROGRAM for ofdm turbo codes matlab simulation program 16 QAM adaptive modulation matlab E1 pdh vhdl uart 16750
    Contextual Info: Intellectual Property Selector Guide IP Functions for System-on-a-Programmable-Chip Solutions March 2003 Contents • Introduction to Altera IP Megafunctions Page 3 • DSP Solutions Page 5 • Communications Solutions Page 11 • Microsystems Solutions Page 16


    Original     		arm922tvhdl code for ofdm transceiver using qpsksoft 16 qam modulation matlab codeverilog code for ofdm transmitter+7dac 0808 interfacing with 8051 microcontrollervhdl code for ofdm transmittervhdl program for ofdmturbo codes matlab simulation program16 qam adaptive modulation matlabe1 pdh vhdluart 16750 PDF

    tda7366

    Abstract: sanyo colour tv circuit diagram TELEVISION EHT TRANSFORMERS ACOUSTIC SOLUTIONS C2 DAB Clock Radio instruction Philips fl1236 sharp UHF/VHF TV Tuner Philips TV tuners UHF/VHF TV Tuner sharp TDA6320T step -syn sanyo motor
    Contextual Info: 11551 new cover Multimedia 23/9/97 5:31 PM Page 2 Semiconductors for Multimedia PC Designer’s guide - October 1996 Philips Semiconductors 1 MULTIMEDIA PC DESIGNER’S GUIDE Contents Section 1 2 3 4 5 6 7 Page Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3


    Original     		tda8790tda9850tda9852tda9855+16tea5582tea5757h/5759htea6320/1/2/3tea6360tza1015uaa3201ttda7366sanyo colour tv circuit diagramtelevision eht transformersacoustic solutions c2 dab clock radio instructionphilips fl1236sharp uhf/vhf tv tunerphilips tv tunersuhf/vhf tv tuner sharptda6320tstep -syn sanyo motor PDF

    GMSK simulink

    Abstract: xilinx digital Pre-distortion GSM 900 simulink matlab GMSK modulation demodulation simulink block diagram gmsk modulation matlab RPR vhdl code gsm call flow simulink Multichannel Digital Downconverter receiver for an mri scan using matlab simulink verilog code for dpd XAPP1113
    Contextual Info: Application Note: Virtex-5 Family Designing Efficient Digital Up and Down Converters for Narrowband Systems R XAPP1113 v1.0 November 21, 2008 Summary Author: Stephen Creaney and Igor Kostarnov Digital Up Converters (DUC) and Digital Down Converters (DDC) are key components of RF


    Original     		xapp1113gmsk simulinkxilinx digital pre-distortiongsm 900 simulink matlab+6gmsk modulation demodulation simulink block diagramgmsk modulation matlabrpr vhdl codegsm call flow simulinkmultichannel digital downconverter receiver for an mri scan using matlab simulinkverilog code for dpd PDF

    verilog code for 8 bit carry look ahead adder

    Abstract: EPM7128 EPLD verilog code for lms adaptive equalizer Embedded Programming using the 8051 and Jam Byte lms algorithm using vhdl code altera EPM7032S EPF10K200E epf10k50v EPF6024AQI208-3 EP20K400
    Contextual Info: Newsletter for Altera Customers ◆ First Quarter ◆ February 1999 FLEX 10KE Devices Meet the 66-MHz/64-Bit PCI Compliance Challenge The Altera FLEX® 10KE family meets the 66-MHz/64-bit peripheral component interconnect PCI compliance challenge. Flexibility and density


    Original     		66-mhz/64-bit66-mhz64-bitverilog code for 8 bit carry look ahead adder+9epm7128 epldverilog code for lms adaptive equalizerembedded programming using the 8051 and jam bytelms algorithm using vhdl codealtera epm7032sepf10k200eepf10k50vepf6024aqi208-3ep20k400 PDF

    ECG transistor replacement guide book free

    Abstract: 6v to 12v converter mini project ISA pressure transmitter data sheet SCR c106 PIN CONFIGURATION ZENER Diode b212 vhdl code 8 bit LFSR Project Report of fire alarm using IC 555 doc 12V convert to 3.7V vhdl code 16 bit LFSR sw dip-4
    Contextual Info: C O M M U N I C AT I O N S P R O D U C T S S E L E C T O R G U I D E Device Number B212 B103 B202 CCITT V.21 CCITT V.23 CCITT V.22 CCITT V.22bis Description Power Supply Available Packages +5V +5V +5V +5V +5V 28 DIP, 28 PLCC 22 DIP 22, 28 DIP, 28 PLCC 22 DIP


    Original     		22bis73k212l73k212sl73k221l+1673k221sl73k222l73k222sl73k222u73k224l73k224slecg transistor replacement guide book free6v to 12v converter mini projectisa pressure transmitter data sheetscr c106 pin configurationzener diode b212vhdl code 8 bit lfsrproject report of fire alarm using ic 555 doc12v convert to 3.7vvhdl code 16 bit lfsrsw dip-4 PDF

    pure sine wave dimmer

    Abstract: philips ingenuity ct transistor smd DAG heart beat sensor using led and ldr north american philips controls stepper motor CPLD Complex Programmable Logic Devices vhdl code for msk modulation fm transistor radio mini project ccga motorola biphase mark vhdl
    Contextual Info: Analog Devices’ Glossary of Analog Terminology □ ANALOG DEVICES Analog Devices’ Glossary of Analog Terminology ANALOG DEVICES □ Words are included in this book on the basis of their usage. Words that are known to have current trademarks include appropriate


    OCR Scan     		10base-510base-t16-bit32-bit+1148-bitpure sine wave dimmerphilips ingenuity cttransistor smd dagheart beat sensor using led and ldrnorth american philips controls stepper motorcpld complex programmable logic devicesvhdl code for msk modulationfm transistor radio mini projectccga motorolabiphase mark vhdl PDF