QED RM5200 Search Results

QUANTUM CAPACITIVE

Abstract: Quantum Effect Devices GVT7164T18 MCM69T618 R5000 RM5200 RM5271 RM7000 qed rm5200 mips r5000
Contextual Info: External Cache for the RM5271 Application Note Introduction Quantum Effect Devices, Inc. QED was founded in 1991 to design and develop MIPS RISC microprocessors to MIPS Technologies, Inc. (MTI) specifications. MTI sub-licensed those designs to MIPS licensees. In 1996 QED obtained a license

7000SC

Abstract: Tag 225 600 replacement SCD7000 R5000 mips R4650 RM5261 RM7000 7000sc210f17 CQFP 240 Aeroflex
Contextual Info: Standard Products ACT 7000SC 64-Bit Superscaler Microprocessor www.aeroflex.com/Avionics October 9, 2009 FEATURES • ■ Full militarized QED RM7000 microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance

7000SC

Abstract: 17-FP
Contextual Info: Standard Products ACT 7000SC 64-Bit Superscaler Microprocessor June 16, 2004 FEATURES • ■ Full militarized QED RM7000 microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance

R4650

Abstract: RM5261 RM7000
Contextual Info: ACT 7000SC 64-Bit Superscaler Microprocessor Features • Full militarized QED RM7000 microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance ■ ● ● ● ● 150, 200, 210, 225 MHz operating frequency

7000SC

Contextual Info: ACT 7000SC 64-Bit Superscaler Microprocessor Features • Full militarized QED RM7000 microprocessor Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance ■ ● ● ● ● 150, 200, 210, 225 MHz operating frequency

cpu aeroflex

Abstract: CQFP 240 Aeroflex R4400 RM5271 military mcm cpu
Contextual Info: ACT-5271SC Multichip Module Microprocessor with 2MB Secondary Cache Features • ■ ■ ■ ■ ■ ■ ■ ■ Footprint Compatible with Aeroflex’s original ACT-4431SC 1MB Secondary Cache MCM in the 280 lead Ceramic Quad Flat Pack CQFP QED RM5271 Dual Issue superscalar microprocessor - can issue one integer and one

RM5200

Abstract: MIC29302 footprint 304-SBGA Quantum Effect Devices vero PK100 IPC-D-317B QUANTUM CAPACITIVE LT1085CT LT1584 qed rm5200
Contextual Info: PCB Design Notes for the RM7000 Application Note Introduction The RM7000 is a 64-bit MIPS IV Instruction Set Architecture CPU with 48/64-entry TLB memory management unit, double precision floating point unit, a 64-bit multiplexed address and data bus which is capable of operating at up to 125 MHz .

5271SC

Abstract: military mcm 1553 military mcm cpu R4400 RM5271
Contextual Info: Standard Products ACT5271SC Multichip Module Microprocessor with 2MB Secondary Cache www.aeroflex.com/Avionics May 5, 2005 FEATURES ❑ Footprint Compatible with Aeroflex-Plainview original ACT4431SC 1MB Secondary Cache MCM in a 280 lead Ceramic Quad Flat Pack CQFP

qed rm5200

Contextual Info: RM5271 Microprocessor with External Cache Interface Document Rev. 1.3 Date: 02/2000 FEATURES • High-performance floating point unit - up to 700 MFLOPS — Single cycle repeat rate for common single precision operations and some double precision operations

RM5271

Abstract: RM5200 rm5270 R4700 R5000 31x31 RM5271-200S qed rm5200
Contextual Info: RM5271 Superscalar Microprocessor with External Cache Interface FEATURES • Dual Issue superscalar microprocessor — 200, 225, 250, 266, 300, 350 MHz operating frequencies — 420 Dhrystone 2.1 MIPS maximum — SPECInt95 7.3, SPECfp95 8.3 maximum • High-performance system interface

RM5200

Abstract: R4000 MICROPROCESSOR RM7000-263S R4000 R4700 R5000 RM5271 RM7000 Tag 225 600 replacement qed rm5200
Contextual Info: RM7000 Superscalar Dual-Issue Microprocessor with On-Chip L2 Cache FEATURES • Dual Issue symmetric superscalar microprocessor with instruction prefetch optimized for system level price/performance — 200, 225, 250, 263, 300 MHz operating frequency — >500 Dhrystone 2.1 MIPS @ 300 MHz

R5000

Abstract: RM5200 RM5261 RM5720 RM7000 qed rm5200 RM5720-internal
Contextual Info: RM5720 Integrated 64-Bit CPU and System Controller FEATURES • Dual Issue superscalar microprocessor - can issue one integer and one floating-point instruction per cycle — Up to 250 MHz operating frequency — 300 Dhrystone2.1 MIPS — SPECInt95 4.8, SPECfp95 5.1

RM7065A

Abstract: IPL12 IPL13 R4000 RM5200 RM7000 RM7000A qed rm5200
Contextual Info: RM7065A Microprocessor with On-Chip Secondary Cache Data Sheet Preliminary RM7065A RM7065A™ Microprocessor with OnChip Secondary Cache Data Sheet Preliminary Issue 2, June 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

Contextual Info: RM7000A Microprocessor with On-Chip Secondary Cache Datasheet Preliminary RM7000A RM7000A™ Microprocessor with OnChip Secondary Cache Datasheet Proprietary and Confidential Preliminary Issue 1, January 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

IPL13

Abstract: RM7000A-300T AC13 MCM69T618 RM5200 RM5271 RM7000A
Contextual Info: RM7000A Microprocessor with On-Chip Secondary Cache Data Sheet Released RM7000A RM7000A™ Microprocessor with OnChip Secondary Cache Data Sheet Proprietary and Confidential Released Issue 2, May 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

Contextual Info: RM7000A Microprocessor with On-Chip Secondary Cache Data Sheet Released RM7000A RM7000A™ Microprocessor with OnChip Secondary Cache Data Sheet Proprietary and Confidential Released Issue 3, October 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customers’ Internal Use

Contextual Info: :2 1: 21 PM RM7000A Microprocessor with On-chip Secondary Cache Data Sheet Released n Tu es da y, 24 Ja nu ar y, 20 12 07 RM7000A™ Data Sheet Preliminary Issue No. 5: August 2002 Do wn lo ad ed [c on tro lle d] by Co nt en t Te am of Pa rtm in er In co

RM7000C

Abstract: RM7000A-300T AC13 MCM69T618 RM5200 RM5271 RM7000 RM7000A RM7000C Microprocessor with On-Chip Secondary Cache
Contextual Info: 8: 22 AM RM7000A Microprocessor with On-chip Secondary Cache Data Sheet Released Mo nd ay ,0 6J an ua ry ,2 00 3 03 :2 RM7000A™ Data Sheet Preliminary Issue No. 5: August 2002 Do wn lo ad ed by ah m ed m et wa ly of sil ico ne xp er to n Microprocessor with

Contextual Info: 9: 55 PM RM7000A Microprocessor with On-chip Secondary Cache Data Sheet Released ne sd ay ,2 4M ar ch ,2 00 4 02 :4 RM7000A™ Data Sheet Preliminary Issue No. 5: August 2002 Do wn lo ad ed by Co nt e nt Te a m of P ar tm in er In co n W ed Microprocessor with

qed rm5200

Abstract: RM5200 8250 uart sample c programs GT-64120 R107 qed mips
Contextual Info: e.Card Applications Development Guide This document applies to Version 2.0 of the e.Card software. Please contact UTMC for the latest software release. Visit our web page at http://www.utmc.com/ecard/ Send any documentation and product comments to ecard@utmc.aeroflex.com.

RM5261

Abstract: R4000 R4650 R5000 RM5200 RM5231
Contextual Info: RM5261 Microprocessor with 64-Bit System Bus Data Sheet Released RM5261 RM5261™ Microprocessor with 64-Bit System Bus Data Sheet Proprietary and Confidential Issue 1, March 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

R4000

Abstract: RM5200 RM5261A
Contextual Info: RM5261A Microprocessor with 64-Bit System Bus Data Sheet Preliminary RM5261A™ RM5261A™ Microprocessor with 64-Bit System Bus Data Sheet Proprietary and Confidential Preliminary Issue 1, March 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

RM5231

Abstract: MS-022 R4000 RM5200 ALU of 4 bit adder and subtractor by917
Contextual Info: RM5231 Microprocessor with 32-Bit System Bus Data Sheet Released RM5231 RM5231™ Microprocessor with 32-Bit System Bus Data Sheet Proprietary and Confidential Issue 1, March 2001 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

R4000

Abstract: RM5200 RM5231A
Contextual Info: RM5231A Microprocessor with 32-Bit System Bus Data Sheet Preliminary RM5231A RM5231A™ Microprocessor with 32-Bit System Bus Data Sheet Proprietary and Confidential Preliminary Issue 3, February 2002 Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use