QC C 05 Search Results

LM 4017 decade counter driver

Abstract: 74HC7244A 74HCT7007A 74HC11A 74HC85A 74HC147 decimal to binary encoder cmos 4008 74HC21A 74HC07A 74HC7244
Contextual Info: 2.H IG H SPEED CMOS SELECTION GUIDE NÄ N D NOR A ND OR IN V E R T E R ,B U F FE R 74HC00A 74HCT00A 74HC03A 74HC10A 74HC20A 74HC30 71HC132A 74HC133A GATE 74HC02A 74HCT02A 74HC27A 74HC4002A 74HC4078 74HC08A 74HCT08A 74HC09A 74HC11A 74HC21A 74HC32A 74HCT32A 74HC4072

Contextual Info: TOSHIBA TC74HC595AP/AF/AFN TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC74HC595AP, TC74HC595AF, TC74HC595AFN 8 -BIT SHIFT REGISTER/LATCH 3 -STATE _ (Note) The JEDEC SOP (FN) is not available in _ Japan._

microdot feed-thru connectors

Contextual Info: Coaxial Connectors Standard Connectors — Adapters Feed-Thru Adapters for Screw-On Series A .160 Max. [4.06] Panel A B “X” Hex. “Y” Ø .313 Min. [7.95] B “Y” Hex. Nut B “X” Hex. Mounting Nut Lockwasher Fig. 1 Fig. 2 Part No. Fig. 033-0001-0001

Contextual Info: 54AC11521, 74AC11521 8-BIT IDENTITY COMPARATORS S C A S 0 2 2 A - D2957, JULY 1987 - RE V IS E D APRIL 1993 Compares Two 8-Bit Words 54AC11521 . . . J PACKAGE 74AC11521 . . . DB, DW OH N PACKAGE {TOP VIEW Flow-Through Architecture Optimizes PCB Layout Center-Pin Vc c and GND Configurations

Contextual Info: SN54ALS299, SN74ALS299 8-BIT UNIVERSAL SHIFT/STORAGE REGISTERS WITH 3-STATE OUTPUTS SDAS220B – DECEMBER 1982 – REVISED DECEMBER 1994 • • • • • description These 8-bit universal shift /storage registers feature multiplexed I/O ports to achieve full 8-bit

74AC11013

Contextual Info: E5E li • 6 U 1 7 2 3 D0a4bi4 5 ■ 54AC11013,74AC11013 DUAL 4-INPUT POSITIVE-NAND SCHMITT-TRIGGERS TEXAS INSTR LOGIC SCAS112 - D3481. MARCH 1990 54AC11013 . . . J PACKAG E 7 4 A C 1 1 0 1 3 . . . D O R N PACKAG E Operation From Very Slow Edges Improved Line-Receiving Characteristics

Contextual Info: ¥ it a c h i/ logic/arrays/m em 12 5ËJ n>ntan3 92D H D 74H C393 The H D 7 4 H C 3 9 3 10523 0010523 D • Dual 4-bit Binary Counters contain two 4-bit ripple carry binary | « /3 PIN ARRANG EM ENT counters, which can be cascaded to create a single divide-by256 counter.

Contextual Info: FCT Interface Logic HARRIS S E M I C O N D U C T O R HARRIS RCA GE INTERSIL C D 54/74FC T374, CD54/74FCT374AT C D 54/74FC T534, CD54/74FCT534AT July 1990 D O -D1 -D 2 -D 3 -D 4 -D 5 - D 6 -D 7 - 374 534 - QO QO - 0 1 01 - 0 2

jb distribution

Contextual Info: Series A1000 & Series CB1000 Single Row Terminal Blocks Single & Double Row Filtered Connectors CB10210707 A102206 Euro-MAG Series PCB – Spring Clamp SPECIFICATIONS Rating: 20A, 150V Center Spacing: .325” 8.26 mm Wire Range: #14-22 AWG CU Screw Size: #6-32 zinc plated philslot wire-ready screws

97AB

Abstract: 27C210A 27c210a-12 27C210A-15 27C210A-20 27PC210A-15 TMS27PC210 27PC210A-12 27c210a15
Contextual Info: TMS27C210A1 048 576-BIT UV ERASABLE PROGRAMMABLE READ-ONLY MEMORY TMS27PC210Â1 048 576-BIT PROGRAMMABLE READ-ONLY MEMORY SMLS31OB-NOVEMBER 1990-REVISED NOVEMBER 1992 J PACKAGE TOP VIEW Wlde-Word Organization . . . 64K x 16 Single 5-V Power Supply Operationally Compatible With Existing

SN74ABT329

Contextual Info: SN74ABT329 1-LINE TO 6-LINE CLOCK DRIVER WITH SELECTABLE POLARITY AND CMOS-COMPATIBLE OUTPUTS SCB3036 JA N U A R Y 1991 D PACKAGE TOP VIEW • State-Of-The-Art EPIC-IIB BiCMOS Design Significantly Reduces Power Dissipation GND[ 1 1Y 2[ 2 2Y1 [ 3 • ESD Protection Exceeds 2000 V Per

Contextual Info: THE INFORMATION CONTAINED HEREIN IS CONSIDERED 'PROPRIETARY' TO BEL FUSE INC. AND SHALL NOT BE COPIED, REPRODUCED DR DISCLOSED WITHOUT THE WRITTEN APPROVAL OF BEL FUSE INC. LED PIN 2 & 4 P O L A R IT Y 11 PIN 12 COLOR - + YELLOW + - LED RoHS 2 002/95/E C ^

S882

Abstract: CN16C
Contextual Info: TYPES SN54AS882, SN74AS882 32-BIT LOOK AHEAD CARRY GENERATORS D 2 6 6 1 , DECEMBER 1 9 8 2 -R E V IS E D DECEMBER 1 9 8 3 S N 54A S882 . . . JT PACKAGE S N 74A S882 . . . NT PACKAGE Directly Compatible with the New 'A S 181A and 'A S 881A ALU's TOP VIEW

Contextual Info: TOSHIBA TC51864PL/FL85/10 PR ELIM INARY SILICON GATE CMOS 65,536 WORD x 8 BIT CMOS PSEUDO STATIC RAM Description T h e T C 5 1 8 6 4 P L is a 5 1 2K bit high speed C M O S p se udo static RAM organized as 6 5 ,5 3 6 w o rd s by 8 bits. T h e T C 5 1 8 6 4 P L utilizes

Contextual Info: 1024K 128K X 28F010 8 CMOS FLASH MEMORY • Flash Electrical Chip-Erase — 1 Second Typical Chip-Erase ■ Quick Pulse Programming Algorithm — 10 jus Typical Byte-Program — 2 Second Chip-Program ■ 100,000 Erase/Program Cycles ■ 12.0V ±5% Vpp ■ High-Performance Read

Contextual Info: SIEMENS Mixer/Amplifier PMB 2333 Bipolar IC Preliminary Specification •- Functional Description, Benefits: • New B6HF bipolar technology, 25GHz ft • Small outline T-SSOP 16 package • Reduced external components • Frequency range up to 3.0GHz • Amplifier may be used as LNA or Driver

Contextual Info: int ! PRELIMINARY BYTE-WIDE SMART 3 FlashFile MEMORY FAMILY 4, 8, AND 16 MBIT 28F004S3, 28F008S3, 28F016S3 Includes Commercial and Extended Temperature Specifications SmartVoltage Technology — Smart 3 Flash: 2.7 V or 3.3 V Vcc and 2.7 V, 3.3 V or 12 V V PP

Alla

Abstract: 74AC11191
Contextual Info: 54AC11191, 74AC11191 SYNCHRONOUS 4-BIT UP/DOWN BINARY COUNTERS T I0 1 5 1 — 0 3 4 2 6 , M A R C H 1 9 9 0 54AC11191 . . . J PACKAGE 74AC11191 . . . DW OR N PACKAGE • Single Down/Up Count Control Line • Look-Ahead Circuitry Enhances Speed of Cascaded Counters

HC-622

Contextual Info: TC74HC646AP TC74HC648AP O C T A L B U S T R A N S C E IV E R /R E G IS T E R TC 74H C 646A P N O N -IN V E R T IN G T C 7 4 H C 6 4 8 A P I N V E R T I N G _ T h e T C 7 4 H C 6 4 6 A /6 4 8 A a r e h ig h sp e e d C M O S O C T A L BUS T R A N S C E IV E R /R E G IS T E R s

intel 27010 eprom

Abstract: eprom 27010 27010
Contextual Info: 27010 1M 128K x 8 BYTE-WIDE EPROM • Compatible with 28-Pin JEDEC EPROMs: 27256, 27512 ■ Complete Upgrade Capability — PGM “Don’t Care” Status Allows Wiring in Higher Order Addresses ■ Standard EPROM Features — TTL Compatibility — Two Line Control

Contextual Info: iir tls J W W C T [p ^l¥0i 2-MBIT (128K x 16, 256K x 8 SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 28F200BV-T/B, 28F002BV-T/B, 28F200CV-T/B • Intel SmartVoltage Technology — 5V or 12V Program/Erase — 3.3V or 5V Read Operation — 60% Faster Typical Programming at

Contextual Info: The IDT7203/7204/7205/7206 are dual-port memory buff­ ers with internal pointers that load and empty data on a firstin/first-out basis. The device uses Full and Empty flags to prevent data overflow and underflow and expansion logic to allow for unlimited expansion capability in both word size and

Contextual Info: bq3285E/L UNITRO DE Real-Time Clock RTC Features ► BCD or binary format for clock and calendar data General Description >• Direct clock/calendar replace­ ment for IBM AT-compatible computers and other applications > Calendar in day of the week, day

Contextual Info: in te l 28F016XS 16-MBIT 1-MBIT x 16, 2-MBIT x 8 SYNCHRONOUS FLASH MEMORY Effective 0-W ait-State Perform ance up to 33 MHz l Backward Compatible with 28F016SA/SV, 28F008SA Command-Set Sm artVoltage Technology — User-Selectable 3.3V or 5V V qc — User-Selectable 5V or 12V Vpp