PULSE BUFFER CIRCUIT Search Results

hbx 300 y

Abstract: SR3437B VSOP 28 vsop buffer 300 ma power amplifer circuit diagram
Contextual Info: SR3437B 5 V 2-Channel Write Coil Driver with Read Buffer Prototype DESCRIPTION FEATURES The SR3437B is a BiCMOS monolithic integrated circuit that includes a read buffer amplifer and a 2-channel, double pulse, write driver designed to drive a transformer coupled ferrite head. The read buffer

Contextual Info: bel/defining a degree of excellence DIGITAL DELAY LINE SERIES 0449 TTLPROGRAMMABLE LOGIC DELAY MODULE 3 BIT TECHNICAL INFORMATION TEST CONDITIONS Driving Signal Schottky TTL Buffer Pulse Width 1.5 x Maximum Delay 5 x Pulse Width Pulse Period 50.0 Milliamps

Contextual Info: DC SIGNALING DEVICES M-969 Pulse Dialer Features The Teltone M-969 is a binary-input pulse dialer IC with many enhancements useful for tone-to-pulse conversion. The IC contains a 16 digit FIFO first-in-first-out buffer and controls outpulsing at pin 8 (SZ) at 10 pulses per second with

power supply dc 9 v

Abstract: pulse shaper bipolar
Contextual Info: Standard-Hybrid-Circuits Shaper for preamplifier Type 559-067 The module 559-067 contains a differential input stage, followed by a pulse shaping stage and a separately connectable output buffer stage. The unipolar output pulse shape can be changed to a bipolar shape by adding an external shaping network.

Contextual Info: bel/ defining a degree of excellence DIGITAL DELAY LINE SERIES 0453 ECL 10KH PROGRAMMABLE LOGIC DELAY MODULE 3 BIT TECHNICAL INFORMATION TEST CONDITIONS Driving Signal Pulse Width Pulse Period Supply Voltage, Vee Output Terminations J ECL 10KH Buffer 1.5 x Total Delay

3059 npn transistor

Abstract: LC7368J dp800 debounce IC MC EN3860
Contextual Info: O rdering num ber: EN3860 CMOS LSI LC7368J Switchable DTMF/Pulse TPulse Dialer OVERVIEW PINOUT The LC7368J is a CMOS switchable DTMF/pulse dialer IC for European telephone handsets. It incorporates a 31-digit key buffer memory to support a redial function.

Contextual Info: SY89838U Precision 1:8 LVDS Clock Fanout Buffer with 2:1 Runt Pulse Eliminator Input MUX General Description The SY89838U is a low jitter, low skew, high-speed 1:8 fanout buffer with a unique, 2:1 differential input multiplexer MUX optimized for redundant source

SY89837U

Abstract: SY89838U SY89838UMG SY89838UMGTR CLK18
Contextual Info: SY89838U Precision 1:8 LVDS Clock Fanout Buffer with 2:1 Runt Pulse Eliminator Input MUX General Description The SY89838U is a low jitter, low skew, high-speed 1:8 fanout buffer with a unique, 2:1 differential input multiplexer MUX optimized for redundant source

Contextual Info: Micrel PRECISION 1:8 LVPECL FANOUT BUFFER WITH 2:1 RUNT PULSE ELIMINATOR INPUT MUX SY89837U Precision Edge SY89837U FEATURES • Selects between two clocks, and provides 8 precision, low skew LVPECL output copies ■ Guaranteed AC performance over temperature and

sy89464umy

Contextual Info: SY89464U Precision LVPECL 1:10 Fanout with 2:1 Runt Pulse Eliminator MUX and Internal Termination General Description The SY89464U is a low jitter 1:10 LVPECL fanout buffer with a 2:1 differential input multiplexer MUX optimized for redundant source switchover

Contextual Info: SY89465U Precision LVDS 1:10 Fanout with 2:1 Runt Pulse Eliminator MUX and Internal Termination General Description The SY89465U is a low jitter, 1:10 LVDS fanout buffer with a 2:1 differential input multiplexer MUX optimized for redundant source switchover

SY89464U

Abstract: SY89465U SY89465UMG SY89465UMGTR
Contextual Info: SY89465U Precision LVDS 1:10 Fanout with 2:1 Runt Pulse Eliminator MUX and Internal Termination General Description The SY89465U is a low jitter, 1:10 LVDS fanout buffer with a 2:1 differential input multiplexer MUX optimized for redundant source switchover

MLF44

Abstract: SY89464U SY89464UMG SY89464UMGTR SY89465U
Contextual Info: SY89464U Precision LVPECL 1:10 Fanout with 2:1 Runt Pulse Eliminator MUX and Internal Termination General Description The SY89464U is a low jitter 1:10 LVPECL fanout buffer with a 2:1 differential input multiplexer MUX optimized for redundant source switchover

Contextual Info: SY89465U Precision LVDS 1:10 Fanout with 2:1 Runt Pulse Eliminator MUX and Internal Termination General Description The SY89465U is a low-jitter, 1:10 LVDS fanout buffer with a 2:1 differential input multiplexer MUX optimized for redundant source switchover

PF412

Abstract: CXP913000 CXP913040 PPO000 PPO018 PPO100 PPO109 PF1/EC2
Contextual Info: CXP913040 CMOS 16-bit Single Chip Microcomputer For the availability of this product, please contact the sales office. Description The CXP913040 is a CMOS 16-bit microcomputer integrating on a single chip an A/D converter, serial interface with an incorporated buffer RAM, highprecision timing pattern generation function, pulse

Contextual Info: CDC318A l-LINE TO 18-LINE CLOCK DRIVER WITH |2C CONTROL INTERFACE SC AS 614 - SE P TE M B E R 1998 High-Speed, Low-Skew 1-to-18 Clock Buffer for Synchronous DRAM SDRAM Clock Buffering Applications Output Skew, tSk(0), Less Than 250 ps Pulse Skew, tSk(P), Less Than 500 ps

Contextual Info: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590 – DECEMBER 1997 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps

Contextual Info: CDC319 1-LINE TO 10-LINE CLOCK DRIVER WITH I2C CONTROL INTERFACE SCAS590 – DECEMBER 1997 D D D D D D D D D High-Speed, Low-Skew 1-to-10 Clock Buffer for SDRAM Synchronous DRAM Clock Buffering Applications Output Skew, tsk(o), Less Than 250 ps Pulse Skew, tsk(p), Less Than 500 ps

OP133

Abstract: 47c834 HS25 TMP47C834N TLCS-470 TMP47C834 TMP47C834F TMP47P834F TMP47P834N 47C860
Contextual Info: TOSHIBA TMP47C834 CMOS 4-BIT MICROCONTROLLER TMP47C834N TMP47C834F The 47C834 are based on the TLCS-470 CMOS series. The 47C834 have on-screen display circuit to display characters and marks which indicate channel or time on TV screen, A/D converter comparator input, and D/A

BDT01

Abstract: TMP47C834AN CS-1110 TV DIGITAL DECORDER CIRCUIT DIAGRAM
Contextual Info: TO SHIBA TMP47C834 CMOS 4-BIT MICROCONTROLLER TM P47C834N TM P47C834F The 47C834 are based on the TLCS-470 CMOS series. The 47C834 have on-screen display circuit to display characters and marks which indicate channel or time on TV screen, A/D converter comparator input, and D/A

TC6177AF

Abstract: RJ622 58600u
Contextual Info: TCD6177AF GENERAL The CMOS LSI of TC6177AF was developed to drive the CCD area image sensor TCD5200BD, TCD5210BD, TCD5301BD and TCD5311BD. The TC6177AF can be combined with a vertical clock driver and synchronous signal generation ICs to constitute the CCD area image sensor driving circuit.

BUT22

Contextual Info: TO SH IB A TMP47C834 CMOS 4-Bit Microcontroller TMP47C834N TMP47C834F The TMP47C834 are based on the TLCS-470 CMOS series. The TMP47C834 have on-screen display circuit to display characters and marks which indicate channel or time on TV screen, AD converter comparator input,

R31-R32-R40

Contextual Info: TO SHIBA TMP47C635 CMOS 4-BIT MICROCONTROLLER TMP47C635N The 47C635 is based on the TLCS-470 CMOS series. The 47C635 has on-screen display circuit OSD to display characters and marks which indicate channel or time on TV screen, A/D converter (comparator) input, D/A

Contextual Info: TOSHIBA TLCS-470 Series TMP47C430 CMOS 4 -B it M icrocontroller The 47C430 is based on the TLCS-470 CMOS series. The 47C430 have on-screen display circuit OSD to display char­ acters and marks which indicate channel or time on TV screen, A/D converter (comparator) input, and D/A converter output