Part Number
    Please enter a valid full or partial manufacturer part number with a minimum of 3 letters or numbers

    PROGRAMMABLE SLEW RATE CONTROL IO Search Results

    PROGRAMMABLE SLEW RATE CONTROL IO Result Highlights (5)

    Part ECAD Model Manufacturer Description Download Buy
    MR8259A/B
    Rochester Electronics LLC 8259A - Interrupt Controller, Programmable - Dual marked (5962-87518013A) PDF Buy
    27S25ADM/B
    Rochester Electronics LLC 27S25A - Programmable ROM PDF Buy
    AM27S25DM
    Rochester Electronics LLC AM27S25 - OTP ROM PDF Buy
    EP1800ILC-70
    Rochester Electronics LLC EP1800 - Classic Family EPLD PDF Buy
    EP1800GM-75/B
    Rochester Electronics LLC EP1800 - Classic Family EPLD PDF Buy

    PROGRAMMABLE SLEW RATE CONTROL IO Datasheets Context Search

    Catalog Datasheet Type Document Tags PDF

    Contextual Info: SiP32419, SiP32429 Vishay Siliconix 28 V, 56 m, Load Switch with Programmable Current Limit and Slew Rate Control OPERATION DESCRIPTION FEATURES SiP32419 and SiP32429 are load switches that integrate multiple control features that simplify the design and increase


    Original
    SiP32419 SiP32429 2002/95/EC. 2002/95/EC 2011/65/EU. JS709A PDF

    L9830

    Contextual Info: L9830 MONOLITHIC LAMP DIMMER HIGH EFFICIENCY DUE TO PWM CONTROL AND POWER DMOS DRIVER LOAD CONNECTED TO GROUND CURRENT LIMITATION OVER AND UNDERVOLTAGE PROTECTION ON CHIP THERMAL PROTECTION LIMITED AND PROGRAMMABLE OUTPUT VOLTAGE SLEW RATE OPEN GROUND PROTECTION


    Original
    L9830 L9830 PDF

    L9830

    Contextual Info: L9830 MONOLITHIC LAMP DIMMER HIGH EFFICIENCY DUE TO PWM CONTROL AND POWER DMOS DRIVER LOAD CONNECTED TO GROUND CURRENT LIMITATION OVER AND UNDERVOLTAGE PROTECTION ON CHIP THERMAL PROTECTION LIMITED AND PROGRAMMABLE OUTPUT VOLTAGE SLEW RATE OPEN GROUND PROTECTION


    Original
    L9830 L9830 PDF

    Contextual Info: TPS78825, TPS78833 SLVS382A – JUNE 2001 – REVISED JULY 2001 150-mA LOW-NOISE LDO WITH IN-RUSH CURRENT CONTROL FOR USB APPLICATION FEATURES D 150-mA Low-Dropout Regulator D Available in 2.5 V, 3.3 V D Programmable Slew Rate Control D Output Noise Typically 56 µVRMS


    Original
    TPS78825, TPS78833 SLVS382A 150-mA TPS78833) OT-23 TPS78825 TPS78833 OT-23) PDF

    T494B475K016AS

    Abstract: TPS78825 TPS78825DBVR TPS78825DBVT TPS78833 TPS78833DBVR TPS78833DBVT TPSC475K035R0600
    Contextual Info: TPS78825, TPS78833 SLVS382A – JUNE 2001 – REVISED JULY 2001 150-mA LOW-NOISE LDO WITH IN-RUSH CURRENT CONTROL FOR USB APPLICATION FEATURES D 150-mA Low-Dropout Regulator D Available in 2.5 V, 3.3 V D Programmable Slew Rate Control D Output Noise Typically 56 µVRMS


    Original
    TPS78825, TPS78833 SLVS382A 150-mA TPS78833) OT-23 TPS78825 TPS78833 OT-23) T494B475K016AS TPS78825DBVR TPS78825DBVT TPS78833DBVR TPS78833DBVT TPSC475K035R0600 PDF

    usb pen drive block diagram

    Contextual Info: fax id: 3549 CY2286 mmmttttmm^ _jgg. 8wwy Pentium II and K6 Clock Synthesizer/Driver with 100 MHz, AGP, 4 DIMM and USB/IO Support • Factory-EPROM programmable output drive and slew rate for optimal EMI control. Improved output drivers are designed for low EMI.


    OCR Scan
    CY2286 CY2286PVC-1 usb pen drive block diagram PDF

    CY37256P160-125AI

    Abstract: CY37256P208-125NC CY37256P160-83AI
    Contextual Info: fax id: 6148 PRELIMINARY Ultra37256 UltraLogic 256-Macrocell ISR™ CPLD Features — tS = 4.5 ns — tCO = 5.0 ns Product-term clocking IEEE1149.1 JTAG boundary scan Programmable slew rate control on individual I/Os Low power option on individual logic block basis


    Original
    Ultra37256 256-Macrocell IEEE1149 160-pin 208-pin 256-lead Ultra37192 Ultra37128 CY37256P160-125AI CY37256P208-125NC CY37256P160-83AI PDF

    ultraISR CABLE

    Abstract: CY37256 CY37256V CY37256P160-125UMB
    Contextual Info: 7256 Back CY37256 UltraLogic 256-Macrocell ISR™ CPLD Features — tCO = 4.5 ns Product-term clocking IEEE 1149.1 JTAG boundary scan Programmable slew rate control on individual I/Os Low power option on individual logic block basis 5V and 3.3V I/O capability


    Original
    CY37256 256-Macrocell 160-pin 208-pin 256-lead CY37256V, CY37128/37128V, CY37192/37192V, CY37384/37384V, CY37512/37512V, ultraISR CABLE CY37256 CY37256V CY37256P160-125UMB PDF

    Contextual Info: fax id: 3549 A CY2286 PRELIMINARY £ Y P R p1122 Pentium II and K6 Clock Synthesizer/Driver with 100 MHz, AGP, 4 DIMM and USB/IO Support • Factory-EPROM programmable output drive and slew rate for optimal EMI control. Improved output drivers are designed for low EMI.


    OCR Scan
    CY2286 56-pin CY2286 PDF

    Contextual Info: L6474 easySPIN – fully integrated microstepping motor driver Features • Operating voltage: 8 - 45 V ■ 7.0 A output peak current 3.0 A r.m.s. ■ Low RDSon power MOSFETS ■ Programmable power MOS slew-rate ■ Up to 1/16 microstepping ■ Current control with adaptive decay


    Original
    L6474 POWERSO36 PDF

    Contextual Info: TPS65279 www.ti.com SLVSC85 – AUGUST 2013 4.5-V TO 18-V INPUT VOLTAGE, 5-A/5-A DUAL SYNCHRONOUS STEP-DOWN CONVERTER WITH CURRENT SHARING Check for Samples: TPS65279 FEATURES 1 • • • • • • • • • 4.5-V to 18-V Wide Input Voltage Range Programmable Slew Rate Control for Output


    Original
    TPS65279 SLVSC85 PDF

    Contextual Info: DATASHEET Ultra Low Power Programmable Main Clock for VIA VX900 Chipset Recommended Application: Ultra low power main clock for VIA VX900 chipset ICS9UM709B Features/Benefits: • Supports programmable spread percentage and frequency • Uses external 14.318MHz crystal, external crystal load


    Original
    VX900 ICS9UM709B 318MHz 33ohm PDF

    EPM3256A

    Abstract: 144-Pin PLCC/TQFP Package Pin-Out Diagram EPM3032A EPM3064A EPM3128A EPM3512A EPM3032A application
    Contextual Info: MAX 3000A Programmable Logic Device Family December 2002, ver. 3.2 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ High–performance, low–cost CMOS EEPROM–based programmable logic devices PLDs built on a MAX® architecture (see Table 1)


    Original
    PDF

    EPM7032AE

    Abstract: EPM7064AE EPM7128A EPM7128AE EPM7256A JESD-71
    Contextual Info: MAX 7000A October 2002, ver. 4.3 Features. • ■ ■ ■ ■ ■ ■ Altera Corporation DS-M7000A-4.3 Programmable Logic Device Data Sheet ■ f Includes MAX 7000AE High-performance 3.3-V EEPROM-based programmable logic devices PLDs built on second-generation Multiple Array MatriX


    Original
    DS-M7000A-4 7000AE 7000AE EPM7128A EPM7256A 1149tected EPM7032AE EPM7064AE EPM7128AE JESD-71 PDF

    Contextual Info: MAX 7000A October 2002, ver. 4.3 Features. • ■ ■ ■ ■ ■ ■ Altera Corporation DS-M7000A-4.3 Programmable Logic Device Data Sheet ■ f Includes MAX 7000AE High-performance 3.3-V EEPROM-based programmable logic devices PLDs built on second-generation Multiple Array MatriX


    Original
    7000AE 7000AE EPM7128A EPM7256A EPM7032AELC44-4 EPM7032AE EPM7032AELC44-7 EPM7032AELC44-10 EPM7032AETC44-4 PDF

    Contextual Info: MAX 7000A October 2002, ver. 4.3 Features. • ■ ■ ■ ■ ■ ■ Altera Corporation DS-M7000A-4.3 Programmable Logic Device Data Sheet ■ f Includes MAX 7000AE High-performance 3.3-V EEPROM-based programmable logic devices PLDs built on second-generation Multiple Array MatriX


    Original
    DS-M7000A-4 7000AE 7000AE EPM7128A EPM7256A EPM7032AETC44-4 EPM7032AE EPM7032AETC44-7 EPM7032AETC44-10 EPM7032AETI44-7 PDF

    Contextual Info: MAX 3000A Programmable Logic Device Family June 2003, ver. 3.4 Features. Data Sheet • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ High–performance, low–cost CMOS EEPROM–based programmable logic devices PLDs built on a MAX® architecture (see Table 1)


    Original
    EPM3064ATI44-10 EPM3064A EPM3064ATI100-10 EPM3064A* PDF

    QFN-32

    Abstract: SMB138 QFN 5X5 QFN-64 qfn32 car battery charger SMB113 CSP-15 SMB135
    Contextual Info: SMB113A/B/117 – Four-channel Programmable Power Managers for High-power Applications SMB113A/B 5A & SMB117 (10A) Combine High-performance and High-power DC/DC Regulation with Advanced Power System Control SMB113A/B SMB117 +2.7V to +6.0V or Li-Ion Features


    Original
    SMB113A/B/117 SMB113A/B SMB117 A/10A SMB138 QFN-32 SMB138 QFN 5X5 QFN-64 qfn32 car battery charger SMB113 CSP-15 SMB135 PDF

    FS12

    Abstract: ICS94252
    Contextual Info: ICS94252 Integrated Circuit Systems, Inc. Programmable System Clock Chip for PIII Processor Block Diagram 48MHz XTAL OSC REF0 IOAPIC SDATA SCLK PLL1 Spread Spectrum CPU DIVDER Control SDRAM DIVDER PD# PCI_STOP# CPU_STOP# MODE 0456A—12/12/02 Stop 2 13


    Original
    ICS94252 48MHz 456A--12/12/02 FS3/48MHz MO-118 ICS94252yFT FS12 ICS94252 PDF

    W83194BR-903

    Abstract: PSKE SEL24 W83194BG-903
    Contextual Info: W83194BR-903 & W83194BG-903 STEPLESS VIA PT/PM MAIN CLOCK GENERATOR Date: 5/2/2006 Revision: 1.0 W83194BR-903/W83194BG-903 W83194BR-903 Datasheet Revision History PAGES DATES VERSION WEB VERSION MAIN CONTENTS n.a. All of the versions before 0.50 are for internal


    Original
    W83194BR-903 W83194BG-903 W83194BR-903/W83194BG-903 W83194BR-903 W83194BR-903/W831948 PSKE SEL24 W83194BG-903 PDF

    SEL24

    Abstract: W83194BR-903
    Contextual Info: W83194BR-903 WINBOND STEPLESS VIA PT/PM MAIN CLOCK GENERATOR -I- Publication Release Date: December 23, 2004 Revision 1.0 W83194BR-903 Revision History PAGES DATES VERSION WEB VERSION MAIN CONTENTS n.a. All of the versions before 0.50 are for internal use.


    Original
    W83194BR-903 SEL24 W83194BR-903 PDF

    UART TTL buffer

    Abstract: HCI Transport Layers STLC2410B STW5093 M16550
    Contextual Info: STLC2410B BLUETOOTH BASEBAND PRELIMINARY DATA - REV. 1.1 1 • ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ FEATURES Bluetooth® V1.1 specification compliant Point-to-point, point-to-multi-point up to 7 slaves and scatternet capability Asynchronous Connection-Less (ACL) link


    Original
    STLC2410B 721kbps 32-bit 13MHz 64KByte 16-bit UART TTL buffer HCI Transport Layers STLC2410B STW5093 M16550 PDF

    Contextual Info: DATA SHEET DP8110G 10A DC-DC Intelligent dPOL FEATURES • Output voltage range: 0.7V–5.5V at 0 - 10A.  Programmable dynamic output voltage positioning for better load transient response  Choice of 500KHz switching for highest efficiency or 1MHz for


    Original
    DP8110G 500KHz 60950-1/CSA DP8110. PDF

    Contextual Info: YS12S16 DC-DC Converter Data Sheet 9.6-14 VDC Input; 0.7525-5.5 VDC Programmable @ 16A The Products: Y-Series Features Applications •     Intermediate Bus Architectures Telecommunications Data communications Distributed Power Architectures Servers, workstations


    Original
    YS12S16 MCD10207 24-Jun-10 PDF