POS-PHY PMC Search Results

AF200

Abstract: MAC layer sequence number MB250
Contextual Info: POS-PHY Level 4 MegaCore Function POSPHY4 August 2001; ver. 1.00 Data Sheet Introduction Optimized for the Altera APEXTM II device architecture, the POS-PHY level 4 MegaCore® function (POSPHY4) interfaces cell and packet transfers between physical (PHY) and link layer devices. The POSPHY4

altera marking Code Formats Cyclone 2

Abstract: verilog code for spi4.2 to fifo vhdl 4-bit binary calculator cyclone FPGA 144 EP3C40F780C6 EP4SGX230DF29C3ES EP4SGX70 PM3388 EP3SE50F780 OIF-SPI4-02
Contextual Info: POS-PHY Level 4 MegaCore Function User Guide POS-PHY Level 4 MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 www.altera.com UG-IPPOSPHY4-10.0 Document last updated for Altera Complete Design Suite version: Document publication date: 10.0

AN166

Abstract: AN202 fpga frame buffer vhdl examples FIFO buffer threshold YDAT sonet testbench
Contextual Info: POS-PHY Level 4 MegaCore Function User Guide 101 Innovation Drive San Jose, CA 95134 408 544-7000 http://www.altera.com Core Version: Document Version: Document Date: 1.0.0p4 1.0.0p4 August 2002 Copyright POS-PHY Level 4 MegaCore Function User Guide Copyright 2002 Altera Corporation. All rights reserved. Altera, The Programmable Solutions Company, the stylized Altera logo,

Gigabit Ethernet PHY

Abstract: PM3386 PM5358 PM5381 PM5382 PM7390
Contextual Info: PM3386 S/UNI -2xGE Dual Gigabit Ethernet Controller PMC-1991223 R4 • Standard OC-48 bandwidth Packet/Cell interface. • Compatible with PMC-Sierra devices supporting POS-PHY Level 3, including: • PM5381 S/UNI®-2488 ATM and POS physical layer device.

Contextual Info: POS-PHY Level-3 PHY Layer Core March 29, 2002 Product Specification LogiCORE Facts Core Specifics Xilinx Inc. 2100 Logic Drive San Jose, CA 95124 Phone: +1 408-559-7778 Fax: +1 408-559-7114 E-mail: logicore@xilinx.com URL: www.xilinx.com/ipcenter Support: www.support.xilinx.com

cd 1619

Contextual Info: PM5357 S/UNI-622-POS PMC-Sierra,Inc. 622 Mbit/s ATM and Packet Over SONET Physical Layer Device FEATURES GENERAL ATM and Packet over SONET/SDH POS OC-12c (622 Mbit/s) PHY Provides on-chip clock and data recovery and clock synthesis Exceeds Bellcore-GR-253 jitter

XAPP623

Contextual Info: POS-PHY Level-4 Core v5.0 DS209 August 7, 2002 Product Specification LogiCORE Facts Features • Fully compliant with OIF-SPI4-02.0 System Packet Interface Level-4 SPI-4 Phase 2 standard • Supports POS, ATM, and Ethernet 10 Gbps applications • Delivered through CORE Generator providing easy

TSX 47 software

Abstract: "network interface cards"
Contextual Info: PM5379 S/UNI 4x155 Release 4-Channel OC-3c ATM and POS Physical Layer Device FEATURES • Provides UTOPIA Level 3 compatible 32-bit wide System Interface clocked up to 104 MHz with parity support for ATM applications. • Provides SATURN POS-PHY Level 3 32-bit System Interface

1F2e

Abstract: DPS module
Contextual Info: POS-PHY Level 4 Interface Core V3.0 Product Specification August 31, 2001 LogiCORE Facts Core Specifics Supported Family Performance Xilinx Inc. 2100 Logic Drive San Jose, CA 95124 Phone: +1 408-559-7778 Fax: +1 408-559-7114 URL: www.xilinx.com/support/techsup/appinfo

Contextual Info: PHAST -12P Device STM-4/OC-12 SDH/SONET Overhead Terminator with CDB/PPP UTOPIA/POS-PHY Interface TXC-06412 DATA SHEET PRODUCT PREVIEW Line/Path Ring Ports LINE SIDE APPLICATIONS • SDH/SONET add/drop and terminal multiplexers • Linear MS/Line protection

asynchronous fifo vhdl

Contextual Info: POS-PHY Level-3 Link Layer Core V1.0 March 29, 2002 Product Specification LogiCORE Facts Xilinx Inc. 2100 Logic Drive San Jose, CA 95124 Phone: +1 408-559-7778 Fax: +1 408-559-7114 E-mail: logicore@xilinx.com URL: www.xilinx.com/ipcenter Support: www.support.xilinx.com

asynchronous fifo vhdl xilinx

Abstract: xilinx silicon device
Contextual Info: POS-PHY Level-3 Link Layer Core V2.01 March 29, 2002 Product Specification LogiCORE Facts TM Xilinx Inc. 2100 Logic Drive San Jose, CA 95124 Phone: +1 408-559-7778 Fax: +1 408-559-7114 E-mail: logicore@xilinx.com URL: www.xilinx.com/ipcenter Support: www.support.xilinx.com

Contextual Info: PHAST -12P Device STM-4/OC-12 SDH/SONET Overhead Terminator with CDB/PPP UTOPIA/POS-PHY Interface TXC-06412 DATA SHEET PRODUCT PREVIEW Line/Path Ring Ports LINE SIDE APPLICATIONS • SDH/SONET add/drop and terminal multiplexers • Linear MS/Line protection

Contextual Info: PHAST-12P Device STM-4/OC-12 SDH/SONET Overhead Terminator with CDB/PPP UTOPIA/POS-PHY Interface TXC-06412B DATA SHEET PRELIMINARY TXC-06412B-MB, Ed. 2 June 2005 FEATURES • Bit-serial LVPECL SDH/SONET line interface with integrated clock recovery and

ATM126

Contextual Info: PHAST-6P Device Dual STM-1/OC-3 SDH/SONET Overhead Terminator with CDB/PPP UTOPIA/POS-PHY Interface TXC-06406B DATA SHEET PRODUCT PREVIEW TXC-06406B-MB, Ed. 1 May 2005 FEATURES APPLICATIONS • Bit-serial LVPECL SDH/SONET line interface with integrated clock recovery

lcd power board schematic APS 252

Abstract: ZO 405 me TXC-06412Br
Contextual Info: PHAST-12P Device STM-4/OC-12 SDH/SONET Overhead Terminator with CDB/PPP UTOPIA/POS-PHY Interface TXC-06412B DATA SHEET TXC-06412B-MB, Ed. 6 April 2009 FEATURES • Bit-serial LVPECL SDH/SONET line interface with integrated clock recovery and clock synthesis

PM3392

Abstract: M29730 PM3388 PM5390 STS-48 10gb TX drive
Contextual Info: Flexbus-4 / POS-PHY Level-4 Bridge Core for Virtex -II November 2, 2001 Product Specification LogiCORE™ Facts Core Specifics Xilinx Inc. 2100 Logic Drive San Jose, CA 95124 Phone: +1 408-559-7778 Fax: +1 408-559-7114 URL: www.xilinx.com/ipcenter Support: www.support.xilinx.com

p15c1621

Abstract: PMC-971147 TETRA Motorola TETRA terminal P15C16212 db9 to db9 MOLEX 160 CRC-32 GR-253-CORE PM5351
Contextual Info: PM5351 S/UNI-TETRA PRELIMINARY REFERENCE DESIGN PMC-980322 ISSUE 2 S/UNI-TETRA REFERENCE DESIGN PM5351 S/UNI- TM 155-TETRA S/UNI-TETRA S/UNI-TETRA REFERENCE DESIGN WITH WAN CLOCKING REFERENCE DESIGN ISSUE 2: NOVEMBER 1998 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

TCA 321

Abstract: TCA 345 CRC-32 G781 GR-253-CORE PM5352 30f-310 TETRA terminal
Contextual Info: PM5352 S/UNI STAR DATA SHEET PMC-1990421 ISSUE 2 SATURN USER NETWORK INTERFACE 155 STAR PM5352 S/UNI-STAR SATURN USER NETWORK INTERFACE (STAR) DATA SHEET ISSUE 2: FEBRUARY 2000 PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE

UNIMACH-48

Abstract: optical transceiver STM 1 8B10B PM5310 PM5315 PM7390 MACH48 prbs generator
Contextual Info: PMC-Sierra,Inc. PM7390 S/UNI -MACH48 Preliminary Multi-Service Access Device for Channelized Interfaces FEATURES • Single chip ATM and packet processor capable of processing STS-48/STM-16 aggregate payload. • Optionally interprets the incoming AU-3/AU-4 pointers to locate payload

1x10G

Abstract: P802 PM5390 STM-64 STS-192 UNI-9953 64-bin 6464C
Contextual Info: PM5390 S/UNI -9953 Advance 10 Gbit/s Physical Layer Device for POS, ATM and Ethernet FEATURES • Implements the ATM Forum User Network Interface Specification and the ATM physical layer for Broadband ISDN according to CCITT Rec. I.432. • Implements the Point-to-Point Protocol

CRC-10

Abstract: OC-48C PM7325 af37
Contextual Info: S/UNI -ATLAS-3200 Telecom Standard Product Data Sheet Preliminary PM7325 S/UNI®-ATLAS-3200 2488 Mbit/s SATURN® User Network Interface ATM Layer Solution Data Sheet Proprietary and Confidential Preliminary Issue 4: June 2001 Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

substitute diode PH 33D

Abstract: ECL 10131 TETRA monitoring
Contextual Info: PMC-Sierra, Inc. PM5351 S/UNI-TETRA S/UNI-TETRA DATASHEET PMC-1971240 ISSUE 6 SATURN USER NETWORK INTERFACE 155-TETRA PM5351 S/UNI- 155-TETRA S/UNI-TETRA SATURN USER NETWORK INTERFACE (155-TETRA) DATASHEET ISSUE 6: DEC 1999 PMC-Sierra, Inc. 105 - 8555 Baxter Place Burnaby, BC Canada V5A 4V7 604 .415.6000

DL304

Abstract: relay used water level controller can obd lm 386 l shadow detector alarm using 555 timer
Contextual Info: PRELIMINARY S/UNI-TETRA PM P M C -S i^ .in c P M S 3 S 1 S /U N I-T E T R A DATASHEET PMC-971240 ISSUE 4 SATURN USER NETWORK INTERFACE 155-TETRA PM5351 S / U N I- 1 5 5 -T E T R A S/UNI-TETRA SATURN USER NETWORK INTERFACE (155-TETRA) DATASHEET PRELIMINARY