PIN DIAGRAM OF IC 74 Search Results

9214A

Abstract: ATtiny44 D-85748 ATA5771/73/74 STK500 ATA5771
Contextual Info: ATA5771/73/74: Consideration of External Circuitry for the RESET pin 1. Introduction The Atmel IC ATA5771/73/74 is a UHF transmitter for automotive applications in the ISM frequency range using Atmel ATtiny44 in one package. Figure 1-1 shows the pin diagram for the IC and the general function of each pin is described in Table 1-1 on

Contextual Info: Preliminary ill# ICW 0RKS WB1332X Dual Serial Input PLL with 1.2GHz and 510MHz Prescalers Features Figure 1 • IC WORKS BiCMOS process Pin Diagram • Operating voltage 2.7V to 5.5V — LI Vcc2 • Operating frequency to 1,2GHz and 510MHz with inputs of - 1 5dBm and Vcc of 3.0V

quadrature shaft encoder

Abstract: RMV856 R24-1000 24512 MAX232 R500 USR12 step motor analog SPEED controller
Contextual Info: RMV856 Stepping Motor Controller IC User's Guide #300 - 3665 Kingsway, Vancouver, BC, V5M 5W2, Canada Phone: 604-299-5173 Fax: 604-299-5174 Page 15 of 15 Contents 1 Introduction 2 Pin Out Function Description 3 Block Diagram 4 Interfacing & Connection 5 Operating Modes

F3870

Abstract: 20ii B-01 F38C70
Contextual Info: NATL SEMICOND -CUP/UO OEE D I ^503,156 QObSSaS ^ I F 3 8 C 7 0 y - y ÿ - / ? - # ? ' S in g le - C h ip M ic r o c o m p u t e r Microprocessor Product Description Connection Diagram 40-Pin DIP The Fairchild F38C70 8-bit single-chip m icrocom puter is a m ember of the F387X series; it executes all of the F8

IC CD4538

Abstract: 4538M 74hc4538m operation of IC CD4538 pin diagram of IC CD4538 CD4538 PIN DIAGRAM d4528 4538n function of IC CD4538 CD4528
Contextual Info: A I R C H February 1984 I L D Revised February 1999 S E M I C O N D U C T O R TM General Description The M M 74H C 4538 high speed m onostable m ultivibrator one shots is im plem ented in advanced silicon-gate C M OS technology. T hey feature speeds com parable to low

Contextual Info: MITSUBISHI MICROCOMPUTERS RY A IMIN 7534 Group . e n. atio chang cific o spe bject t l a a fin e su not mits ar li is is : Th metric e ic Not e para Som L PRE SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER • DESCRIPTION The 7534 Group is the 8-bit microcomputer based on the 740 family

DSA003632

Contextual Info: MITSUBISHI MICROCOMPUTERS RY A IMIN 7534 Group . e n. atio chang cific o spe bject t l a a fin e su not mits ar li is is : Th metric e ic Not e para Som L PRE SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER • DESCRIPTION The 7534 Group is the 8-bit microcomputer based on the 740 family

bbs 6102

Abstract: m37540e8fp DSA003632 AN6136
Contextual Info: MITSUBISHI MICROCOMPUTERS 7540 Group RY A IMIN ge. ion. icat to chan ecif l sp ubject a in af es not mits ar li is is : Th metric e ic Not e para Som L SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER DESCRIPTION The 7540 Group is the 8-bit microcomputer based on the 740 family

Contextual Info: ggTN y 3.3V LOW SKEW PLL-BASED CMOS CLOCK DRIVER WITH 3-STATE IDT54/74FCT388915T 70/100/133/150 PRELIMINARY Integrated D e\ Ic e Technology, Inc« FEATURES: • > • • • • • • • • • • • 0.5 MICRON CMOS Technology Input frequency range: 10MHz - f2Q Max. spec

pin diagram of ic 2716

Abstract: B 2716 D MK2716SLFTR MK2716 MK2716S MK2716STR ic ttl 7425
Contextual Info: MK2716 HDTV CLOCK SYNTHESIZER Description Features The MK2716 is a low-cost, low jitter, high-performance PLL clock synthesizer designed to produce the 74.176 MHz and 74.25 MHz clocks necessary for HDTV systems. Using ICS’ patented analog Phase-Locked Loop PLL techniques, the device accepts a 27 MHz

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA M C 54/74H C 160A M C 54/74H C 162A Product Preview P resettab le Counters High-Performance Silicon-Gate CMOS The MC54/74HC160A and HC162A are identical in pinout to the LS160 and LS162, respectively. The device inputs are compatible with standard

74LS93A

Abstract: pin diagram of ic 74ls90 74LS93 IC 74LS93 of IC 74LS90 74LS92 IC 74LS90 74LS90 of IC 74LS93 IC - 74LS93
Contextual Info: Ä M O T O R O L A SN54LS/74LS90 SN54LS/74LS92 SN54LS/74LS93 D E S C R I P T I O N — T h e S N 5 4 L S / 7 4 L S 9 0 , S N 5 4 L S / 7 4 L S 9 2 and S N 5 4 L S / 7 4 L S 9 3 are high-speed 4-bit ripple type counters partitioned into two sections. Each counter has a divide-by-two section and either a

IL3Y

Abstract: 7Z87417
Contextual Info: 74HC/HCT27 SSI T RIPLE 3-INPUT NOR GATE FEATURES T Y P IC A L • Output capability: standard • lc c category : SSI SYM BO L G E N E R A L D E S C R IP T IO N tPHL^ ‘PLH propagation delay nA, nB, nC to n Y C| input capacitance C PD power dissipation capacitance per gate

SP504

Abstract: SP504MCM-L SP503 SP514 a7665 SP332
Contextual Info: SP504 61 SD a 62 VCC 63 TT(a) 64 GND 65 TT(b) 66 CS(a) 67 CS(b) 69 DM(b) 70 RD(a) 68 DM(a) 71 RD(b) 72 GND 73 VCC 74 VCC 75 GND 76 SCT(a) 77 SCT(b) 78 DSR 79 SCT RxD 1 60 GND RDEC0 2 59 SD(b) RDEC1 3 58 TR(a) RDEC2 4 57 GND RDEC3 5 56 TR(b) TTEN 6 55 VCC

74LS164

Abstract: all gate ic data 74
Contextual Info: 8 < > MOTOROLA SN54/74LS164 SERIAL-IN PARALLEL-OUT SHIFT REGISTER The S N 54/74LS 164 is a high speed 8-Bit Serial-ln Parallel-Out Shift Regis­ ter. Serial data is entered through a 2-Input AND gate synchronous with the LOW to HIGH transition of the clock. The device features an asynchronous

74HC4024A

Contextual Info: MOTOROLA SC - C L O G I O DE D S MmTiiTiMirr-*Tr«BM^— mi b3b?asa MOTOROLA GGflDbGa □ T -M i-a s -n SEMICONDUCTOR TECHNICAL DATA MC54/74HC4024 7-Stage Binary Ripple Counter High-Perform ance Silicon-Gate C M O S J SUFFIX CERAMIC CASE 632-08 The MC54/74HC4024 is identical in pinout to the standard CMOS MC14024. The

Contextual Info: ydt FAST CMOS 18-BIT R/W BUFFER IDT54/74FCT162701 T/AT Untegiated D evize Technology, lie . FEATURES: DESCRIPTION: • 0.5 MICRON CM O S Technology The F C T 1 6 27 01 T /A T isan 18-bit R ead/W rite buffer with a four deep FIFO and a read-back latch. It can be used as

Contextual Info: MITSUBISHI MICROCOMPUTERS 7531 Group 0«\c S0«'eV S IN G L E -C H IP 8-B IT C M O S M IC R O C O M P U T E R DESCRIPTION • Clock generating c irc u it. Built-in type The 7531 Group is the 8-bit m icrocom puter based on the 740 fam ily

mr 4040

Abstract: HCT4040 CTR12 4000B 74HC 74HC-HCT4040
Contextual Info: 74H C /H CT4040 MSI 12-STAGE B IN A R Y RIPPLE COUNTER FE A T U R E S • • TYPICAL O utput capability: standard 'CC category: MSI G E N E R A L D ES C R IPTIO N The 74HC/HCT4040 are high-speed Si-gate CMOS devices and are pin compatible with the ” 4 040" o f the

shiftregisters

Abstract: EP910 altera TTL library 74LS series logic gates 74LS EP1810 EP1810-45 EP610 PLE40 altera logicaps TTL library
Contextual Info: EP1810 Y 7 \ m HIGH PERFORMANCE 4 8 MACROCELL EPLD m 10 I U FEATURES GENERAL DESCRIPTION • Erasable, User-Configurable LSI circuit capable of implementing 2100 equivalent gates of conven­ tional and custom logic. • Speed equivalent to 74LS TTL with 33 MHz clock

TTL / RS 422

Abstract: 422 ic 7500 IC 14 PIN pin diagram of max 485 WITH 9 PIN CONNECTOR RS-422A RS-423 RS-449 SP503 FPQ Package
Contextual Info: SP503 61 SD a 62 VCC 63 TT(a) 64 GND 65 TT(b) 66 CS(a) 67 CS(b) 68 DM(a) 69 DM(b) 70 RD(a) 71 RD(b) 72 GND 74 VCC 73 VCC 75 GND 76 SCT(a) 77 SCT(b) 78 DSR 80 CTS • Single Chip Programmable Serial Transceiver ■ Seven (7) Drivers and Seven (7) Receivers

TTL / RS 422

Abstract: rs 232 to rs 485 block diagram sp503em-l pin diagram of max 485 WITH 9 PIN CONNECTOR pin diagram of RS 485 RS-423 RS-449 RS-422A SP503 5V RS232 schematic diagram
Contextual Info: SP503 61 SD a 62 VCC 63 TT(a) 64 GND 65 TT(b) 66 CS(a) 67 CS(b) 68 DM(a) 69 DM(b) 70 RD(a) 71 RD(b) 72 GND 73 VCC 74 VCC 75 GND 76 SCT(a) 77 SCT(b) 78 DSR 80 CTS • Single Chip Programmable Serial Transceiver ■ Seven (7) Drivers and Seven (7) Receivers

Contextual Info: SP503 61 SD a 62 VCC 63 TT(a) 64 GND 65 TT(b) 66 CS(a) 67 CS(b) 68 DM(a) 69 DM(b) 70 RD(a) 71 RD(b) 72 GND 73 VCC 74 VCC 75 GND 76 SCT(a) 77 SCT(b) 78 DSR 80 CTS • Single Chip Programmable Serial Transceiver ■ Seven (7) Drivers and Seven (7) Receivers

KIB 28

Abstract: 54H71DM 54H71FM 74H71DC 74H71FC 74H71PC
Contextual Info: NA TI ON A L {LOGIC} SE MICOND ÜEE D | bSDli eS .□□fc.37Dfl 5 | 71 CO N N ECTIO N DIAGRAM S PINOUT A 54H/74H71 JK MASTER/SLAVE FLIP-FLOP With A N D -O R Inputs D E S C R IP T IO N — The '71 is a high speed J K master/slave flip-flop with AND-OR gate inputs. The AND-OR gate inputs for entry into the master sec­