PHL 308 Search Results

Contextual Info: SA NY O SEMICONDUCTOR CORP 12E D I ^ L C 7 4 H G 1 5 4 - i-l’7 z i - $ S CM OS High-Speed Standard Logic LC74H C Series 3084 - 4 : 7 eH7Q7Li DGDShiS fl í ~ to 1 6 - L in e D e co d e r C1740A Features ~ • The LC74HC154 is a 4-to-16 decoder. • Uses CMOS silicon gate process technology to. achieve operating speeds similar to L S 'T T L 74LS154 gates with the

HD74HCT1G66

Abstract: Hitachi DSA0076
Contextual Info: HD74HCT1G66 Analog Switch ADE-205-308C Z 4th. Edition April 2001 Description The HD74HCT1G66 is high speed CMOS analog switch using silicon gate CMOS process. With CMOS low power dissipation, it provides high speed. The device has low ON resistance for good transfer

TDA 5660 P

Abstract: sj 2258 PS 9829 WL 10-9123 tda 3377 TDA 5735 tda 7294 pci ck16 Q 371 Transistor TE 555-1 TDA 4920
Contextual Info: STD90/MDL90 0.35µm 3.3V CMOS Standard Cell Library for Pure Logic/MDL Products STD90/MDL90 0.35µm 3.3V CMOS Standard Cell Library for Pure Logic/MDL Products Data Book  2000 Samsung Electronics Co., Ltd. All rights reserved. No part of this document may be reproduced, in any form or by any means, without the prior

tda 12155

Abstract: PURE SINE WAVE inverter schematic diagram schematic diagram ac-dc inverter inverter PURE SINE WAVE schematic diagram TRANSISTOR KT 838 1 phase pure sine wave inverter schematic sine wave inverter schematic IVT HS 400 5.1 AUDIO AMP TDA 2030 sine wave inverter schematic IVT pure sine wave using TL 494
Contextual Info: Revision History - First Edition: March 1999 - Second Edition: February 2000 • Library name change STD111 • All characteristic values are updated with mass product line characteristics. • Add high density compiled memories to second edition. chapter 5

tda 12155

Abstract: CL 6807 PURE SINE WAVE inverter schematic diagram TDA 7288 verilog code for 10 gb ethernet tda 7257 Modified Booth Multipliers oa31 diode SAMSUNG DATASHEET CHIP CAPACITOR CL-21 capacitor
Contextual Info: Revision History - First Edition: March 1999 - Second Edition: February 2000 • Library name change STD111 • All characteristic values are updated with mass product line characteristics. • Add high density compiled memories to second edition. chapter 5

TDA 3619

Abstract: TDA 9340 Data sheet TDA 3619 tda 2888 0428 ci an 7591 102-060 AN 7591 POWER AMPLIFIER inverter SK 40037 TDA 810 amplifier tda 8841
Contextual Info: Revision History - 1’st Edition: October 2000 - 2’nd Edition: April 2003 • Chapter 1: Introduction • Chapter 2: DC Electrical Characteristics Recommended Operating Conditions • Chapter 3: Primitive Cells • Chapter 5: Complied Memories STDL131

TDA 3619

Abstract: Data sheet TDA 3619 TDA 8701 AN star delta FORWARD / REVERSE WIRING CONNECTION tda 9592 OA2222L TDA 810 amplifier sm 4109 TAG 8907 TDA audio power amplifier
Contextual Info: Revision History Based on Hard Copy . - 1’st Edition(V1.0) : April. 2003 • Chapter 1 : Introduction • Chapter 2 : DC Electrical Characteristics(Recommended Operating Conditions) • Chapter 3 : Primitive Cells • Chapter 5 : Compiled Memories STDL130

TDA 9361 PS

Abstract: tda 2974 LD5Q ci 8602 gn block diagram TDA 2265 5.1 AUDIO AMP TDA 2030 TDA 7877 TDA 0200 circuit TDA 9594 TDA 2088
Contextual Info: V S MSUNG STD130 ELECTRONICS STD130 Standard Cell 0.18um System-On-Chip ASIC Dec 2000, V2.0 Features 1.8/2.5/3.3V - Leff= 0.15um, Ldrawn = 0.18um Device - Up to 23 million gates - Power dissipation :24nW/MHz 3.3/5.0V - Gate Delay : 48ps @ 1.8V, 1SL Device

dc cdi schematic diagram

Abstract: Ac cdi schematic diagram California Devices DM30ND cdi schematic level shifter . CMOS to TTL cdi schematic diagram cdi schematics TIL 81 transistor BC 945
Contextual Info: •CALIFORNIA DEVICES INC b4 J CD D e | 1AEST3E 000D334 1 | 3 T-42-11^09 DLM SERIES HCMOS Gate Arrays CALIFORNIA DEVICES INC. April 1985 PRODUCT FEATURES DLM SERIES FAMILY ORGANIZATION • High performance 3 /jm silicon gate HCMOS technology, ■ From 210 to 10,152 equivalent 2-input gates.

Contextual Info: I G L. SCS-THOMSON M 54H C 165 M 74H C 165 ly 8-BIT PISO SHIFT REGISTER HIGH SPEED tpD = 21 ns TYP. at VCc = 5V LOW POW ER DISSIPATION lCc = 4 (MAX.) at T a = 2 5 °C HIGH NOISE IM M U N ITY V NIH = V NIL = 28% VCC (MIN.) B1N Plastic Package O UTPUT DRIVE CAPABILITY

ac cdi schematic diagram

Abstract: dc cdi schematic diagram cdi schematic cdi circuit diagram California Devices cdi schematics equivalent transistor bc 107 off grid inverter schematics cdi wiring diagram "california devices"
Contextual Info: cl o cot S '/ t ó CALIFORNIA DEVICES INC. /¿vi o^ f DLM SERIES HCMOS Gate Arrays 000935 April 1985 PRODUCT FEATURES DLM SERIES FAMILY ORGANIZATION ^ • High perform anc^ 3 ^ ^ silicon gate HC^MOSJechnology. P art N um ber ■ From 210 to 10,152 equivalent 2-input gates.

74HC165

Abstract: 74HC165 truth table
Contextual Info: Æ T SGS-THOMSON M54HC165 M74HC165 *7# H0»[i[LI glíl i]0 Í 8-BIT PISO SHIFT REGISTER * HIGH SPEED tpD = 21 ns (TYP. at VCc = 5V • LOW POWER DISSIPATION ICC = 4 mA (MAX.) at TA = 25°C ■ HIGH NOISE IMMUNITY V n i H = V n il = 28% Vcc (MIN.) 1 1 B1N

HC-757

Abstract: HC-756 TC74HC40105A TIC 2060 D
Contextual Info: TC74HC40105AP/AF T E N T A T IV E FIFO 4 Bit X 16 Word REGISTER T h e TC74H C40105A is a high sp e e d CMOS 4 b it x 16 w ord f i r s t - i n , f ir s t- o u t. F I F O S to r a g e r e g i s t e r f a b r i c a te d w ith silicon g ate C-MOS technology.

dc cdi schematic diagram

Abstract: ac cdi schematic diagram cdi schematic d flip flop using gdi techniques level shifter from TTL to CMOS bidirectional cdi schematics transistor BC 945 a8508 cdi wiring diagram California Devices
Contextual Info: x " 7 / CD! ?. ? CHA SERIES HCMOS Channelless Cell Arrays C A U FO R N IA DEVICES IN C. Septem ber 1985 PRODUCT FEATUJ5ES CHA SERIES FAMILY ORGANIZATION Part Number From 210 to 18,000 equivalent 2-input gates, lay« metal used for global and intracell ^ Q oouble

TC74HC4015A

Contextual Info: TOSHIBA TC74HC40105AP/AF Preliminary FIFO 4-Bit x 16 Word Register The TC74HC4015A is a high speed CMOS 4-bit x 16 word first-in, first-out FIFO Stage Register fabricated with silicon gate C2MOS technology. It achieves the high speed operation similar to equivalent

z697

Abstract: HEF4042BP
Contextual Info: HEF4042B MSI QUADRUPLE D-LATCH < The H E F 4042B is a 4 -b it latch w ith fo u r data in p u ts D q to D 3 , fo u r bu ffere d latch o u tp u ts (Og to O 3 ), fo u r b u ffere d com p le m e n tary latch o u tp u ts (Oq to O 3 ) and tw o com m on enable inputs (Eg and

Contextual Info: TOSHIBA TC74AC393 Dual Binary Counter Features: • High Speed: = 180M Hz typ. at Vcc = 5V • Low Power Dissipation: lcc = 8|iA (max.) at Ta = 25°C f M AX • High Noise Immunity: VN,H = V NIL = 28% Vcc (min.) • Symmetrical Output Impedance: llOHl = Iol = 24mA

Contextual Info: 4x4 REGISTER FILE DESCRIPTION The T54LS170/T74LS170 is a high speed, lowpower 4 x 4 Register File organized as four word by four bits. Separate read and write inputs, both address adn enable, allow simultaneous read and write operation. Open collector outputs make it possible, to connect

N1702

Abstract: 2N277 2SA63 2N390A L204A 2N408 TFK 940 OC59 2N374 2n1922
Contextual Info: $1.50 Cat. No. SSH-4 TRANSISTOR SUBSTITUTION HANDBOOK by The H ow ard W . Sams Engineering Staff HOWARD W. SAMS & CO., INC. THE BOBBS-MERRILL COMPANY, INC. Indianapolis • New York FIRST EDITION FIRST PR IN T IN G — MARCH, 1961 SECOND PR IN T IN G — MARCH, 1961

Contextual Info: M O TO RO LA SEMICONDUCTOR TECHNICAL DATA O ctal Bus Transceiver M C74VHC245 The M C 74V H C 245 is an advanced high speed CM OS octal bus transceiver fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining

74hc165

Abstract: LS165 M74HC165B1N 10311 54HC 74HC M54HC165 M74HC165 SICK PLS
Contextual Info: SGS-THOMSON M 54HC165 M 74HC165 8-BIT PISO SHIFT REGISTER HIGH SPEED tpD = 21 ns TYP. at VCc = 5V LOW POW ER DISSIPATION lc c = 4 ¿¿A (MAX.) at T a = 25 °C HIGH NOISE IM M U NITY VlMIH = V NIL = 2 8% VCC (MIN.) B1N Plastic Package Ceramic Frit Seal Package

74hc165

Abstract: 74LS165 ic PIN DIAGRAM
Contextual Info: SbE D C • 7^237 7 S G M u [M g [M m S - T H O M Q O B ^ b ü OTT ■ S 6 T H S O N M 5 4 H C 1 6 5 i(M (M (g § M 7 4 H C 1 6 5 S G S-THOriSON t -w - - m o s 8-BIT PISO SHIFT REGISTER ■ HIGH SPEED tPD = 21 ns (TYP. at V c c = 5V ■ LOW POWER DISSIPATION

LA49

Contextual Info: SN54HC365, SN74HC365 HEX BUFFERS AND LINE DRIVERS WITH 3-STATE OUTPUTS _ SCLS308A - JANUARY 1996 - REVISED JULY 1996 High-Current 3-State Outputs Drive Bus Lines, Buffer Memory Address Registers, or Drive up to 15 LSTTL Loads SN54HC365 . . J OR W PACKAGE

Contextual Info: OPTOISOLATORS SCHMITT TRIGGER OUTPUTS * Total Device Ratings NTE Type No. 3090 Output Configuration Schmitt Trigger Diag. No. 152h Maximum LED Ratings Output Ratings isolation Voltage Surge Volts Total Power (mW) Forward Current (mA) Forward Voltage (Volts)