PDP J11 Search Results

ak25

Contextual Info: STD2000 Single-Chip Worldwide iDTV Processor SD Analog Video HD Video Display Pipeline TNR, DEI, Scaling, IQI Dual DDEC 3D Comb HD Video Display Pipeline (TNR, DEI, Scaling, IQI) Display Driver SD/HD Digital Video Compositor DATA BRIEF Display LCD PDP

A240d

Contextual Info: Quad, 16-Bit, 2.4 GSPS, TxDAC+ Digital-to-Analog Converter AD9154 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM QUAD MOD ADRF6720-27 DAC RF OUTPUT 0°/90° PHASE SHIFTER JESD204B LPF SYNCOUTx± DAC LO_IN SYSREF QUAD DAC MOD_SPI QUAD MOD ADRF6720-27 DAC RF

verilog code for crossbar switch

Abstract: vhdl code for 4*4 crossbar switch vhdl code for crossbar switch b1678 7b388 ispgdx240va-4b388 D59-D30 TCO12 OA47 gdx240va
Contextual Info: ispGDX 240VA TM In-System Programmable 3.3V Generic Digital Crosspoint TM Features Functional Block Diagram ISP Control I/O Pins A I/O Pins D Global Routing Pool GRP I/O Cells ED • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 3.3V Core Power Supply — 4.5ns Input-to-Output/4.5ns Clock-to-Output Delay

gdx240va

Abstract: ISPGDX240VA-4B388-7I OA47 10b38 ispGDX240VA-7BN388I
Contextual Info: LeadFree Package Options Available! Features ispGDX 240VA In-System Programmable 3.3V Generic Digital Crosspoint Functional Block Diagram ISP Control I/O Pins A I/O Pins D • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — 3.3V Core Power Supply — 4.5ns Input-to-Output/4.0ns Clock-to-Output Delay

Contextual Info: ispGDX 240VA In-System Programmable 3.3V Generic Digital Crosspoint Features Functional Block Diagram ISP Control I/O Pins A I/O Pins D • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — 3.3V Core Power Supply — 4.5ns Input-to-Output/4.0ns Clock-to-Output Delay

B208

Abstract: B272 WIN95 fuseselectable EL B17
Contextual Info: ispGDX 160V TM In-System Programmable 3.3V Generic Digital Crosspoint TM Features Functional Block Diagram Global Routing Pool GRP R I/O Cells A IN Boundary Scan Control IM — In-System Programmable — JTAG In-System Programming Interface — Only 3.3V Power Supply Required

vhdl code for 4*4 crossbar switch

Abstract: GDX2 OA47
Contextual Info: ispGDX 240VA In-System Programmable 3.3V Generic Digital Crosspoint Features Functional Block Diagram ISP Control I/O Pins A I/O Pins D • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — 3.3V Core Power Supply — 4.5ns Input-to-Output/4.0ns Clock-to-Output Delay

verilog code for crossbar switch

Abstract: vhdl code for 4*4 crossbar switch B30-B59 vhdl code for crossbar switch gdx240va 10b38 a39a OA47
Contextual Info: ispGDX 240VA In-System Programmable 3.3V Generic Digital Crosspoint Features Functional Block Diagram ISP Control I/O Pins A I/O Pins D • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — 3.3V Core Power Supply — 4.5ns Input-to-Output/4.0ns Clock-to-Output Delay

signal path designer

Contextual Info: Lattice !! ; Semiconductor I Corporation ispGDX 160V In-System Programmable 3.3V Generic Digital Crosspoint™ Functional Block Diagram Features IN-SYSTEM PROGRAMMABLE GENERIC DIGITAL CROSSPOINT FAMILY — Advanced Architecture Addresses Programmable PCB Interconnect, Bus Interface Integration and

B272

Abstract: T100 T176
Contextual Info: ispGDX Device Datasheet June 2010 All Devices Discontinued! Product Change Notification PCN #09-10 has been issued to discontinue all devices in this data sheet. The original datasheet pages have not been modified and do not reflect those changes. Please refer to the table below for reference PCN and current product status.

Contextual Info: ispGDX Family Lattica in-system programmable Generic Digital Crosspoint I Sem iconductor I Corporation Features Functional Block Diagram IN-SYSTEM PROGRAMMABLE GENERIC DIGITAL CROSSPOINT FAMILY ISP Control I/O Pins D — Advanced Architecture Addresses Programmable

Contextual Info: Lattice is p G D X F a m ily in-system programmable Generic Digital Crosspoint™ ;Semiconductor ICorporation Features Functional Block Diagram • IN-SYSTEM PROGRAMMABLE GENERIC DIGITAL CROSSPOINT FAMILY ISP Control I/O Pins D — Advanced Architecture Addresses Programmable

B272

Abstract: T100 T176 C1951 OB21
Contextual Info: ispGDX Family In-System Programmable Generic Digital Crosspoint Features Functional Block Diagram ISP Control I/O Pins A I/O Pins D • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — 5V Power Supply — 5.0ns Input-to-Output/5.0ns Clock-to-Output Delay — Low-Power: 40mA Quiescent Icc

B272

Abstract: T100 T176
Contextual Info: ispGDX Family In-System Programmable Generic Digital Crosspoint Features Functional Block Diagram ISP Control I/O Pins A I/O Pins D • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — 5V Power Supply — 5.0ns Input-to-Output/5.0ns Clock-to-Output Delay — Low-Power: 40mA Quiescent Icc

B272

Abstract: T176 WIN95 5Q160 PDP J11
Contextual Info: ispGDX Family TM in-system programmable Generic Digital Crosspoint TM Features Functional Block Diagram ISP Control I/O Pins A I/O Pins D • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 5V Power Supply — 5.0ns Input-to-Output/5.0ns Clock-to-Output Delay — Low-Power: 40mA Quiescent Icc

B272

Abstract: T176 WIN95 d07 15 58
Contextual Info: ispGDX Family TM In-System Programmable Generic Digital Crosspoint TM Features Functional Block Diagram • IN-SYSTEM PROGRAMMABLE GENERIC DIGITAL CROSSPOINT FAMILY — Advanced Architecture Addresses Programmable PCB Interconnect, Bus Interface Integration and

B272

Abstract: T176 WIN95
Contextual Info: ispGDX Family TM In-System Programmable Generic Digital Crosspoint TM Features Functional Block Diagram ISP Control I/O Pins A I/O Pins D • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 5V Power Supply — 5.0ns Input-to-Output/5.0ns Clock-to-Output Delay — Low-Power: 40mA Quiescent Icc

B38-B39

Abstract: E3B3
Contextual Info: ispGDX 160V TM In-System Programmable 3.3V Generic Digital Crosspoint TM Features Functional Block Diagram ISP Control I/O Pins A I/O Pins D • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 3.3V Power Supply — 5.0ns Input-to-Output/5.0ns Clock-to-Output Delay

ispGDX160V-5B208

Abstract: orcad crossbar switch verilog code for crossbar switch vhdl code for 4*4 crossbar switch vhdl code for crossbar switch
Contextual Info: ispGDX 160V TM In-System Programmable 3.3V Generic Digital Crosspoint TM Features Functional Block Diagram ISP Control I/O Pins A I/O Pins D • HIGH PERFORMANCE E2CMOS TECHNOLOGY — 3.3V Power Supply — 5.0ns Input-to-Output/5.0ns Clock-to-Output Delay

Contextual Info: Dual, 16-Bit, 2.25 GSPS, TxDAC+ Digital-to-Analog Converter AD9152 Data Sheet FEATURES GENERAL DESCRIPTION Supports input data rates up to 1.125 GSPS Proprietary low spurious and distortion design Single carrier LTE 20 MHz bandwidth BW , ACLR = 77 dBc at 180 MHz IF

3BN2

Abstract: CPLD 3q208 7b272i 9B27
Contextual Info: LeadFree Package Options Available! Features ispGDX 160V/VA In-System Programmable 3.3V Generic Digital Crosspoint Functional Block Diagram ISP Control I/O Pins A I/O Pins D • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — 3.3V Core Power Supply — 3.5ns Input-to-Output/3.5ns Clock-to-Output Delay*

Contextual Info: ispGDX 160V/VA In-System Programmable 3.3V Generic Digital Crosspoint Features Functional Block Diagram ISP Control I/O Pins A I/O Pins D • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — 3.3V Core Power Supply — 3.5ns Input-to-Output/3.5ns Clock-to-Output Delay*

GDX160VA

Abstract: a10 bga-9 bth 200 3q208
Contextual Info: ispGDX 160V/VA In-System Programmable 3.3V Generic Digital Crosspoint Features Functional Block Diagram ISP Control I/O Pins A I/O Pins D • HIGH PERFORMANCE E2CMOS® TECHNOLOGY — 3.3V Core Power Supply — 3.5ns Input-to-Output/3.5ns Clock-to-Output Delay*

Contextual Info: Quad, 16-Bit, 2.8 GSPS, TxDAC+ Digital-to-Analog Converter AD9144 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM Supports input data rate >1 GSPS Proprietary low spurious and distortion design 6-carrier GSM IMD = 77 dBc at 75 MHz IF SFDR = 82 dBc at dc IF, −9 dBFS