P4M 16 Search Results

950902DGLF

Abstract: 950902DGLFT
Contextual Info: ICS950902 Integrated Circuit Systems, Inc. Programmable Timing Control Hub for P4™ Recommended Application: VIA P4X/P4M/KT/KN266/333 style chipsets. Pin Configuration *FS0/REF0 1 56 Vtt_PWRGD#*/REF1 GND 2 Features/Benefits: • Programmable output frequency.

CK408

Abstract: ICS950902
Contextual Info: ICS950902 Integrated Circuit Systems, Inc. Programmable Timing Control Hub for P4™ Recommended Application: VIA P4X/P4M/KT/KN266/333 style chipsets. Output Features: • 1 - Pair of differential CPU clocks @ 3.3V CK408 / 1 - Pair of differential open drain CPU clocks (K7)

p4m 29

Abstract: kn266 ICS950902 CK408 ICS-950902
Contextual Info: ICS950902 Integrated Circuit Systems, Inc. Programmable Timing Control Hub for P4™ Recommended Application: VIA P4X/P4M/KT/KN266/333 style chipsets. Pin Configuration *FS0/REF0 1 56 Vtt_PWRGD#*/REF1 GND 2 Features/Benefits: • Programmable output frequency.

Contextual Info: ICS950902 Integrated Circuit Systems, Inc. Programmable Timing Control Hub for P4™ Recommended Application: VIA P4X/P4M/KT/KN266/333 style chipsets. Pin Configuration *FS0/REF0 1 56 Vtt_PWRGD#*/REF1 GND 2 Features/Benefits: • Programmable output frequency.

16668

Contextual Info: W83194BR-P4X STEPLESS CLOCK FOR VIA P4 CHIPSET W83194BR-P4X STEPLESS VIA P4X/P4M MAIN CLOCK GENERATOR Date: May 23, 2005 -1- Revision: A1 Publication Release Date: May 23, 2005 Revision A1 W83194BR-P4X Table of Contents1. GENERAL DESCRIPTION . 4

X2453

Abstract: CK408 ICS950910 CPU408
Contextual Info: ICS950910 Integrated Circuit Systems, Inc. Programmable Timing Control Hub for P4™ Recommended Application: VIA P4X/P4M/KT/KN266/333 style chipsets. Output Features: • 1 - Pair of differential CPU clocks @ 3.3V CK408 / 1 - Pair of differential open drain CPU clocks (K7)

0735A

Abstract: CK408 kn266 ICS950910 VX550 PC133-SDRAM X2453
Contextual Info: ICS950910 Integrated Circuit Systems, Inc. Programmable Timing Control Hub for P4™ Recommended Application: VIA P4X/P4M/KT/KN266/333 style chipsets. Output Features: • 1 - Pair of differential CPU clocks @ 3.3V CK408 / 1 - Pair of differential open drain CPU clocks (K7)

950902DF

Abstract: 950902DGLF
Contextual Info: ICS950902 Integrated Circuit Systems, Inc. Programmable Timing Control Hub for P4™ Recommended Application: VIA P4X/P4M/KT/KN266/333 style chipsets. Output Features: • 1 - Pair of differential CPU clocks @ 3.3V CK408 / 1 - Pair of differential open drain CPU clocks (K7)

ALI chipset

Abstract: KM266 SIS 650 Via KM266 48MHZ M1671 PLL202-151 ali m1671 KM26
Contextual Info: PRELIMINARY PLL202-151 Programmable Clock Generator for VIA, ALI and SIS DDR SYSTEM FEATURES • • • • • • • • • • • • • Supports VIA P4M/KM266, ALI M1671 and SIS 645/650 Chipsets. Programmable Spread Spectrum Modulation from ±0.1% to ±1.5% with minim u m step size of

16668

Abstract: 48MHZ SEL24 W83194BR-P4X
Contextual Info: W83194BR-P4X STEPLESS VIA P4X/P4M MAIN CLOCK GENERATOR Date: 02/21/2003 Revision: 2.0 W83194BR-P4X Data Sheet Revision History NO. Pages Dates 1 n.a. 2 n.a. 7/01/2002 4,10 8/07/2002 Version Web Version Main Contents n.a. All of the versions before 0.50 are for internal use.

Via KM266

Contextual Info: CY28341-2 Universal Single Chip Clock Solution for VIA P4M266/KM266 DDR Systems Features • • • • • Table 1. Frequency Selection Table FS 3:0 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 Supports VIA P4M/KM/266/333/400 chipsets

KM400A

Abstract: 11Group 133M CY28341-3 KM40
Contextual Info: PRELIMINARY CY28341-3 Universal Clock Chip for VIA P4M/KT/KM400A DDR Systems Features Table 1. Frequency Selection Table FS 3:0 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 • Supports VIA P4M/KM/KT/266/333/400A chipsets

kt400

Abstract: VIA KM400 CY28341-2 via kt400 05VDDD VSS48M
Contextual Info: CY28341-2 Universal Clock Chip for VIA P4M/KT/KM400 DDR Systems Features Table 1. Frequency Selection Table FS 3:0 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 • Supports VIA P4M/KM/KT/266/333/400 chipsets • Supports Pentium 4, Athlon™ processors

133M

Abstract: CY28341-3
Contextual Info: PRELIMINARY CY28341-3 Universal Clock Chip for VIA P4M/KT/KM400A DDR Systems Features Table 1. Frequency Selection Table FS 3:0 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 • Supports VIA P4M/KM/KT/266/333/400A chipsets

VIA KM400

Abstract: km400 CY28341-2 rta2
Contextual Info: CY28341-2 Universal Clock Chip for VIA P4M/KT/KM400 DDR Systems Features Table 1. Frequency Selection Table • Supports VIA¥ P4M/KM/KT/266/333/400 chipsets • Supports Pentium 4, Athlon™ processors • Supports two DDR DIMMS • Supports three SDRAM DIMMS at 100 MHz

VIA KM400

Contextual Info: CY28341-2 Universal Clock Chip for VIA P4M/KT/KM400 DDR Systems Features Table 1. Frequency Selection Table • Supports VIA™ P4M/KM/KT/266/333/400 chipsets • Supports Pentium 4, Athlon™ processors • Supports two DDR DIMMS • Supports three SDRAM DIMMS at 100 MHz

rta2

Contextual Info: CY28341-2 Universal Single Chip Clock Solution for VIA P4M266/KM266 DDR Systems Features • • • • • Table 1. Frequency Selection Table FS 3:0 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 Supports VIA P4M/KM/266/333/400 chipsets

Contextual Info: CY28341-2 Universal Clock Chip for VIA P4M/KT/KM400 DDR Systems Features • • • • • • 56-pin SSOP and TSSOP packages Table 1. Frequency Selection Table Supports VIA P4M/KM/KT/266/333/400 chipsets Supports Pentium 4, Athlon™ processors Supports two DDR DIMMS

kt400

Abstract: VIA KM400 via kt400 km400 CY28341-2
Contextual Info: CY28341-2 Universal Clock Chip for VIA P4M/KT/KM400 DDR Systems Features • • • • • Table 1. Frequency Selection Table FS 3:0 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 Supports VIA P4M/KM/KT/266/333/400 chipsets

133M

Abstract: CY28341-3
Contextual Info: CY28341-3 Universal Clock Chip for VIA P4M/KT/KM400A DDR Systems Features Table 1. Frequency Selection Table FS 3:0 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 • Supports VIA P4M/KM/KT/266/333/400A chipsets • Supports Intel Pentium® 4, Athlon™ processors

VT8377

Abstract: STR Z2012 755CA0 HI16081 HI1608-1B10NJNT AMD ATHLON 64 X2 AM2 pin out Socket AM2 P125V via kt400a C601
Contextual Info: 5 4 3 2 1 P4M Power states System Block Diagram Mobile AMD Athlon K7 D DDR 266/333/400 DDR DIMM184 * 2 AGP BUS 8X Athlon SUS_ON PWR_ON +*_AUX +V* +*SUS Clocks FULL ON HIGH HIGH ON ON ON ON S1 POS HIGH HIGH ON ON ON LOW S3(STR) LOW HIGH ON ON OFF LOW S4(STD)

kt400

Abstract: CY28341ZC-2 VIA KM400 via kt400 CY28341-2 KT-400 km400
Contextual Info: CY28341-2 Universal Clock Chip for VIA P4M/KT/KM400 DDR Systems Features Table 1. Frequency Selection Table FS 3:0 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 1111 • Supports VIA P4M/KM/KT/266/333/400 chipsets • Supports Pentium 4, Athlon™ processors

Contextual Info: SHARP SM6003/SM6004/SM6005/SM6006 SIO The SM 6000 is provided with three channel serial interface. * SCI UART/SIO,selectable : 2 channels • SIO : 1 channel Transmit/receive data register SIOD P4io/SO P4g/SI Transmit/receive interrupt request INT4 Clock control

p4m 29

Abstract: p4m 16
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