ORD 213 Search Results

ORD225

Abstract: ORD2211 AC30 228VL ORD2210 ORT233 228M AC100 AC150 AC200
Contextual Info: OKI Reed Switches ORD 211 T e c h n ic a l D ata ORD 213 L ORD 221 Pull-in AT Drop-out AT Contact Resistance Initial m Q ORD 228VL ORD 228M ORD 229 L L Contact ORD 225 ¡L sL 1A 1A 1A (offset) 1A 1A 1A 1A 10— 40 10— 40 1 0 -3 0 1 0 -5 0 1 0 -5 0 1 0 -5 0

Contextual Info: TOSHIBA THMY7264E0LEG-75,-80 T O SH IBA H YBRID DIGITAL INTEGRATED CIRCUIT TENTATIVE 67,108,864-W ORD BY 72-BIT SYNCHRONOUS DRAM MODULE DESCRIPTION The THMY7264E0LEG is a 67,108,864-word by 72-bit synchronous dynamic RAM module consisting of 36 TC59SM704FT DRAMs and PLL/Registers on a printed circuit board.

HN462716

Abstract: HIM46271 HIM462716 HN462716G
Contextual Info: H N 462716, HN462716G 2048-w ord X 8-b it UV Erasable and Electrically Programmable Only Memory The HN462716 is a 2048 word by 8 bit erasable and electrically programmable RO M s. This device is packaged in a 24-pin, dual-in-line package w ith transparent lid. The transparent lid

S 2940

Abstract: S2940
Contextual Info: S-29401 CMOS 128-bit SERIAL E’PROM The S-29401 is a high speed, low pow er 128-bit E2PROM m ade using th e CMOS tloating-gate process. The organization is 16-w ord x 8-bit, and it is read or written serially. Features Low power consumption Operating: 5.0 mA max.

Contextual Info: MITSUBISHI LSIs MH2M365CXJ/CNXJ-5,-6,-7 HYPER PAGE MODE 75497472-BIT 2097152-WORD BY 36-BIT DYNAMIC RAM PIN CONFIGURATION (TOP VIEW) [Double side] DESCRIPTION The M H2M 365C XJ/C NXJ is 2097152-w ord x 36-bits dynam ic RAM. This consists of fo ur industry standard 1M x 16 dynam ic

Contextual Info: M ITSUBISHI SEMICONDUCTORS & s n sc*5o^e M5M4C1000P,J,L-10,-12,-15 -n 1048 5 7 6 -B IT 1048 576-W ORD BY 1 -B IT DYNAM IC RAM —Fast Page Mode— S E P , 16, 1986 DESCRIPTION This is a family of 1,048,576-word by 1-bit dynamic RAMs, PIN CONFIGURATION (TOP VIEW)

M5M417400BJ

Contextual Info: MITSUBISHI LSIs M5M417400BJ,TP,RT-5,-6,-7,-5S,-6S,-7S FAST PAGE MODE 16777216-BIT 4194304-WQRD BY 4-BIT DYNAMIC RAM DESCRIPTION This is a family of 4194304-w ord by 4-bit dynamic RAMS, fabricated with the high performance C M OS process,and is ideal for large-capacity memory systems where high speed, low power

Contextual Info: M ITSU BISHI LSIs MH25636XJ,SXJ-8,-10 FAST PAGE MODE 9437184-BIT 262144-WORD BY 36-BIT DYNAMIC RAM DESCRIPTION MH25636XJ, SXJ is 262144-w ord by 3 6 -b it dynamic RAM module. This consists of two industry standard 256K x 18bit dynamic RAMs in SOJ. The mounting of SOJ on a single in-line package. This

Contextual Info: Am29C01 CMOS Four-Bit Microprocessor Slice > 3 DISTINCTIVE CHARACTERISTICS io E xpandable C onnect any num ber o f Am29C01 s to g e th er fo r longer w ord lengths. Four status flags Carry, overflow , zero, and negative. Flexible data source selection ALU data is selected from five source ports fo r a total of

Contextual Info: O K I Semiconductor M SM 531601D 2,097,152-W ord x 8-Bit M a sk R O M DESCRIPTION The OKI MSM531601D is a high-speed silicon gate CMOS Mask ROM with 2,097,152-word x 8-bit capac­ ity. The MSM531601D operates on a single 5.0 V power supply and is TTL compatible. The chip's asyn­

48576-B

Abstract: 41000BP 5M41000BP
Contextual Info: MITSUBISHI LSIs M 5M 41000BP,J,L,V P,RV -7,-8,-10 FAST PAGE MODE 1048576-B IT 1048576-W 0R D BY 1-BIT DYNAMIC RAM DESCRIPTION This is a fam ily of 1048576-w ord by 1-bit dynam ic RAM s, PIN CONFIGURATION (TOP VIEW) fabricated with the high performance CM O S process, and

58258BM

Contextual Info: SONY,CXK58258BP/BJ/BM':20LL725LL/35LL 32,768-word X 8-bit High Speed CMOS Static RAM * under development D escription T h e C X K 5 8258 B P /B J/B M CXK58258BP 28 pin DIP Plastic is a high speed C M O S static R A M w hich con sists o f 32,768 -w ord x

MSM531021B

Abstract: MSM531031B
Contextual Info: O K I Semiconductor MSM531031B 131,072-W ord x 8-B it Low -V oltage M ask ROM DESCRIPTION i u e w « MSM531031B is a high-speed silicon gate CMOS Mask ROM with 131,072-word x 8-bit capacity. The MSM531031B operates on a single 3.0 V or 3.3 V power supply but offers the same fast access times

Contextual Info: MH1M32BDJ-6,-7,-8/ MH1 M32BNDJ-6,-7,-8 FAST PAGE MODE 33554432-BIT 1048576-WQRD BY 32-BIT DYNAMIC RAM DESCRIPTION The MH1 M 3 2 B D J/B N D J is 1048576-w ord x 32-bit dynamic PIN CONFIGURATION (TOP VIEW) [Single side] RAM and consists o f eight industry standard 1M x 4-bit

2tx transistor

Abstract: uni paint marker DI-8 Aop catalog 11Assignment DI-42
Contextual Info: IL EIP BK DI8 DO4 2TX-PAC Inline Bus Coupler for Ethernet/IP With Eight Digital Inputs and Four Digital Outputs C X-PA 4 2T DO DI8 758 P BK 97 IL EI -No.: 28xx .xx er /x xx Ord W: xx xx.xx. /F HW Addr.: MAC Eth erN et IP I2 I1 O1 PWR BO confo rm ance teste

Contextual Info: MITSUBISHI LSIs M5M2 7C256K, -2, -3 2 6 2 1 4 4 - B IT 3 2 7 6 8 - W ORD BY 8 -B IT CMOS ERASABLE AND ELECTRICALLY REPROGRAMMABLE ROM DESCRIPTION PIN CONFIGURATION (TOP VIEW) The Mitsubishi M 5 M 2 7 C 2 5 6 K is a high-speed 2 6 2 1 4 4 -b it ultraviolet erasable and electrically reprogrammable read

29c101

Contextual Info: / 16-Bit CMOS Microprocessor Slice > 3 DISTINCTIVE CHARACTERISTICS ro CO E xpandable C onnect any num ber o f A m 29C 101s to g e th er fo r longer w ord lengths. L e ft/rig h t shift in dep e n d e n t o f ALU A dd and sh ift opera tio ns ta ke only one cycle.

MSM514265

Abstract: MSM514265BSL
Contextual Info: O K I Semiconductor_ MSM514265B/BSL_ 262,144-Word x 16-Bit DYNAMIC RAM : FAST PAGE MODE TYPE WITH EDO DESCRIPTION The M SM 514265B/BSL is a 262,144-w ord x 16-bit dynamic RAM fabricated in OKI's CMOS silicon gate technology. The M SM 514265B/BSL achieves high integration, high-speed operation, and lowpower consumption due to quadruple polysilicon single metal CMOS. The M SM 514265B/BSL is

UEC-14

Contextual Info: O K I Semiconductor MSM531622C - 1,048,576-Word x 16-Bit or 2,097,152-Word x 8-Bit Mask ROM DESCRIPTION The OKI M SM S31622C is a high-speed CM OS M ask ROM that can electrically sw itch betw een 1,048 576w ord x 16-bit or 2 097,152-w o rd x 8-bit configurations. The M S M 531622C operates on a single 5 0 V p ow er

44C256P

Abstract: B41n m5m44c256p
Contextual Info: M ITS UBISHI {ME MOR Y/ AS IC} Ì>É1 bEMTflSS 0010444 0 MITSUBISHI • 1 M S M 4 4 C 2 S 6 P , J, L - 1 0 , - 1 2 , - 1 5 FAST PAGE MODE 1048576-BIT 262144-W O R D BY 4-BIT DYNAMIC RAM DESCRIPTION T h is is a fam ily of 262144-w ord by 4-bit dynam ic R A M s,

Contextual Info: MITSUBISHI LS Is M 5 M 4 4 1 O O C J ,T P - 5 , - 6 , - 7 , -5 S ,-6 S ,-7 S FAST PAGE MODE 4194304-BIT 4194304-W ORD BY 1-BIT DYNAMIC RAM DESCRIPTION PIN CONFIGURATION (TOP VIEW) This is a family of 4194304-w o rd by 1-bit dynamic RAMs, fabricated with the high performance C M O S process, and is ideal

d4516161

Abstract: MPD4516421
Contextual Info: DATA SHEET NEC MOS INTEGRATED CIRCUIT juPD4516421, 4516821, 4516161 16M-bit Synchronous DRAM Description T he /¿PD4516421, 451 6821, 4516161 are high-speed 16,777,216 -bit s y nchrono us dyna m ic random -access m em o ries, org a n ize d a s 2,097,152 x 4 x 2, 1,048,576 x 8 * 2 and 524 ,288 x 16 x 2 w ord x bit * ban k}, respectively.

Contextual Info: TYPE SN10144 256-BIT RANDOM-ACCESS M EM O RY M A Y J O R JE D U A L - I N - L I N E P A C K A G E T O P V IE W Fast Access Time . . . 18 ns Typical 256-W ord-by-One-Bit Organization Drives 50-0hm Loads AO Full On-Chip Address Decoding and Output-Sense A m p lifica tio n

Contextual Info: MITSUBISHI LSIs MH1M08BCJ A-7,-8, -10 FAST PAGE MODE 1 0 4 8 5 7 6 -W 0 R D BY 8 -B IT DYNAMIC RAM DESCRIPTION PIN C O N F IG U R A T IO N TOP VIEW The M H 1M 08B C JA is 1048576-w ord x 8-b it dynam ic R A M and consists o f nine industry standard 1M x 1 dynam ic