OR GATES Search Results

cd4075

Abstract: CD4071 CD4072 CD4071B CD4072B CD4075B MS-001 "OR Gates"
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056B – Revised February 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

CD4075B

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056C – Revised June 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

CD4071

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056B – Revised February 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

7706002CA

Abstract: CD4071B CD4071BE CD4071BF CD4071BF3A CD4071BM CD4071BM96 CD4071BM96E4 CD4072B CD4075B
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

7706002CA

Abstract: CD4071B CD4071BE CD4071BEE4 CD4071BF CD4071BF3A CD4071BF3AS2534 CD4071BM CD4072B CD4075B
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

CD4071BE

Abstract: CD4075BE TSSOP 14 Package CD4071BPWR ACTIVE TSSOP 7706002CA CD4071B CD4071BF CD4071BF3A CD4071BM CD4071BM96 CD4071BMT
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056B – Revised February 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

CD4075

Abstract: cd4071
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056B – Revised February 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

CD4071B

Abstract: CD4072B CD4075B MS-001 SCHS056D
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

7706002CA

Abstract: CD4071B CD4071BE CD4071BEE4 CD4071BF CD4071BF3A CD4071BF3AS2534 CD4071BM CD4072B CD4075B
Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

Contextual Info: Data sheet acquired from Harris Semiconductor SCHS056D – Revised August 2003 CD4071B CD4072B CD4075B Quad 2-Input Dual 4-Input Triple 3-Input OR OR OR Gate Gate Gate H CD4071B, CD4072B, and CD4075B OR gates provide the system designer with direct implementation of the positive-logic OR

motorola 223

Abstract: DL122 MC10H117
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual 2-Wide 2-3-Input OR-AND/OR-AND Gate MC10H117 The MC10H117 dual 2–wide 2–3–input OR–AND/OR–AND–Invert gate is a general purpose logic element designed for use in data control, such as digital multiplexing or data distribution. Pin 9 is common to both gates. This MECL 10H

MC10H117FNR2

Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual 2-Wide 2-3-Input OR-AND/OR-AND Gate MC10H117 The MC10H117 dual 2–wide 2–3–input OR–AND/OR–AND–Invert gate is a general purpose logic element designed for use in data control, such as digital multiplexing or data distribution. Pin 9 is common to both gates. This MECL 10H

MC10117

Abstract: DL122
Contextual Info: MOTOROLA SEMICONDUCTOR TECHNICAL DATA Dual 2-Wide 2-3-Input OR-AND/OR-AND Gate MC10117 The MC10117 is a dual 2–wide 2–3–input OR–AND/OR–AND–Invert gate. This general purpose logic element is designed for use in data control, such as digital multiplexing or data distribution. Pin 9 is common to both gates.

Contextual Info: 4071B 4072B 4075B INTERNATIONAL, INC CMOS OR GATES 4071B - Quad 2-Input OR 4072B - Dual 4-Input OR 4075B - Triple 3-Input OR CONNECTION DIAGRAMS all packages FEATURES 4 ♦ ♦ Buffered Outputs Diode Protection on all Inputs Fully "B"-Series Compatible TRUTH TABLE

CD40118

Abstract: CD40718 CD40728 CD40758 C04075 z144 CD4071B CD4071 CD4075B
Contextual Info: CD40718, CD40728, CD40758 Typ s Features: COS/MOS OR Gates VOD • Nledium-Speed Operation-tpLH' tpHL = 60 ns typ. at VDD = 10 V High-Voltage Types (20-Volt Rating) CD40718 Quad 2-lnput OR Gate CD40728 Dual 4-lnput OR Gate CD40758 Triple 3-lnput OR Gate

OR Gates

Abstract: C1995 DM54S32 DM54S32J DM54S32W DM74S32 DM74S32N J14A N14A W14B
Contextual Info: DM54S32 DM74S32 Quad 2-Input OR Gates General Description This device contains four independent gates each of which performs the logic OR function Connection Diagram Dual-In-Line Package TL F 6452 – 1 Order Number DM54S32J DM54S32W or DM74S32N See NS Package Number J14A N14A or W14B

lprf3

Contextual Info: SN54LVC86A, SN74LVC86A QUADRUPLE 2-INPUT EXCLUSIVE-OR GATES _SCAS286F - JANUARY 1993 - REVISED JANUARY 1998 EPIC Enhanced-Performance Implanted CMOS Submicron Process SN54LVC86A . . . J OR W PACKAGE SN74LVC86A . . . D, DB, DGV, OR PW PACKAGE

TC4086BP

Abstract: 5VDD-05
Contextual Info: TC4086BP TC40S6BP C 2M O S DIGITAL INTEG RATED CIRCUIT SILIC O N MONOLITHIC EXPANDABLE 4-WIDE 2-INPUT AND-OR-INVERT GATE TC4086BP contains four 2 input AND gates and one OR gate which logically adds OR all the AND gates having an expander input to form AND-OR-select gate,

Contextual Info: C2MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC TC4071BP/BF/BFNJC4072BP/BF TC4075BP/BF TC4071B QUAD 2 INPUT OR GATE TC4072B DUAL 4 INPUT OR GATE TC4075B TRIPLE 3 INPUT OR GATE TC4071B, TC4075BP / BF and TC4072BP / BF are positive logic OR gates w ith tw o inputs, three inputs and fo ur inputs