OF PIC 18 Search Results

Contextual Info: 8 I III! « a* it » I E OUI lElEUEB'POl PUBLICATieil icci*OMics c o »J w * t i M M l IIIU H IIU H » . AA MATERIALS: PLASTIC HOUSING: BLACK, THERMOPLASTIC FLAM M ABILITY RATING UL 9 4 V - 0 SH IELD : BRASS, PREPLATED WITH 0.76um MIN POST D IP P E D WITH

M3JZ

Abstract: SM3G
Contextual Info: i SM3 G,J Z47 SILICON PLANAR TYPE AC POWER CONTROL APPLICATIONS. Unit in mm . Repetitive Peak Off-State Voltage : V¡)RM*4()0» 600V . R.M.S On-State Current 1 0.3 MAX 0Z2 ±0.2 : It (RMS)=3A . High Commutating (dv/dt) . Isolation Voltage : VISOL=1500V AC

Contextual Info: Usage Precautions Usage Precautions S e m ic o n d u c to r p ro d u c ts a r e d e sig n e d a n d m a n u f a c t u r e d u n d e r t h e s tric t q u a l i t y a s s u r a n c e s y s te m p re v io u s ly de sc rib e d to pro vid e c o m p l e t e l y s a t i s f a c t o r y p e r f o r m a n c e a n d q u a l i t y .

AS 15 -g

Abstract: LW2J
Contextual Info: TYPES SN54276, SN74276 QUADRUPLE J-K FLIP-FLOPS O C T O B E R 1 9 7 6 — R E V IS E D D E C E M B E R 1 9 8 3 features • Four J-K Flip-Flops in a Single Package . . . Can Reduce FF Package Count by 50% • Separate Negative-Edge-Triggered Clocks with Hysteresis , . . Typically 200 mV

Contextual Info: • ■ ! ■ ■ ■ ■ • '|<f TOSHIBA MIOS MEMORY PRODUCTS 8,192 WORD X 8 BIT CM OS STATIC RAM SILICON GATE C M O S T C 5 5 63 A P L-1 0, T C 5563A P L-12 T C 55 6 3 A P L -1 5 DESCRIPTIO N The TC5563APL is 65,536 bit static random access memory organized as 8,1 92 words by 8 bits

Contextual Info: 54ACT11874, 74ACT11874 DUAL 4-BIT D-TYPE EDGE-TRIGGERED FLIP-FLOPS WITH 3-STATE OUTPUTS D3447, MAR CH 1990-R E V IS E D O C TO BER 1990 54A C T 11 8 74 . . . J T P A C K A G E Inputs are TTL-Voltage C om patible 74A C T 11 8 74 . . . D W O R N T P A C K A G E

74AC11873

Contextual Info: 54AC11873, 74AC11873 DUAL 4-BIT D-TYPE LATCHES WITH 3-STATE OUTPUTS • 54A C 11 8 73 . . . J T P A C K A G E 3-State Buffer-Type Outputs Drive Bus 74AC 11B73 . . . D W OR N T P A C K A G E Lines Directly TOP V IE W • Bus-Structured Pinout • Flow -Through A rchitecture O ptim izes PCB

tc183

Abstract: E17G tc183G TC163G TC180G single port RAM TC183e Toshiba TC8570
Contextual Info: TOSHIBA TC183G/ECMOS ASIC Family 3.0V/3.3V and 5.0V, 0.5nm1 TheTC183G/E eases the transition from 5V to 3V based systems. Benefits • Mixed 3.0/3,3V and 5V I/O 0.5 micron CMOS process with fast 230ps gate delay performance with the power savings of a 3V core

NV11

Abstract: multiplexers 74 LS 151
Contextual Info: SN54157, SN54LS157, SN54LS158. SN54S157, SN54S158, SN74157, SN74LS157, SN74LS158, SN74S157. SN74S15B QUADRUPLE 2-LINE TO 1-LINE DATA SELECTORS/MULTIPLEXERS M AR C H 1974- - Buffered Inputs and O utputs S N 5 41 57 , S N 54LS 157, S N 54S 157. S N 5 4 L S 1 5 8 , S N 5 4 S 1 5 8 . . . J OR W PACKAGE