ODL 125 DATA Search Results

Contextual Info: AT&T Data Sheet T R U -200A C lock R ecovery and D ata R etim ing M odule F eatures • Choice of data rates from 125 to 220 Mb/s ■ Output jitter less than 3° rms ■ Compatible with ODL 200 Lightwave Data Link ■ 100K ECL compatible inputs and outputs

T7032

Contextual Info: Data Sheet T7032 Clock Recovery Circuit Features • Pin-programmable for 1-MHz to 50-MHz operation ■ Fiber and wire applications ■ Single 5 V supply m Qne externa| C0mp0nent required: 3.58-MHz crystal Description The T7032 Clock Recovery Circuit integrated circuit operates over a 1-MHz to 50-MHz frequency

DD127d

Abstract: DLR1040-ST2 DLT1040-ST2 ODL125 DLT1040-ST1 DLR1040-ST1 AMD Supernet 2 dlr1040-st ODL-125 DLT/R1040-STX
Contextual Info: W fip l H E W LE T T 1"UM PA C K A R D Fiber Optic Data Links Technical Data DLT1040-STX Transmitter DLR1040-STX Receiver Features Description • FDDI PMD/ATM UNI or Fiber Channel FC-O Versions Available • Single +5 V Power Supply • Compact 16-pin DIP Package

T7032PC

Abstract: T7032 T7032PL 3.58 Mhz Crystal odl 50 AL520
Contextual Info: 2 6 'W î Data Sheet January 1992 m A T& T Microelectronics T7032 Clock Recovery and Data Retiming Circuit Description Features Clock recovery and data retiming Pin-programmable for 800 kHz to 52 MHz operation Fiber and wire applications Nonpeaking jitter transfer

fenwal thermistor

Abstract: peltier cooler schematic CCD97 peltier schematic CCD97-00 R12HV A1A-CCD97BI
Contextual Info: CCD97-00 Back Illuminated 2-Phase IMO Series Peltier Pack Electron Multiplying CCD Sensor INTRODUCTION GENERAL DATA 2 The CCD97 is part of the new L3Vision range of products from e2v technologies. This device uses a novel output amplifier circuit that is capable of operating at an equivalent

PM5357-BI

Abstract: cpci backplane schematic plx vhdl code PCI9050-1 F 1uH smt unimax of thumbwheel switch LT1066 CC621660B PM5357-BI-P
Contextual Info: PMC-Sierra, Inc. PRELIMINARY PM5357 S/UNI-622-POS REFERENCE DESIGN PMC-1981070 ISSUE 2 S/UNI-622-POS REFERENCE DESIGN PM5357 S/UNI-622-POS SATURN USER NETWORK INTERFACE 622-POS REFERENCE DESIGN PROPRIETARY AND CONFIDENTIAL PRELIMINARY ISSUE 2: FEBRUARY 2000

T7032PC

Abstract: T7032 T7032PL MOC 361
Contextual Info: Dala Sheet January 1992 âA T& T Microelectronics T7032 Clock Recovery and Data Retiming Circuit Features Description • Clock recovery and data retiming The AT&T T7032 Clock Recovery and Data Retiming Circuit operates over an 800 kHz to 52 MHz frequency range and provides clock recovery, data

NLG4309

Abstract: E125A NTT Electronics
Contextual Info: NS GD E125A NEL 29 Oct. 2001 PRELIMINARY NLG4309 12.5 Gb/s 1䋺16 DEMUX 䋨LVDS INTERFACE䋩 The NLG4309 is an ultra-fast 1:16 demultiplexer. It divides serial input signal operating at up to 12.5 Gb/s into 16 parallel LVDS output signals as fast as 781.25 Mb/s䋨MIN.䋩.

Contextual Info: N AMER PHILIPS/DISCRETE DbE D • PowerMOS transistor ODlHbflT 4 ■ BUZ83A T-Z°l-1 July 1987 QUICK REFERENCE DATA GENERAL DESCRIPTION N-channel enhancement mode field-effect power transistor in a metal envelope. This device is intended for use in Switched Mode Power Supplies

CCD97

Abstract: CCD97-00 CCD97BI e2v ccd Scientific Imaging Technologies scientific imaging technologies ccd97 R1123 R12HV CCD97 Back Illuminated
Contextual Info: CCD97-00 Back Illuminated 2-Phase IMO Series Electron Multiplying CCD Sensor INTRODUCTION The CCD97 is part of the new L3Vision2 range of products from e2v technologies. This device uses a novel output amplifier circuit that is capable of operating at an equivalent

MS-001

Abstract: SN65179 SN65LBC179 SN65LBC179Q SN75179B SN75LBC179
Contextual Info: SN75LBC179, SN65LBC179, SN65LBC179Q LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS SLLS173B – JANUARY 1994 – REVISED FEBRUARY 1998 D D D D D D D D Designed for High-Speed Multipoint Data Transmission Over Long Cables Operate With Pulse Widths as Low

SN65179

Abstract: MS-001 SN65LBC179 SN65LBC179Q SN75179B SN75LBC179 SN75179BD
Contextual Info: SN75LBC179, SN65LBC179, SN65LBC179Q LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS SLLS173D – JANUARY 1994 – REVISED JUNE 2000 D D D D D D D D Designed for High-Speed Multipoint Data Transmission Over Long Cables Operates With Pulse Widths as Low

SN75LBC179

Abstract: MS-001 SN65179 SN65LBC179 SN65LBC179Q SN75179B
Contextual Info: SN75LBC179, SN65LBC179, SN65LBC179Q LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS SLLS173C – JANUARY 1994 – REVISED JANUARY 2000 D D D D D D D D Designed for High-Speed Multipoint Data Transmission Over Long Cables Operate With Pulse Widths as Low

SN65179

Abstract: iso 8482 SN75LBC179 SN65LBC179 SN75179B
Contextual Info: SN65LBC179, SN75LBC179 LOW-POWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS SLLS173A – JANUARY 1994 – REVISED MAY 1995 • • • • • • • • Designed for High-Speed Multipoint Data Transmission Over Long Cables Operate With Pulse Widths as Low

CCD97

Abstract: CCD97-00 scientific imaging technologies ccd97 pinhead
Contextual Info: CCD97–00 Front Illuminated 2-Phase IMO Series Electron Multiplying CCD Sensor INTRODUCTION The CCD97 is part of the new L3Vision2 range of products from e2v technologies. This device uses a novel output amplifier circuit that is capable of operating at an equivalent

iso 8482

Abstract: 75LBC176 SN75LBC176 SN55LBC176 SN65LBC176 SLLS067C
Contextual Info: SN55LBC176, SN65LBC176, SN75LBC176 DIFFERENTIAL BUS TRANSCEIVERS SLLS067C – AUGUST 1990 – REVISED MAY 1995 • • • • • • • • • • • • • • • • Bidirectional Transceiver Meet or Exceed the Requirements of ANSI Standard RS-485 and

Contextual Info: Pacific ÊücrocfoctrofW Ucto&k M es Te l e c o m S y s t e m B l o c k I I V I V m centra PRELIMINARY INFORMATION PM 4374 Q FDL T1 QUAD FACILITY DATA LINK INTERFACE FEATURES • Integrates four full-duplex T1 Extended Superframe ESF facility data link interfaces in a single device.

e2v ccd

Abstract: CCD47-20 CCD4720
Contextual Info: CCD47–20 Back Illuminated High Performance AIMO Back Illuminated CCD Sensor FEATURES * 1024 by 1024 1:1 Image Format * Image Area 13.3 x 13.3 mm * Back Illuminated Format * Frame Transfer Operation * 13 mm Square Pixels * Symmetrical Anti-static Gate Protection

Contextual Info: SN75LBC179, SN65LBC179, SN65LBC179Q LOWĆPOWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS ą ą SLLS173E − JANUARY 1994 − REVISED MARCH 2005 D Designed for High-Speed Multipoint Data D D D D D D D D OR P PACKAGE TOP VIEW Transmission Over Long Cables

Contextual Info: SN75LBC179, SN65LBC179, SN65LBC179Q LOWĆPOWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS ą ą SLLS173E − JANUARY 1994 − REVISED MARCH 2005 D Designed for High-Speed Multipoint Data D D D D D D D D OR P PACKAGE TOP VIEW Transmission Over Long Cables

Contextual Info: SN75LBC179, SN65LBC179, SN65LBC179Q LOWĆPOWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS ą ą SLLS173E − JANUARY 1994 − REVISED MARCH 2005 D Designed for High-Speed Multipoint Data D D D D D D D D OR P PACKAGE TOP VIEW Transmission Over Long Cables

Contextual Info: SN75LBC179, SN65LBC179, SN65LBC179Q LOWĆPOWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS ą ą SLLS173E − JANUARY 1994 − REVISED MARCH 2005 D Designed for High-Speed Multipoint Data D D D D D D D D OR P PACKAGE TOP VIEW Transmission Over Long Cables

Contextual Info: SN75LBC179, SN65LBC179, SN65LBC179Q LOWĆPOWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS ą ą SLLS173E − JANUARY 1994 − REVISED MARCH 2005 D Designed for High-Speed Multipoint Data D D D D D D D D OR P PACKAGE TOP VIEW Transmission Over Long Cables

Contextual Info: SN75LBC179, SN65LBC179, SN65LBC179Q LOWĆPOWER DIFFERENTIAL LINE DRIVER AND RECEIVER PAIRS ą ą SLLS173E − JANUARY 1994 − REVISED MARCH 2005 D Designed for High-Speed Multipoint Data D D D D D D D D OR P PACKAGE TOP VIEW Transmission Over Long Cables