NS 4205 Search Results

29M16

Contextual Info: AmPAL*HC29M16/AmPALHCT29M16 24-Pin E2-Based CM O S Programmable Array Logic ADVANCE INFORM ATIO N Register/Latch PRELOAD permits full logical verifica­ tion Available in high-speed tpo = 35 ns, fMAX ” 20 MHz and standard-speed (tpo = 45 ns, Imax = 15.0 MHz)

CD3024

Abstract: PD3024 AmPAL29M16 CD010280
Contextual Info: AmPAL*HC29M16/AmPALHCT29M16 24-Pin Ez-Based CMOS Programmable Array Logic ADVANCE INFORMATION Register/Latch PRELOAD permits full logical verifica­ tion Available in high-speed tpo m 35 ns, fMAX “ 20 MHz and standard-speed ( tp o - 4 5 ns, fMAX ” 15.0 MHz)

MIL I 23659

Abstract: TMP320C50KGD 44594
Contextual Info: TMP320C50KGD, TMP320BC51KGD DIGITAL SIGNAL PROCESSOR KNOWN GOOD DIE SGZS008 – JULY 1996 D D D D D D D Fast Instruction Cycle Times of 35 ns and 50 ns Source-Code Compatible With all ’C1x and ’C2x Devices RAM-Based Operation – 9K x 16-Bit Dual-Access On-Chip

counter 7468

Abstract: 74565 MIL I 23659 6884 TMP320C50KGD 68840
Contextual Info: TMP320C50KGD, TMP320BC51KGD DIGITAL SIGNAL PROCESSOR KNOWN GOOD DIE SGZS008A – JULY 1996 – REVISED JUNE 1997 D D D D D D Fast Instruction Cycle Times of 35 ns and 50 ns Source-Code Compatible With all ’C1x and ’C2x Devices RAM-Based Operation – 9K-Words x 16-Bit Dual-Access On-Chip

Contextual Info: 2-MBIT SmartVoltage BOOT BLOCK FLASH MEMORY FAMILY 28F200BV-T/B, 28F200CV-T/B, 28F002BV-T/B m Intel SmartVoltage Technology — 5 V or 12 V Program/Erase — 3.3 V or 5 V Read Operation • Very High-Performance Read — 5 V: 60 ns Access Time — 3 V: 110 ns Access Time

Burr-Brown 4203

Abstract: 4203k Burr-Brown 4205
Contextual Info: BURR-BROWN CORP 77 DEf 1 7 3 1 3 h S 1731365 BURR-BROWN CORP GQliaME 77C 11042 OT'73-29 4203 4205 BURR-BROW NS Integrated Circuit MULTIPLIER-DIVIDERS FEATURES APPLICATIONS • LASER-TRIM M ED Requires No Adjustment • M ULTIPLICATION. DIVISION. SQUARING,

MIL I 23659

Abstract: 42058
Contextual Info: TMP320C50KGD, TMP320BC51KGD DIGITAL SIGNAL PROCESSOR KNOWN GOOD DIE S G ZS 008-JU LY 1996 • F as t Instr uct i on Cy c l e T i me s of 35 ns and SO ns • S o u r c e - C o d e C o m p a t i b l e With all ’C 1 x and ’C2 x D e v i c e s • 1 6- Bi t Parall el L ogi c Uni t P L U

Contextual Info: Circuit Protection Terminology Guide Circuit Protection TransGuard /MultiGuard, Transient Voltage Suppressor • Sub ns response time • Bipolar protection • Off state EMI filter, on state transient protection • High peak current and transient energy

TCS 4199

Abstract: AT49F2048
Contextual Info: AT49F2048 Features • • • • • • • • • • Single Voltage Operation - 5V Read - 5V Reprogramming Fast Read Access Time - 90 ns Internal Erase/Program Control Sector Architecture - One 8K Words 16K bytes Boot Block with Programming Lockout

Contextual Info: AT49F2048 Features • • • • • • • • • • Single Voltage Operation • 5V Read - 5V Reprogramming Fast Read Access Time - 90 ns Internal Erase/Program Control Sector Architecture - One 8K Words 16K bytes Boot Block with Programming Lockout

Contextual Info: TMS320TCI100Q FIXED-POINT DIGITAL SIGNAL PROCESSOR SPRS251D − JUNE 2004 − REVISED OCTOBER 2005 D Highest-Performance Fixed-Point Digital D D D D D Signal Processors DSPs − 1.18-ns Instruction Cycle Time − 850-MHz Clock Rate − Eight 32-Bit Instructions/Cycle

Contextual Info: TMS320TCI100Q FIXEDĆPOINT DIGITAL SIGNAL PROCESSOR SPRS251C − JUNE 2004 − REVISED MARCH 2005 D Highest-Performance Fixed-Point Digital D D D D D Signal Processors DSPs − 1.18-ns Instruction Cycle Time − 850-MHz Clock Rate − Eight 32-Bit Instructions/Cycle

32-PIN

Contextual Info: LH521002B FEATURES • Fast Access Times: 17/20/25/35 ns • JEDEC Standard Pinouts • Low Power Standby when Deselected • TTL Compatible I/O • 5 V ± 10% Supply • Fully Static Operation • 2 V Data Retention L Version • Packages: 28-pin, 300-mil SOJ (Preliminary)

Contextual Info: CY62126EV30 MoBL 1-Mbit 64 K x 16 Static RAM 1-Mbit (64 K × 16) Static RAM Features Functional Description • High speed: 45 ns ■ Temperature ranges ❐ Industrial: –40 °C to +85 °C ❐ Automotive-A: –40 °C to +85 °C ❐ Automotive-E: –40 °C to +125 °C

20MS

Abstract: SMR 4000 Q62702P5305 SFH 4501
Contextual Info: IR-LUMINESZENZDIODEN INFRARED EMITTERS 2. Sehr schnelle Emitter Package 2. High-Speed High-Power Emitters λpeak ϕ deg. Ie VF tr nm mW/sr V ns SFH 4000 950 ± 80 > 1.6 typ. 3.5 1.5 at IF = 100 mA (≤ 1.8) tP = 20 ms SFH 4200 950 ± 60 ≥4 1.5 SFH 4209

Contextual Info: CMOS 256K x 4 Static RAM FEATURES • Fast Access Times: 17/20/25/35 ns • JEDEC Standard Pinouts • Low Power Standby when Deselected • TTL Compatible I/O • 5 V + 10% Supply • Fully Static Operation The ‘L’ version will retain data down to a supply voltage

Contextual Info: CY62126EV30 MoBL 1-Mbit 64 K x 16 Static RAM 1-Mbit (64 K × 16) Static RAM Features Functional Description • High speed: 45 ns ■ Temperature ranges ❐ Industrial: –40 °C to +85 °C ❐ Automotive-A: –40 °C to +85 °C ❐ Automotive-E: –40 °C to +125 °C

LM339D

Abstract: lm139 spice SLCJ014
Contextual Info: LM139, LM139A, LM239, LM239A, LM339, LM339A, LM2901 QUAD DIFFERENTIAL COMPARATORS SLCS006F – OCTOBER 1979 – REVISED NOVEMBER 2001 D D D D D D D D description D, DB, J, N, NS, PW, OR W PACKAGE TOP VIEW 1OUT 2OUT VCC 2IN– 2IN+ 1IN– 1IN+ 1 14 2 13 3

LDS 4201 lb

Abstract: K/LDS 4201 lb
Contextual Info: M l f T W electronic June 1992 M 67202 HI-REL DATA SHEET_ 1k x 9 CMOS PARALLEL FIFO FEATURES FIRST-IN FIRST-OUT DUAL PORT MEMORY EMPTY, FULL AND HALF FLAGS IN SINGLE DEVICE MODE FAST ACCESS TIME : 35 TO 55 ns WIDE TEMPERATURE RANGE : - 55°C TO + 125°C

P28F001

Abstract: 29040 N28F001BX-T150 28F001BX-B 28F001BX-T
Contextual Info: intJ 28F001BX-T/28F001BX-B 1M 128K x 8 CMOS FLASH MEMORY • High Integration Blocked Architecture — One 8 KB Boot Block w/Lock Out — Two 4 KB Parameter Blocks — One 112 KB Main Block ■ High-Performance Read — 120 ns Maximum Access Time — 5.0V +10% Vcc

KA 7625

Abstract: ATC capacitor RF2609 RF2609PCBA SSOP-16
Contextual Info: RF2609 MICRO-DEVICES CDMA/FM TRANSMIT AGC AMPLIFIER T yp ica l A p plicatio ns • C D M A /FM Cellular Systems General Purpose Linear IF Amplifier • Supports Dual-Mode A M P S/C D M A Portable Battery Powered Equipment • Supports Dual-Mode TACS/CDMA Commercial and Consumer Systems

Contextual Info: Â P M ftK K S S 0 M F ^ 5 M Y 0 ö [M in te i 28F008SA-L 8 MBIT (1 MBIT x 8) FLASH MEMORY High-Performance Read — 200 ns Maximum Access Time High-Density Symmetrically Blocked Architecture — Sixteen 64 KByte Blocks Deep-Powerdown Mode — 0.20 f iA Ice Typical

SMR 4000

Abstract: Q62702-P1825 20MS Q62702-P5000 Q62702-P331
Contextual Info: IR-LUMINESZENZDIODEN INFRARED EMITTERS 1. Emitter in SMT Package 1. Emitters in SMT λpeak ϕ deg. Ie VF tr nm mW/Sr V ns SFH 4000 950 ± 80 > 1.6 typ. 3.5 at IF = 100 mA 1.5 tP = 20 ms (≤ 1.8) 10 Q62702-P5524 SFH 4010 950 ± 80 > 1.0 (typ. 2.5) at IF = 100 mA

Contextual Info: CY62126EV30 MoBL 1-Mbit 64 K x 16 Static RAM 1-Mbit (64 K × 16) Static RAM Features Functional Description • High speed: 45 ns The CY62126EV30 is a high performance CMOS static RAM organized as 64K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This