NEL CLOCK & DATA RECOVERY Search Results

nel mos42am

Abstract: MOS42AM mos43 NEL Clock MOS43B-107M ttk50
Contextual Info: NEL NS GM E011 Preliminary Oct. 26, 1999 MOS43B-107M 10.7 Gb/s Clock and Data Recovery Module MOS43B-107M has a function of regenerating clock and data signals from NRZ data input signal of OC-192/STM-64 with forward error correction, FEC 10.664228 Gb/s .

NEL Clock

Contextual Info: NS GD E129 4 Feb. 2002 NEL PRELIMINARY NLG4143 CLOCK RECOVERY CIRCUIT The NLG4143 is an ultra-fast Clock Recovery Circuit. This IC regenerates a clock signal 9.95328 GHz from an NRZ data input signal (9.95328 Gb/s) using an external band-pass filter . Designed with LSCFL (Low-power Source Coupled FET Logic) , it uses SCFL I/O levels

MC310-100

Abstract: nel mos42am MOS42AM STM-64 NEL Clock INTERNAL DIAGRAM OF IC 4024
Contextual Info: NEL NS GM E040 Preliminary Dec. 11, 2000 M C 3 1 0 -1 0 0 10 Gb/s Clock and Data Recovery Module MC310-100 has a function of regenerating clock and data signals from NRZ data input signal of STM-64 or OC-192 9.95328 Gb/s . BLOCK DIAGRAM APPLICATION Receiver terminals and regenerators for SDH/SONET (STM-64/OC-192) systems

MOS42AM

Abstract: nel mos42am mos42 E.FL-R-SMT H4042-DL 10Gb CDR E.FL-LP-N NTT Electronics DFF with phase comparator MOS4 NTT Electronics
Contextual Info: NEL NS GM E060 Preliminary Specification Jun. 7, 2001 MC110-100 10Gb/s CDR/DEMUX Module MC110-100 is a module which was designed as a receiver of STM-64/OC-192 optical transmission systems. This consists of PLL type Clock and Data Recovery CDR and 1:16 DEMUX.

tda 7833

Abstract: nel mos42am MOS42AM MOS41-107GM SCR S106 PRBS223-1 nel CDR SCR c50
Contextual Info: NEL NS GM E010A Preliminary Feb. 29, 2000 M O S 4 1 - 1 0 7 G M 10.7Gb/s CDR/DEMUX Module MOS41-107GM is a module which was designed as a receiver for STM-64/OC-192 optical transmission systems with forward error correction, FEC 10.664228 Gb/s . This consists of PLL type Clock and Data Recovery (CDR) and 1:16

D141

Abstract: D151 1-16DEMUX
Contextual Info: NS GM E058 Preliminary June 14,2001 M C 1 1 0 -1 2 X 12.x Gb/s CDR/DEMUX Module MC110-12x was designed as a receiver for STM-64/OC-192 optical transmission systems with forward error correction, FEC at 12.x Gb/s. This consists of PLL type Clock and Data Recovery CDR and 1:16 DEMUX.

MOS43CM

Abstract: mos43 MOS39A E038B STM-64 mc240
Contextual Info: NS GM E038B Jun. 11, 2002 MOS43CM 10 Gb/s Clock and Data Recovery Module MOS43CM has a function of regenerating clock and data signals from NRZ data input signal of STM-64 or OC-192 9.95328 Gb/s . BLOCK DIAGRAM D-FF with phase comparator Din Din Q ～ 50 Ω

MC3101

Abstract: MC310 MC310-107 STM-64
Contextual Info: NS GM E056A Jun. 11, 2002 MC310-107 10.7 Gb/s Clock and Data Recovery Module MC310-107 has a function of regenerating clock and data signals from NRZ data input signal of STM-64 or OC-192 with forward error correction, FEC 10.664228 or 10.709223 Gb/s . BLOCK DIAGRAM

SXO-2

Abstract: Synchronicity 10 bit numbered Controlled Oscillator
Contextual Info: NEL FREQUENCY CONTROLS, INC. 357 Beloit Street P.O. Box 457 Burlington,WI 53105-0457 Phone:262/763-3591 FAX:262/763-2881 Web Site: www.nelfc.com Internet: sales@nelfc.com The Future of Multi-Clock Systems Abstract: The clock requirements of high performance systems vary from the chip to the circuit

E4407B

Abstract: CYV15G0404DXB agilent E4407B
Contextual Info: Crosstalk Measurement Techniques for Multi-Channel and Multi-Rate High Speed Serial Communication Systems By Jeff Hushley, Senior Applications Engineer, Cypress Semiconductor Corp. and Palani Subbiah, Senior Staff Applications Engineer, Cypress Semiconductor Corp.

Contextual Info: DATA SHEET NOVEMBER 1997 Revision 0.1 LXT334 Quad Short Haul Transceiver with Clock Recovery General Description Features The LXT334 is a quad, short-haul, PCM transceiver for 2.048 MHz or 1.544 MHz transmission systems. Its low impedance transmit output drivers provide constant line

Contextual Info: •M f t S S lS T » NOVEMBER 1997 Revision 0.1 LXT334 Quad Short Haul Transceiver with Clock Recovery T he L X T 334 is a quad, short-haul, PC M transceiver for 2.048 M H z o r i.5 4 4 M H z transm ission system s. Its low im pedance transm it output drivers provide constant line

IC KD 2107 6 PIN

Abstract: D004 power ic NLB9259 d009 relay D004 D005 D006 D008 D009 STM-64
Contextual Info: N TT Electronics Corporation NfiL lOGbps 16bit Demultiplexer NLB9259 Product Data Sheet 1. Description 1 The NLB9259 DEMUX-LSI) divides a single serial signal (up to lOGb/s) into 16parallel output signals (up to 622M b/s). 2. Features and Applications Features

NTT Electronics DFF with phase comparator

Abstract: DI01 NLB9258A NLB9259 STM-64 NEL Clock & Data Recovery
Contextual Info: N TT Electronics Corporation N£I lOGbps 16bit Multiplexer N LB 9258A Product Data Sheet 1. Description 1 The NLB9258A MUX-LSI) multiplexes 16 parallel input signals (up to 622Mb/s) to a single serial output signal (up tolOGb/s) . The NLB9258A has function of a phase comparator.

OZ 9972

Abstract: OZ 9966 Ba 5930 fp RA 8040 ba 3822 ls OZ 9998 RN OZ 9998 ST 9322 t 3866 48350 SCH
Contextual Info: M O TO R O LA SEMICONDUCTOR TECHNICAL DATA M C 145165 Advance Information L o w -V o ltag e 6 0 MHz Universal Program m able Dual PLL Frequency S ynthesizer S 1 P S U F F IX PLASTIC DIP CASE 648 CMOS T h e M C 1 4 5 1 6 5 is a lo w -vo ltag e dual p h a se -lo ck e d loop P L L freq u en cy

Contextual Info: •S r m ii n . Mu Semiconductors CMOS Single Chip u-Law/A-Law Synchronous Combo Codecs with Hlters Industrial Temperature S3506I/S3507I/S3507AI Features □ En c o d e r has Dual-Speed Auto-Zero Loop for F a s t A cq u isitio n on Power-up □ Ind ep end ent Transm it and R e ce iv e S e c tio n s

Contextual Info: VM65014 VTC Inc. Value the Customer ANALOG PRML CHANNEL DETECTOR 960801 PRELIMINARY FEATURES CONNECTION DIAGRAM • Register programmable user data rates from 46 to 140 Mbps • Sampled data read channel with maximum likelihood Viterbi detection • Programmable continuous-time filter with two

Contextual Info: Philips Sem icond uctors Prelim inary specification Multimedia bridge scaler and PCI circuit FEATURES SAA7146 digital cam era. It supp orts bidirectional full dup lex tw o chan nel full D1 C C IR fi56 , optionally w ith separate sync wires HA/, pixel enable

Contextual Info: September 1994 P R E L IM IN A R Y M g L M ^ ic r o L in e a r l 4 l a w ML2375, ML2377 DSP Analog I/O Peripheral GENERAL DESCRIPTION FEATURES Th e M L2 3 7 7 is a com plete analog I/O peripheral frontend for D S P based control system . It contains a high­

OM02 optical

Abstract: om02 pe-68629 GR-253-CORE GR-499-CORE XRT7302 T-25W
Contextual Info: nsr EX4R XRT7302 2 CHANNEL E3/DS3/STS-1 LINE INTERFACE UNIT NOVEMBER 1999 REV. 1.0.2 GENERAL DESCRIPTION APPLICATIONS The XRT7302 Dual Channel E3/DS3/STS-1 Trans­ ceiver IC consists of two fully integrated transmitter and receiver line transceiver blocks that are designed

Contextual Info: C S 8413 A DIVISION OF S » CIRRUS LOGIC ' C S 8414 96 kHz Digital Audio Receiver Features Description • Sample Rates to >100 kHz • Low-Jitter, On-Chip Clock Recovery 256xFs Output clock Provided • Supports: AES/EBU, I EC 958, S/PDIF, & EIAJ C P340/1201 Professional and

k275

Contextual Info: > 4M C C DEVICE SPECIFICATION FEATURES GENERAL DESCRIPTION • Broad operating rate range 1.0 G H z- 1.33 GHz - 1062 MHz (Fibre Channel) - 1250 MHz (Gigabit Ethernet) line rates -1 /2 Rate Operation • Quad Transmitter incorporating phase-locked loop (PLL) clock synthesis from low speed

Microwave Logic SJ-300

Abstract: gigaBERT-1400-DRx 28 MHZ crystal SDI Microwave gigaBERT-1400Tx PM5345 NEL Clock & Data Recovery
Contextual Info: ICS1884 Integrated Circuit Systems, Inc. SONET/ATM Teleclock  Recovery/Generator Unit General Description Features The ICS1884 Teleclock is designed to provide high performance clock recovery and generation for either 51.84 Mbit/s OC/STS-1 or 155.52 Mbit/s OC/STS-3/STM-1 SONET/SDH

TC74HC373P

Abstract: tr-5-t ssop40 TMP8237 TMP82C37A TMP82C37AM-5 TMP82C37AP-5 TMP82C37AT-5 TMP8237AP MPU85-207
Contextual Info: TO SH IBA TMP82C37A MULTIMODE DMA CONTROLLER TMP82C37AP-5/TMP82C37AM-5/TMP82C37AT-5 1. GENERAL DESCRIPTION The TM P82C37AP-5/AM -5/AT-5 h e re in a fte r referred to as TM P82C37A is a m ultim ode direct memory access (DMA) controller. The TM P82C37A im proves the