ND 0131 Search Results

PM5360

Abstract: 63A52 PMC-2020735 0719h 0837H BC 459 3627AM 1602h* lcd BCD 548 BC 558 EQUIVALENT BC 309
Contextual Info: 6: 27 AM S/UNI MULTI-48 ASSP Telecom Standard Product Data Sheet Released em be r, 20 11 08 :3 PM5360 Mo nd ay ,2 8N ov S/UNI® MULTI-48 nd ar es an of IH S on Multi-rate SATURN® User Network Interface for 1x2488, 4x622, and 4x155 Released Issue No. 5: September 2003

Contextual Info: — THIS DRAWING 15 UNPUBLISHED.- COPYRIGHT RELEASED BY TYCO ELECTRONICS CORPORATION. m PUBLICATION- ALL R Gh TS RESERVED. LOC D isr AF 50 R E V IS IO N S LTR DESCRIPTION REDRAWN PER 0G3A-0131-01 DATE OWN APVD 23FEB01 JR ND

mitsubishi split ac

Abstract: 013A1
Contextual Info: t U de nd v e er lo pm en Preliminary Specifications REV.A Mitsubishi microcomputers Specifications in this manual are tentative and subject to change. M16C / 6NT Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Description Description The M16C/6NT group of single-chip microcomputers are built using the high-performance silicon gate

microprocessor bosch

Abstract: mitsubishi split ac 01651 2CM06
Contextual Info: t U de nd ve er lo pm en Preliminary Specifications REV.B Mitsubishi microcomputers Specifications in this manual are tentative and subject to change. M16C / 6N Group SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Description Description The M16C/6NT group of single-chip microcomputers are built using the high-performance silicon gate CMOS

2128H

Abstract: TS 231 z570 3dd237 M6665 pm356 C9681 STM-64 serdes k3431
Contextual Info: :2 6: 31 PM PM5317 SPECTRA-9953 Telecom Standard Product Data Sheet Released m be r, 20 07 10 PM5317 nd ay ,1 6S ep te SPECTRA_9953 Data Sheet Proprietary and Confidential Released Issue No. 6: January, 2007 Do wn l oa de d by I HS Pa r ts Ma na g em en tI

M35043

Abstract: SP5 S-PAC m35043-001sp ns 4150 da
Contextual Info: MITSUBISHI MICROCOMPUTERS M35043-XXXSP/F P SCREEN CHARACTER and PATTERN DISPLAY CONTROLLERS DESCRIPTION The M 35043-XXXSP/FP is a TV screen display control 1C. It u ses a PIN CONFIGURATION TOP VIEW silicon gate C M O S proce ss a nd is h o u se d in a 20-p in sh rin k DIP

Contextual Info: 3: 35 PM SPECTRA 1x2488 ASSP Telecom Standard Product Data Sheet Released ch ,2 00 6 10 :3 PM5332 Mo nd ay ,1 3M ar SPECTRA™ 1x2488 Data Sheet Released Issue No. 4: January 2006 Do wn l oa de d by C on te nt T ea m of Pa rtm in er In co n SONET/SDH Payload Extractor/Aligner

Contextual Info: r r z Ä 7 # S G S -T U O M S O N if [L liO T ® « ! M K41T56 CMOS 64 X 8 SERIAL ACCESS TIMEKEEPER SRAM • C O U N TER S FOR SECO ND S, M IN U TES, HOURS, DAY, DATE, MONTH AND YEARS ■ SOFTWARE CALIBRATION ■ AUTOMATIC POWER FAIL DETECT AND SWITCH CIRCUITRY

ANSI Y14.5-1982

Abstract: 14X14X1
Contextual Info: TDP VIEW 01310131013101310131013134 SEE DETAIL 'A ' \ / \ NOTES: 1, A L L DIMENSIONING AND TOLERANCING CONFORM TO ANSI Y14,5-1982, TQFP PACKAGE VARIATION s 2, DATUM PLA N E ED LOCATED AT MOLD PARTING LIN E AND COINCIDENT WITH LEAD, WHERE LEAD EXITS P LA S T IC BODY AT BOTTOM OF PARTING LINE,

MQ-131

Contextual Info: CRO MS131A/C MG131A/C MY131A/C M 0131A/C 0 .3" SIN G LE DIGIT NUM ERIC DISPLAYS SEV EN SEG M EN T N U M E R IC D ISP LA Y High Performance GaP, GaAsP Dice 0.3 inch Character Height High Contrast Wide Viewing Angle Common Anode - M S131A, MG131A, MY131A, M 0131A

Contextual Info: ! ^ jjjjjy '•ttttttttWÄÄÄÄÄÄÄÄÄÄÄÄÄÄÄW1- JM N K t t ♦ < ij / 5; PRELIMINARY *^ ' CY37384 UltraLogic 384-Macrocell ISR™ CPLD — ts = 5.5 ns Features — tco = 6 ns • 384 macrocells in 24 logic blocks • In-System Reprogrammable™ (ISR™

Contextual Info: J S S f l ^ Y P R R S S PREL,mNARY CY37512V "5=" r'" UltraLogic 3.3V 512-Macrocell ISR™ CPLD Fully R o u tab le w ith 10 0% L og ic U tilization Features — JT A G -co m p liant o n -b o a rd p ro g ram m in g T he C Y 3 75 12V is desig ned w ith a robust routing arch itecture

82s185

Contextual Info: Philips Components-Signetics Document No. 853-0131 ECN No. 86487 Date of Issue N ovem ber 11,1986 Status Product Specification 82S185 8K-bit TTL bipolar PROM Memory Products DESCRIPTION FEATURES The 82S185 is field programmable, which means that custom patterns are

clcc land pattern

Abstract: CY37512VP208-66UMB CY37032VP44-100AI CY37064P44-154YMB CY37256P160-125UMB TO-220AB/clcc land pattern
Contextual Info: CYPRESS PRELIMINARY Ultra37000 CPLD Family 5V, 3.3V, ISR™ High-Performance CPLDs General Description Features • In-System Reprogram mable ISR™ CMOS CPLDs — JTAG interface for reconfigurability — Design changes don’t cause pinout changes — Design changes don’t cause timing changes

UPD75P518

Abstract: P117H dwa 108 a uPD78350 rq 8239 ASM-010 uPD75212A uPD75268 IE-75000-R IE-75001-R
Contextual Info: USER'S MANUAL NEC IE-75000-R/IE-75001-R IN-CIRCUIT EMULATOR Document No. EEU-1455 0. D. No. EEU-846B Date Published January 1997 N Printed in Japan USER’S MANUAL NEC IE -7 5 0 0 0 -R /IE -7 5 0 0 1 -R IN-CIRCUIT EMULATOR NEC Corporation 1993 MS-DOS^

frequency multiplier 1 mhz

Contextual Info: DATASHEET IDT5V80013 PLL CLOCK MULTIPLIER Description Features The IDT5V80013 is the most cost effective way to generate a high-quality, high-frequency clock output. Using Phase-Locked Loop PLL techniques, the device employs IDT’s propietary MEMs oscillator technology to produce

ba3824ls

Contextual Info: Audio ICs 5-channel stereo graphic equalizer BA3822LS/BA3822FS/BA3823LS/BA3824LS The BA3822LS, BA3822FS, BA3823LS, and BA3824LS are monolithic, five-point stereo graphic equalizer ICs. Each 1C has two channels, and the five center frequencies for each channel are independently set using external

transistor C3866

Abstract: Zener PH SEC E13009 ups circuit schematic diagram 1000w E13007 2 E13007 C3866 power transistor texas ttl 74L505 Transistor C3246
Contextual Info: BID CΚΤ DOLLY L IST L OGO LIST SA F E TY & RELIA ΒL TY ΤΕΚ PIN SYSTE M DIGITA L IC's MEMORIES, MOS CMOS .EC L , TT L MICR OP R OC E SSOR SPE CIA L FUN CTION IC's DIGITAL l LINE AR K ARR AYS LIN E A R IC's (PUR CH ) ΤΕΚ-MADE IC's IC's INDEX (COL ORE D PGS)

Contextual Info: CRQ MG1401A/C M01401A/C MY1401A/C MU1401A/C 4.0" SINGLE DIGIT ARGE NUMERIC DISPLAYS SEVEN SEGMENT NUMERIC DISPLAY High Performance GaP, GaAsP, GaAlAs Dice 4.0 inch Character Height Continuous Uniform Segments High Contrast Wide Viewing Angle Common Anode - MG1401A, M01401A, MY1401A, MU1401A

2114 ram

Abstract: 5 pin reset ic ARB AIC-300F 2114 Ram pinout 18
Contextual Info: AIC-300F adaptec, inc. Dual-Poit Buffer Controller PRELIMINARY June 1987 • 16-Bit Buffer Addressing csA0A1 A2A3A4 A5A6A7SHP OR A 8 SDP OR A 9 ALE . RST . PORT A REQ CLK . RD . WR A/D7 A/D6 GND - 1 2 3 4 5 6 7 8 9 AIC-300F 10 DUAL PORT 11' BUFFER 12 CONTROLLER

SAB 8259

Abstract: 82C206
Contextual Info: SAB 82C206 Integrated Peripheral Controller Prelim inary • 100% c o m p a tib le to P C /A T d e sig n s • F u lly c o m p a tib le to SAB 8237 D M A c o n tro lle r, S A B 8259 in te rru p t c o n tro lle r, S A B 8254 tim e r/c o u n te r, and 146818 real tim e clock

Contextual Info: CHAPTER 5 1 Digital I/O PERI PHERAL Ports The uPD75238 contains T he uPD75238 empl oy s I/O ports All data the ports 8-bit enabled Fig. 5- 1 are m app ed memory I/O of and as HARDWARE FUNCTIONS the to data uPD75238, bit I/O ports, port I / O. This m ea ns

BA3822LS

Abstract: GRAPHIC EQUALIZER stereo graphic equalizer stereo potentiometer BA3822FS BA3823LS BA3824LS SZIP24 BA3624LS
Contextual Info: Audio ICs 5-channel stereo graphic equalizer | BA3822LS/BA3822FS/BA3823LS/BA3824LS The BA3822LS, BA3822FS, BA3823LS, and BA3824LS are monolithic, five-point stereo graphic equalizer ICs. Each 1C has two channels, and the five center frequencies for each channel are independently set using external

Contextual Info: FA IR C H IL D www.fairchildsemi.com Ml C O N D U C T O R T M C 1203 Triple Video A/D Converter 8-Bit, 5 0 M s p s Features 8-bit resolution 50 Msps conversion rate Low power: lOOmW per channel @ 20 Msps Integral track/hold Independent clock inputs Integral and differential linearity error 0.5 LSB