N20 CP Search Results

HP5385A

Abstract: EEG Block diagram n20 cp LMX2330L LMX2330LTM LMX2331 LMX2331L LMX2331LTM LMX2332L LMX2332LTM
Contextual Info: S em ico nd u cto r ADVANCE INFORMATION LMX2330L/LMX2331L/LMX2332L PLLatinum Low Power Dual Frequency Synthesizer for RF Personal Communications LMX2330L 2.5 GHz/510 MHz LMX2331L 2.0 GHz/510 MHz LMX2332L 1.2 GHz/510 MHz General Description The LMX233xL family of monolithic, Integrated dual fre­

Contextual Info: LMX2335L,LMX2336L LMX2335L/LMX2336L LMX2335L - 1.1 GHz/1.1 GHz LMX2336L, 2.0 GHz/1.1 GHzPLLatinum Low Power Dual Frequency Synthesizer for RF Personal Communications Literature Number: SNAS112C October 19, 2011 LMX2335L/LMX2336L LMX2335L 1.1 GHz/1.1 GHz LMX2336L

LMX2330LTM

Contextual Info: LMX2330L/LMX2331L/LMX2332L PLLatinum Low Power Dual Frequency Synthesizer for RF Personal Communications LMX2330L LMX2331L 2.5 GHz/510 MHz 2.0 GHz/510 MHz LMX2332L 1.2 GHz/510 MHz Features General Description The LMX233XL family of monolithic, integrated dual frequency synthesizers, including prescalers, is to be used as a

SMHU 835.8011.52

Contextual Info: HARRIS H F A 3 5 2 4 S E M I C O N D U C T O R PRELIMINARY 2.5GHz/600MHz Dual Frequency Synthesizer October 1995 Features Description • 2.7V to 5.5V Operation The HFA3524 is a monolithic, integrated dual frequency syn­ thesizer, including prescaler, is

835.8011.52

Abstract: hfa3424 HFA3524 HFA3524IA HFA3524IA96 HFA3724 HSP3824 prism 2 hp5385
Contextual Info: HFA3524 NS ESI G W D 90 4 E N 4 N te r a t OR ED F ps F n E ND II, 11 M b p ort Ce /ts c M M p O u M m C o S S I c E l R PR ca rs il. NO T ER TO T e ch ni Data .inteSheet w r F w u R E a ct o rw nt SI L o o r c o 8 -I N TE R 1 -8 8 itle b() tho yrds

LM1204

Abstract: OP191/OP291/AD623 equivalent
Contextual Info: a FEATURES Low Cost Replaces 12 Potentiometers Individually Programmable Outputs 3-Wire SPI Compatible Serial Input Power Shutdown <55 ␮Watts Including IDD & IREF Midscale Preset, AD8802 Separate VREFL Range Setting, AD8804 +3 V to +5 V Single Supply Operation

Contextual Info: MSP430G2x53 MSP430G2x13 www.ti.com SLAS735J – APRIL 2011 – REVISED MAY 2013 MIXED SIGNAL MICROCONTROLLER FEATURES 1 • • • • • • • • Low Supply-Voltage Range: 1.8 V to 3.6 V Ultra-Low Power Consumption – Active Mode: 230 µA at 1 MHz, 2.2 V

FUSE n20

Contextual Info: MSP430G2x32 MSP430G2x02 www.ti.com SLAS723F – DECEMBER 2010 – REVISED MAY 2012 MIXED SIGNAL MICROCONTROLLER FEATURES 1 • • 23 • • • • • Low Supply Voltage Range: 1.8 V to 3.6 V Ultra-Low Power Consumption – Active Mode: 220 µA at 1 MHz, 2.2 V

n1211

Abstract: IC N1212 n1213 5n215 N1214 c 2491 2N191 N1112 1L4P C2491
Contextual Info: P A IR C H II-D w w w .fairchildsem i.com SEMICONDUCTOR T M C 2 4 9 1A D a t a S h e e t S u p p l e m e n t Di gi t al V i d e o E n c o d e r w i t h M a c r o v i s i o n Copy P r o t e c t i o n Features Applications • Macrovision™ Copy Protection Signal Processing

v19 423

Abstract: V19 312 TQ144 XC9500XL XC95288 XC95288XL w17 88
Contextual Info: 1 XC95288XL High Performance CPLD R June 7, 1999 Version 1.2 5* Preliminary Product Specification Features Power Estimation • • • • Power dissipation in CPLDs can vary substantially depending on the system frequency, design application and output

Contextual Info: R XCR3512XL: 512 Macrocell CPLD DS081 v1.6 September 23, 2003 14 Product Specification Features Description • • • • • The XCR3512XL is a 3.3V, 512 macrocell CPLD targeted at power sensitive designs that require leading edge programmable logic solutions. A total of 32 function blocks provide

Contextual Info: R XCR3512XL: 512 Macrocell CPLD DS081 v1.8 January 5, 2005 14 Product Specification Features Description • • • • • The XCR3512XL is a 3.3V, 512 macrocell CPLD targeted at power sensitive designs that require leading edge programmable logic solutions. A total of 32 function blocks provide

k1358

Abstract: COOLRUNNER-II ucf file tq144 COOLRUNNER-II ucf file XAPP399 F14152 XAPP393 XC2C64 manual XAPP 138 data CP132 -20/COOLRUNNER-II ucf file tq144
Contextual Info: Application Note: CoolRunner-II CPLDs R Assigning CoolRunner-II VREF Pins XAPP399 v1.1 July 25, 2003 Summary The flexibility of the CoolRunner -II CPLD allows users to configure any I/O pin to act as a voltage reference (VREF) pin. This document describes the different methods and underlying

CD4049 pin configuration

Abstract: CD4049 DAC-8562-M68HC11 8562 transistor AMP05 CD4049 PIN DIAGRAM Datasheet Circuit 800H DAC8562 DAC8562GBC CD4049 amplifier
Contextual Info: a +5 Volt, Parallel Input Complete 12-Bit DAC DAC8562 FEATURES Complete 12-Bit DAC No External Components Single +5 Volt Operation 1 mV/Bit with 4.095 V Full Scale True Voltage Output, ؎5 mA Drive Very Low Power –3 mW FUNCTIONAL BLOCK DIAGRAM DAC-8562 Included on the chip, in addition to the DAC, is a rail-to-rail

1SV245

Abstract: ACD2200S8 ACU2109 ACU2200 FMMTA13 HSMP-3810 MMBT2907
Contextual Info: ACD2200S8 CATV/TV/Cable Modem Data Downconverter With Dual Synthesizer Advanced Product Information - Rev 1 • • • • • • • • • • • FEATURES Integrated Downconverter Integrated Dual Synthesizer 256 QAM Compatibility Single +5V Power Supply Operation

STP1080

Abstract: ultrasparc 3
Contextual Info: UltraSPARC -! Data Buffer UDB-I DATA SHEET Companion Device for 167/200 MHz UltraSPARC-1 Systems D e s c r ip t io n The UDB-I is a data buffer device used in UltraSPARC-1 system s to connect the CPU and its external SRAM cache bus to the system bus: • On the C P U /SR A M side, the E-Cache Bus consists of 128 data bits and 16 parity bits

H820

Abstract: HMC820LP6CE
Contextual Info: HMC820LP6CE v03.0310 FRACTIONAL-N SYNTHESIZER w/ INTEGRATED VCO 1095 - 1275, 2190 - 2550, 4380 - 5100 MHz Features • RF Bandwidth: 1095-1275, 2190-2550, 4380-5100 MHz • 24-bit Step Size, Resolution 3 Hz typ • Fractional or Integer Modes • Cycle Slip Prevention

breadboard binary and decimal counter

Abstract: binary to gray code converter binary to gray code converter using PCB design LM337 E1577 1431 T 10s35 37-pin pinout 10k resistor array SIP 4 bit gray to binary converter circuit
Contextual Info: SPT AN7750/55/60 SIGNAL PROCESSING TECHNOLOGIES EVALUATION BOARD FEATURES APPLICATIONS • • • • • Evaluation of SPT7750, SPT7755 or SPT7760 8-bit ADCs • Engineering System Prototype Aid • Guide for Design of SPT7750/55/60 Interface Circuitry • Guide for Design of SPT7750/55/60 PCB Layout

DS101124-4

Abstract: LMX2353SLBX LMX2353TM LMX2353TMX MTC16 LMX2353
Contextual Info: LMX2353 PLLatinum Fractional N Single 2.5 GHz Low Power Frequency Synthesizer General Description Features The LMX2353 is a monolithic integrated fractional N frequency synthesizer, designed to be used in a local oscillator subsystem for a radio transceiver. It is fabricated using National’s 0.5µ ABiC V silicon BiCMOS process. The LMX2353

Contextual Info: ADS61JB46 www.ti.com SBAS611B – SEPTEMBER 2013 – REVISED OCTOBER 2013 14-Bit, Input-Buffered, 160-MSPS, Analog-to-Digital Converter with JESD204A Output Interface Check for Samples: ADS61JB46 FEATURES APPLICATIONS • • • 1 2 • • • • • •

MSP430G2402IPW20R

Abstract: MSP430 SLAU144 MSP430G2332IPW14 fADC10CLK structure MSP430 MSP430G2402
Contextual Info: MSP430G2x32 MSP430G2x02 SLAS723B – DECEMBER 2010 – REVISED MARCH 2011 www.ti.com MIXED SIGNAL MICROCONTROLLER FEATURES 1 • • • • • • • • Low Supply Voltage Range: 1.8 V to 3.6 V Ultra-Low Power Consumption – Active Mode: 220 µA at 1 MHz, 2.2 V

Contextual Info: SN74AUC244 OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS SCES432 – MARCH 2003 D VCC 1 20 19 2OE 18 1Y1 2 3 17 2A4 16 1Y2 4 5 15 2A3 14 1Y3 6 7 13 2A2 12 1Y4 8 9 10 11 2A1 D D D D D 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 1OE D RGY PACKAGE TOP VIEW Optimized for 1.8-V Operation and is 3.6-V

D2396

Abstract: D-74211 MAD44 ROE capacitor 220 SMC 2060 D101 D102 D112 STP3020 ROE capacitor F5 90
Contextual Info: STP3020 July 1997 SMC System Memory Controller DATA SHEET DESCRIPTION The STP3020 System Memory controller SMC interfaces to an array of DRAM and VRAM SIMMs. It accelerates graphics and imaging to main memory and frame buffers. It also provides the interface for video I/O

Contextual Info: MP7529B 5 V CMOS Dual Buffered Multiplying 8-Bit Digital-to-Analog Converter FEATURES BENEFITS • Very L o w Total H a r m o n i c Distort ion • Q u i et Op e r a t i o n in A ud i o A p p l i c a t i o n s • L o w Glitch E ne r g y • E a s y Int er f ace to M i c r o p r o c e s s o r s