MULTIBUS II BUS INTERFACE CONTROLLER Search Results

Contextual Info: 82389 MESSAGE PASSING COPROCESSOR A MULTIBUS II BUS INTERFACE CONTROLLER • Highly Integrated VLSI Device — Single-Chip Interface for the Parallel System Bus IEEE 1296 — Interrupt Handling/Bus Arbitration Functions — Dual-Buffer Input and Output DMA

BA021

Abstract: MPC32389 IEEE-1296 82389 ba021p 290145 BAD22 176526
Contextual Info: in tj 82389 MESSAGE PASSING COPROCESSOR A MULTIBUS II BUS INTERFACE CONTROLLER • Highly Integrated VLSI Device — Single-Chip Interface for the Parallel System Bus IEEE 1296 — Interrupt Handling/Bus Arbitration Functions — Dual-Buffer Input and Output DMA

Contextual Info: In te l 82389 MESSAGE PASSING COPROCESSOR A MULTIBUS II BUS INTERFACE CONTROLLER • Highly Integrated VLSI Device -Single-Chip Interface for the Parallel System Bus IEEE 1296 — Interrupt Handling/Bus Arbitration Functions — Dual-Buffer Input and Output DMA

Multibus arbitration protocol

Abstract: multibus II architecture specification BA026
Contextual Info: 82389 MESSAGE PASSING COPROCESSOR A MULTIBUS II BUS INTERFACE CONTROLLER • Highly Integrated VLSI Device — Single-Chip Interface for the Parallel System Bus IEEE 1296 — Interrupt Handling/Bus Arbitration Functions — Dual-Buffer Input and Output DMA

82389

Abstract: Multibus ii protocol BUS22 B1 intel 82389 Multibus II Bus Interface Controller IEEE-1296 Multibus arbitration protocol multibus II architecture specification multibus multibus ARCHITECTURE
Contextual Info: 82389 Message Passing Coprocessor A Multibus II Bus Interface Controller Datasheet Product Features • ■ Highly Integrated VLSI Device — Single-Chip Interface for the Parallel System Bus IEEE 1296 — Interrupt Handling/Bus Arbitration Functions — Dual-Buffer Input and Output DMA

Multibus ii protocol

Abstract: 82389 Multibus arbitration protocol 82389 Message Passing Coprocessor A Multibus II Bus IEEE-1296
Contextual Info: in te i 82389 MESSAGE PASSING COPROCESSOR A MULTIBUS II BUS INTERFACE CONTROLLER • Highly Integrated VLSI Device — Single-Chip Interface for the Parallel System Bus IEEE 1296 — Interrupt Handling/Bus Arbitration Functions — Dual-Buffer Input and Output DMA

IEEE-1296

Abstract: BA017 BA011 271091 M82389 D1301S Multibus ii protocol 176526 BA022 BAD29
Contextual Info: in te i M82389 MESSAGE PASSING COPROCESSOR A MULTIBUS II BUS INTERFACE CONTROLLER M ilita ry Highly Integrated VLSI Device — Single-Chip Interface for the Parallel System Bus — Interrupt Handling/Bus Arbitration Functions — Dual-Buffer Input and Output DMA

82389

Abstract: Multibus arbitration protocol Multibus ii protocol multibus 290145 28100* intel intel 82389
Contextual Info: intei MULTIBUS II BUS INTERFACE SILICON PRODUCTS • • • Processor Independent Interface to the Parallel System Bus Supports co-existence of dual port and message passing communication protocols Dual Buffer Input and Output DMA capabilities MFC 82389 INTERFACES

BA021

Contextual Info: M82389 MESSAGE PASSING COPROCESSOR A MULTIBUS II BUS INTERFACE CONTROLLER Military u Highly Integrated VLSI Device • High Performance Coprocessing Functions — Offloads CPU for Communication and Bus Interfacing — 40 Megabytes/Sec Burst Transfer Speed

82C389

Contextual Info: V LSI Technology, in c VM82C389 MESSAGE-PASSING COPROCESSOR MULTIBUS II FEATURES DESCRIPTION • Full-function, single-chip interface to Parallel System Bus PSB The VM82C389 Message-Passing Coprocessor (MPC) provides a highintegration interface solution for the

Multibus ii protocol

Abstract: solna d30 176526 multibus II architecture specification
Contextual Info: V L S I Tech n o lo gy , in c . _ VM82C389 MESSAGE-PASSING COPROCESSOR MULTIBUS II FEATURES DESCRIPTION • Full-function, single-chip interface to Parallel System Bus PSB The VM82C389 Message-Passing Coprocessor (MPC) provides a highintegration interface solution for the

Contextual Info: V L S I Tech n o lo gy , in c . VL82C389 MESSAGE-PASSING COPROCESSOR MULTIBUS II FEATURES DESCRIPTION • Full-function, single-chip interface to Parallel System Bus iPSB The VL82C389 Message-Passing Coprocessor (MPC) provides a highintegration interface solution for the

solna d30

Abstract: 74AS1804 AD23-AD16 bsc5 Multibus arbitration protocol AD31-AD24 vlsi technology Multibus ii protocol 8253 programme able interface 893000
Contextual Info: f 1 V L S I Tech n o lo gy , in c . _ VM82C389 MESSAGE-PASSING COPROCESSOR MULTIBUS II FEATURES DESCRIPTION • Full-function, single-chip interface to Parallel System Bus PSB The VM82C389 Message-Passing Coprocessor (MPC) provides a high­

iSBC

Abstract: Multibus II Bus Interface Controller multibus
Contextual Info: in tel. I/O BOARDS iSBC 186/530 ETHERNET CONTROLLER The iSBC 186/530 Multibus II Ethernet Controller is a dedicated IEEE 802.3 compatible front-end processor. The board’s 8 MHz 80186, 512K DRAM, and host-to-controller software download capability allows the board to off-load LAN communications functions and I/O software

28100* intel

Abstract: intel multibus
Contextual Info: intel MIX ARCHITECTURE Intel’s Modular Interface extension MIX architecture is an easily customizable I/O solution that saves development time and costs. The MIX architecture is flexible enough to offer a wide range of I/O options, modular enough to be able to track the CPU and I/O

PSB2000

Abstract: CAN Transceiver buserr mil bus
Contextual Info: P L X TECHNOLOGY CORP 3ÉE ]> • bôSSm^ 0000104 S IPLX T S t - l 3-55 PSB 2000 PSB I Reply Only Agent Controller General Description. Distinctive Features The PSB 2000 is a CMOS iPSB II Reply Only Agent controller pack­ aged in a 300 mil 24 pin DIP or 28 pin J-lead LCC. The iPSB II bus is the

Contextual Info: P L X TECHNOLOGY CORP 3ÉE ]> • bôSSm^ 0000104 S IPLX T S t - l 3-55 PSB 2000 PSB I Reply Only Agent Controller General Description. Distinctive Features The PSB 2000 is a CMOS iPSB II Reply Only Agent controller pack­ aged in a 300 mil 24 pin DIP or 28 pin J-lead LCC. The iPSB II bus is the

Multibus ii protocol

Abstract: Multibus arbitration protocol 486 system bus
Contextual Info: TO SHIBA INTEGRATED CIRCUIT BAC TECHNICAL D A T A BAC Bus Arbiter/Controller GENERAL DESCRIPTION ' The MULTIBUS II Bus Arbiter/Contro1ler (BAC) is an 84-pin, CMOS component that embodies the Arbitration and system control line functions of the MULTIBUS II

intel 8289

Abstract: 8289a 8289 bus controller SJ-33 8289 bus arbiter multibus 8289 sj33 "INTEL" "24-PIN" CERAMIC DIP arbiter chips
Contextual Info: P L X TECHNOLOGY CORP 32E D • bflSSlMI DQ00102 1 B P L X T*52-?3-55’ Multibus 1 & II_ Both Multibus I and Multibus II are supported by PLX ICs. PLX offers a solu­ tion which emulates the Intel 8289 but with lower power consumption 250mW and a maximum processor clock rate of 16MHz. Multibus II Inter­

Contextual Info: LBX 2000/2100 r LBXII Reply Agent Controller and Reply Agent Address Error Generator May 1989 Distinctive Features_ General Description_ LBX 2000: LBX 2000: • Provides a Reply Agent Control Interface to ILBXtm II

i8289

Abstract: 8289 bus controller intel d 8289 8289 bus arbiter intel 8289 8289A "INTEL" "24-PIN" CERAMIC DIP 8289
Contextual Info: P L X TECHNOLOGY CORP 32E D • bflSSlMI DQ00102 1 B P L X T*52-?3-55’ Multibus 1 & II_ Both Multibus I and Multibus II are supported by PLX ICs. PLX offers a solu­ tion which emulates the Intel 8289 but with lower power consumption 250mW and a maximum processor clock rate of 16MHz. Multibus II Inter­

Contextual Info: LBX 2000/2100 LBXII Reply Agent Controller and Reply Agent Address Error Generator January 1989 Distinctive Features_ General Description- LBX 2000: LBX 2000: * Provides a Reply Agent Control Interface to

Multibus ii protocol

Abstract: Multibus arbitration protocol
Contextual Info: TOSHIBA INTEGRATED CIRCUIT BAC 8 4 1 1 0 TE C H N IC A L D A T A BAC Bus Arbiter/Controller GENERAL DESCRIPTION The MULTIBUS II Bus Arbiter/Controller (BAC) is an 84-pin, CMOS component that embodies the Arbitration and system control line functions of the MULTIBUS II

Multibus i handbook

Contextual Info: /E X _ LBX 2000/2100 r . chnol o. v January 1989 LBX II Reply Agent Controller and Reply Agent Address Error Generator Distinctive Features. LBX 2000: * Provides a Reply Agent Control Interface to iLBXtmJJ bys. * Packaged in compact 300 mil 24 pin DIP or 28 pin J-lead