MT57 Search Results

Contextual Info: 256K x 36 2.5V VDD, HSTL, PIPELINED DDR SRAM 9Mb DDR SRAM MT57V256H36P FEATURES • • • • • • • • • • • • • • • • • • 165-Ball FBGA Fast cycle times: 5ns and 6ns 256K x 36 configuration Pipelined double data rate operation

Contextual Info: ADVANCE‡ 256K x 36 2.5V VDD, HSTL, PIPELINED DDR SRAM 9Mb DDR SRAM MT57V256H36P FEATURES • • • • • • • • • • • • • • • • • • 165-Pin FBGA Fast cycle times: 3.3ns, 4ns, 5ns and 6ns 256K x 36 configuration Pipelined double data rate operation

BW35

Contextual Info: ADVANCE‡ 4 MEG X 8, 4 MEG X 9, 2 MEG X 18, 1 MEG X 36 1.8V VDD, HSTL, DDRIIb4 SRAM 36Mb DDRII CIO SRAM 4-WORD BURST MT57W4MH8J MT57W4MH9J MT57W2MH18J MT57W1MH36J FEATURES • • • • • • • • • • • • • • • Figure 1 165-Ball FBGA

Contextual Info: PRELIMINARY‡ 2 MEG X 8, 1 MEG X 18, 512K X 36 1.8V VDD, HSTL, DDR SIO SRAM 18Mb DDR SIO SRAM 2-WORD BURST MT57W2MH8C MT57W1MH18C MT57W512H36C FEATURES • • • • • • • • • • • • • • • • • • DLL circuitry for accurate output data placement

Contextual Info: Near Infrared LED Product No: MT5 7 2 0 -I R Peak Emission Wavelength: 720nm The MT5720-IR is a near infrared T 1 3/4, 5mm water clear LED designed for applications requiring high power and high speed with the lens optimized to produce a narrow beam angle.

Contextual Info: ADVANCE‡ 1 MEG x 18, 512K x 36 2.5V VDD, HSTL, PIPELINED DDRb4 SRAM 18Mb DDR SRAM 4-Word Burst MT57V1MH18E MT57V512H36E FEATURES • • • • • • • • • • • • • • • • • 165-BALL FBGA 18Mb Density 1 Meg x 18, 512K x 36 Fast cycle times: 5ns, 6ns, and 7.5ns

Contextual Info: ADVANCE‡ 1 MEG x 18, 512K x 36 1.8V VDD, HSTL, PIPELINED DDRb2 SRAM 18Mb DDR SRAM 2-Word Burst MT57V1MH18A MT57V512H36A FEATURES • • • • • • • • • • • • • • • • • • 18Mb Density 1 Meg x 18, 512K x 36 Fast cycle times: 5ns, 6ns, and 7.5ns

Contextual Info: ADVANCE‡ Die Revision A 2 MEG x 18, 1 MEG x 36 2.5V VDD, HSTL, Pipelined DDRb2 SRAM 36Mb DDR SRAM 2-Word Burst MT57V2MH18A MT57V1MH36A Features • • • • • • • • • • • • • • • • • Figure 1: 165-Ball FBGA Fast cycle times Pipelined, double data rate operation

Contextual Info: 2 MEG X 8, 1 MEG X 18, 512K X 36 1.8V VDD, HSTL, DDRIIb2 SRAM 18Mb DDRII CIO SRAM 2-Word Burst MT57W2MH8B MT57W1MH18B MT57W512H36B FEATURES • • • • • • • • • • • • • • • • DLL circuitry for accurate output data placement Pipelined, double-data rate operation

Contextual Info: 2 MEG X 8, 1 MEG X 18, 512K X 36 1.8V VDD, HSTL, DDR SIO SRAM 18Mb DDR SIO SRAM 2-WORD BURST MT57W2MH8C MT57W1MH18C MT57W512H36C FEATURES • • • • • • • • • • • • • • • • • • DLL circuitry for accurate output data placement

Contextual Info: PRELIMINARY‡ 2 MEG X 8, 1 MEG X 18, 512K X 36 1.8V VDD, HSTL, DDR SIO SRAM 18Mb DDR SIO SRAM 2-WORD BURST MT57W2MH8C MT57W1MH18C MT57W512H36C Features • • • • • • • • • • • • • • • • • • DLL circuitry for accurate output data placement

Darlington pair IC high current

Abstract: MT5750 51M9
Contextual Info: 0000405 DARLINGTON COUPLER T -i 4\-as iaE D MARKTECH INTERNATIONAL • 57^55 fl ■ MT5750 GaAs INFRARED EMITTING DIODE & NPN SILICON PHOTO DARLINGTON flLjli H -l- APPLICATIONS • • • • • AC LINE/DIGITAL LOGIC ISOLATOR DIGITAL LOGIC/DIGITAL LOGIC ISOLATOR

Contextual Info: ADVANCE‡ 2 MEG x 8, 1 MEG x 18, 512K x 36 1.8V VDD, HSTL, DDRIIb4 SRAM 18Mb DDRII CIO SRAM MT57W2MH8J MT57W1MH18J MT57W512H36J 4-Word Burst FEATURES • 18Mb Density 2 Meg x 8, 1 Meg x 18, 512K x 36 • DLL circuitry for wide-output, data valid window

Contextual Info: ADVANCE‡ 2 MEG X 8, 1 MEG X 18, 512K X 36 1.8V VDD, HSTL, DDRIIb2 SRAM 18Mb DDRII CIO SRAM 2-Word Burst MT57W2MH8B MT57W1MH18B MT57W512H36B FEATURES • DLL circuitry for wide-output, data valid window, and future frequency scaling • Pipelined, double-data rate operation

MT57V1MH18E

Abstract: MT57V512H36E
Contextual Info: 1 MEG x 18, 512K x 36 2.5V VDD, HSTL, PIPELINED DDRb4 SRAM 18Mb DDR SRAM 4-Word Burst MT57V1MH18E MT57V512H36E FEATURES • • • • • • • • • • • • • • • • 165-BALL FBGA Fast cycle times: 5ns, 6ns, and 7.5ns Pipelined double data rate operation

MT57W1MH18C

Abstract: MT57W2MH8C MT57W512H36C
Contextual Info: ADVANCE‡ 2 MEG X 8, 1 MEG X 18, 512K X 36 1.8V VDD, HSTL, DDR SIO SRAM 18Mb DDR SIO SRAM 2-WORD BURST MT57W2MH8C MT57W1MH18C MT57W512H36C FEATURES • DLL circuitry for wide-output, data valid window, and future frequency scaling • Separate independent read and write data ports

Contextual Info: ADVANCE 25 6 K x 1 8 / 1 2 8K x 36 3. 3V V dd , H S T L , P I P E L I N E D C L A Y M O R E S R A M MICRON U TECHNOLOGY, INC. MT57L256H18P MT57L128H36P 4.5Mb C L A Y M O R E SRAM FEATURES Fast cycle tim es: 4.4ns, 5ns, 5.5n s, 6ns and 7ns * 256K x 18 and 128K x 36 con fig u ration s

micron sram

Abstract: G38-87 MT57W1MH18C MT57W2MH8C MT57W512H36C
Contextual Info: 2 MEG X 8, 1 MEG X 18, 512K X 36 1.8V VDD, HSTL, DDR SIO SRAM 18Mb DDR SIO SRAM 2-WORD BURST MT57W2MH8C MT57W1MH18C MT57W512H36C Features • • • • • • • • • • • • • • • • • • DLL circuitry for accurate output data placement

MT57W2MH8B

Abstract: MT57W512H36B MT57W1MH18B
Contextual Info: 2 MEG X 8, 1 MEG X 18, 512K X 36 1.8V VDD, HSTL, DDRIIb2 SRAM 18Mb DDRII CIO SRAM 2-Word Burst MT57W2MH8B MT57W1MH18B MT57W512H36B Features • • • • • • • • • • • • • • • • • DLL circuitry for accurate output data placement

Contextual Info: PRELIMINARY‡ 2 MEG X 8, 1 MEG X 18, 512K X 36 1.8V VDD, HSTL, DDRIIb4 SRAM 18Mb DDRII CIO SRAM 4-WORD BURST MT57W2MH8J MT57W1MH18J MT57W512H36J Features • • • • • • • • • • • • • • • • DLL circuitry for accurate output data placement

Contextual Info: ADVANCE‡ 2 MEG x 8, 1 MEG x 18, 512K x 36 1.8V VDD, HSTL, DDRIIb4 SRAM 18Mb DDRII CIO SRAM MT57W2MH8J MT57W1MH18J MT57W512H36J 4-Word Burst FEATURES • 18Mb Density 2 Meg x 8, 1 Meg x 18, 512K x 36 • DLL circuitry for wide-output, data valid window

Contextual Info: ADVANCE 256K x 36 2.5V VDD, HSTL, PIPELINED DDR SRAM 9Mb DDR SRAM MT57V256H36P FEATURES • • • • • • • • • • • • • • • • • • 165-Pin FBGA Fast cycle times: 3.3ns, 4ns, 5ns and 6ns 256K x 36 configuration Pipelined double data rate operation

Contextual Info: ADVANCE‡ 4 MEG X 8, 4 MEG X 9, 2 MEG X 18, 1 MEG X 36 1.8V VDD, HSTL, DDR SIO SRAM 36Mb DDR SIO SRAM 2-WORD BURST MT57W4MH8C MT57W4MH9C MT57W2MH18C MT57W1MH36C FEATURES • • • • • • • • • • • • • • • • • Figure 1 165-Ball FBGA

Contextual Info: PRELIMINARY‡ 2 MEG X 8, 1 MEG X 18, 512K X 36 1.8V VDD, HSTL, DDRIIb2 SRAM 18Mb DDRII CIO SRAM 2-Word Burst MT57W2MH8B MT57W1MH18B MT57W512H36B Features • • • • • • • • • • • • • • • • • DLL circuitry for accurate output data placement