MRS DIP Search Results

Contextual Info: Macurco Modbus RS-485 Adapter MRS-485 For use with Macurco 6-Series™ Detectors Addressable Gas Detection and Control The Macurco MRS-485 adapter is an accessory used to convert the 4-20mA analog signal from Macurco 6-Series type detectors to a digital signal for use with multipoint addressable systems. The Macurco MRS-485 simply plugs

mp574a

Contextual Info: MICRO POWER SYSTEMS INC • LIE » b[n7444 0DD4535 475 ■ MRS "T-S'lMP574A Complete 12-Bit, 20|isec Analog-to-Digital Converter with Microprocessor Interface m Micro Power Systems FEATURES Fast Conversion 20 (isec Precision Reference for Long Term Stability

W942508AH

Abstract: W942516AH
Contextual Info: Preliminary W942516AH 4M x 4 BANKS × 16 BIT DDR SDRAM Table of Contents1. GENERAL DESCRIPTION .3 2. FEATURES .3

W942504AH

Abstract: W942508AH W942516AH
Contextual Info: Preliminary W942504AH 16M x 4 BANKS × 4 BIT DDR SDRAM Table of Contents1. GENERAL DESCRIPTION .3 2. FEATURES .3

W942508BH

Abstract: W942516BH W942516BH-6
Contextual Info: W942516BH-6 4M x 4 BANKS × 16 BIT DDR SDRAM Table of Contents1. GENERAL DESCRIPTION .3 2. FEATURES .3

W942508BH

Abstract: W942516AH W942516BH
Contextual Info: W942504BH 16M x 4 BANKS × 4 BIT DDR SDRAM Table of Contents1. GENERAL DESCRIPTION .3 2. FEATURES .3

qualcomm PoP

Abstract: K4V1G323PC-S K4V1G323PC-XGC6000
Contextual Info: Page 1 of 1 From: Hank Lai-SSI [ mailto:HLai@ssi.samsung.com] Sent: Friday, August 18, 2006 2:29 PM To: Gigglberger, Alex Cc: Scott Cameron-Bestronics; Aurora Anderson-Bestronics; Jae Won Kim-SSI Subject: RE: Samsung meeting materials Hi, Alex: During the last Friday meeting, we suggest that you may consider using POP in order to achieve higher speed

V56C1512164MD

Contextual Info: V56C1512164MD HIGH PERFORMANCE MOBILE 1.8 VOLT 32M X 16 DDR SDRAM 4 BANKS X 8M X 16 5 6 75 10 unit System Frequency fCK 400 MHz 333 MHz 266 MHz 200 MHz MHz Clock Cycle Time (tCK3) 5.0 6.0 7.5 10.0 ns Output data access Time (tCK3) Features Description -

V56C1512164MD

Contextual Info: V56C1512164MD HIGH PERFORMANCE MOBILE 1.8 VOLT 32M X 16 DDR SDRAM 4 BANKS X 8M X 16 5 6 75 10 unit System Frequency fCK 200 MHz 166 MHz 133 MHz 100 MHz MHz Clock Cycle Time (tCK3) 5.0 6.0 7.5 10.0 ns Output data access Time (tCK3) Features Description -

Contextual Info: V56C1512164MD HIGH PERFORMANCE MOBILE 1.8 VOLT 32M X 16 DDR SDRAM 4 BANKS X 8M X 16 5 6 75 10 unit System Frequency fCK 400 MHz 333 MHz 266 MHz 200 MHz MHz Clock Cycle Time (tCK3) 5.0 6.0 7.5 10.0 ns Output data access Time (tCK3) Features Description -

V56C1512164MD

Contextual Info: V56C1512164MD HIGH PERFORMANCE MOBILE 1.8 VOLT 32M X 16 DDR SDRAM 4 BANKS X 8M X 16 5 6 75 10 unit System Frequency fCK 200 MHz 166 MHz 133 MHz 100 MHz MHz Clock Cycle Time (tCK3) 5.0 6.0 7.5 10.0 ns Output data access Time (tCK3) Features Description -

Contextual Info: K4C5608/1638C 256Mb Network-DRAM Network-DRAM Specification Version 0.5 - 1 - REV. 0.5 Nov. 2002 K4C5608/1638C 256Mb Network-DRAM Revision History Version 0.0 Oct. / 5 / 2001 - First Release Version 0.1 (Dec. / 15 / 2001) - The product name is changed to Network-DRAM

MCP 67 MV- A2

Abstract: K5D1G13ACD SAMSUNG MCP MCP MEMORY K5D1G K5D1G1 K5D1G13 SAMSUNG MCP Qualification Report 137FBGA k5d1g13a
Contextual Info: Target K5D1G13ACD-D075 MCP MEMORY MCP Specification 1Gb NAND Flash + 512Mb Mobile SDRAM INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE. NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,

DDR3-1066

Abstract: DDR3-1333 L9D320G32BG6 0-575V
Contextual Info: ADVANCE INFORMATION L9D320G32BG6 2.0 Gb, DDR3, 64 M x 32 Integrated Module IMOD Benefits FEATURES DDR3 Integrated Module [iMOD]: • Vcc=VccQ=1.5V ± 0.075V • 1.5V center-terminated, push/pull I/O • Package: 16mm x 12mm, 10 x 13 matrix w/ 129 balls • Matrix ball pitch: 1.00mm

L9D340G64BG2I15

Abstract: DDR3-1066 DDR3-1333 L9D340G64B L9D340G64BG2
Contextual Info: PRELIMINARY INFORMATION L9D340G64BG2 4.0 Gb, DDR3, 64 M x 64 Integrated Module IMOD Benefits FEATURES DDR3 Integrated Module [iMOD]: • Vcc=VccQ=1.5V ± 0.075V • 1.5V center-terminated, push/pull I/O • Package: 16mm x 22mm, 13 x 21 matrix w/ 271balls

Contextual Info: T O SH IB A TC59LM814/06/02BFT-22,-24,-30 TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC 4,194,304-WORDSX4BANKSX16-BITS DOUBLE DATA RATE FAST CYCLE RAM 8,388,608-WORDSX4BANKSX8-BITS DOUBLE DATA RATE FAST CYCLE RAM 16,777,216-WORDSX4BANKSX4-BITS DOUBLE DATA RATE FAST CYCLE RAM

b10 45g

Abstract: srt 8n PS-AC150 DDR3-1066 DDR3-1333
Contextual Info: ADVANCE INFORMATION L9D345G72BG5 4.5 Gb, DDR3, 64 M x 72 Integrated Module IMOD Benefits FEATURES DDR3 Integrated Module [iMOD]: • Vcc=VccQ=1.5V ± 0.075V • 1.5V center-terminated, push/pull I/O • Package: 25mm x 25mm, 16 x 16 matrix w/ 255 balls • Matrix ball pitch: 1.00mm

AGQF

Contextual Info: 2Gb: x4, x8, x16 DDR3 SRAM Features DDR3 SDRAM SGG512M4 – 64 Meg x 4 x 8 Banks SGG256M8 – 32 Meg x 8 x 8 Banks SGG128M16 – 16 Meg x 16 x 8 Banks Features Options • • • • • • • • SpecTek Memory • • • • • • • • • •

D80008

Contextual Info: PRELIMINARY INFORMATION L9D340G64BG2 4.0 Gb, DDR3, 64 M x 64 Integrated Module IMOD Benefits FEATURES DDR3 Integrated Module [iMOD]: 1 00 1 enter-ter inated, u ull IO a age: 16 22 , 13 21 atri 2 1 all Matri all it : 1 00 S a e a ing oot rint er all en an ed, I edan e

D1GE

Contextual Info: TOSHIBA THMD1GE0SB70,75,80 TENTATIVE TOSHIBA HYBRID DIGITAL INTEGRATED CIRCUIT 134,217,728-WORD BY 72-BIT DDR SYNCHRONOUS DRAM MODULE DESCRIPTION The THMD1GE0SB is a 134,217,728-word by 72-bit Double Data Rate synchronous dynamic RAM module consisting of 36 TC59WM803BFT DRAMs and PLL/Registers on a printed circuit board.

16M x 16 DDR TSOP-66

Abstract: DDR333 DDR400 IS43R16160A
Contextual Info: ISSI IS43R16160A 16Meg x 16 256-MBIT DDR SDRAM PRELIMINARY INFORMATION NOVEMBER 2005 FEATURES DEVICE OVERVIEW • • ISSI’s 256-Mbit DDR SDRAM achieves high-speed data transfer using pipeline architecture and two data word accesses per clock cycle. The 268,435,456-bit memory

ISSI 742

Contextual Info: ISSI IS43R16160A 16Meg x 16 256-MBIT DDR SDRAM PRELIMINARY INFORMATION AUGUST 2005 FEATURES DEVICE OVERVIEW • • ISSI’s 256-Mbit DDR SDRAM achieves high-speed data transfer using pipeline architecture and two data word accesses per clock cycle. The 268,435,456-bit memory

64Mx16

Contextual Info: V58C2256 804/404/164 SC HIGH PERFORMANCE 256 Mbit DDR SDRAM 4 BANKS X 8Mbit X 8 (804) 4 BANKS X 4Mbit X 16 (164) 4 BANKS X 16Mbit X 4 (404) 5B 5 6 7 DDR400 DDR400 DDR333 DDR266 7.5 ns 7.5 ns 7.5 ns 7.5ns Clock Cycle Time (tCK2.5) 5ns 6ns 6 ns 7ns Clock Cycle Time (tCK3)

Contextual Info: V58C2128 804/404/164 SC HIGH PERFORMANCE 128 Mbit DDR SDRAM 4 BANKS X 4Mbit X 8 (804) 4 BANKS X 2Mbit X 16 (164) 4 BANKS X 8Mbit X 4 (404) 4 5 6 DDR500 DDR400 DDR333 7.5 ns 7.5 ns 7.5 ns Clock Cycle Time (tCK2.5) 6ns 6ns 6 ns Clock Cycle Time (tCK3) 4ns 5ns