MRS DIP Search Results

Contextual Info: Macurco Modbus RS-485 Adapter MRS-485 For use with Macurco 6-Series™ Detectors Addressable Gas Detection and Control The Macurco MRS-485 adapter is an accessory used to convert the 4-20mA analog signal from Macurco 6-Series type detectors to a digital signal for use with multipoint addressable systems. The Macurco MRS-485 simply plugs

mp574a

Contextual Info: MICRO POWER SYSTEMS INC • LIE » b[n7444 0DD4535 475 ■ MRS "T-S'lMP574A Complete 12-Bit, 20|isec Analog-to-Digital Converter with Microprocessor Interface m Micro Power Systems FEATURES Fast Conversion 20 (isec Precision Reference for Long Term Stability

z3 IB

Contextual Info: b H A R P /f T v y y- SPEC Na 1 MRS 4 X 1 1 Oct. 19 1394 I SSUE: To IP R E L I M I N A R Y S P E C I F I C A T I ONS Li Product Type 1M b I t L H lo d a i Ko. 5 i * Ma s k ft OM_ H l! 0 X X L H 5 3 H 1 0 00r> Utls derlcs specification is. subject ta change without notice.

W942508AH

Abstract: W942516AH
Contextual Info: Preliminary W942516AH 4M x 4 BANKS × 16 BIT DDR SDRAM Table of Contents1. GENERAL DESCRIPTION .3 2. FEATURES .3

W942504AH

Abstract: W942508AH W942516AH
Contextual Info: Preliminary W942504AH 16M x 4 BANKS × 4 BIT DDR SDRAM Table of Contents1. GENERAL DESCRIPTION .3 2. FEATURES .3

W942504AH

Abstract: W942508AH W942516AH
Contextual Info: W942504AH 16M x 4 BANKS × 4 BIT DDR SDRAM Table of Contents1. GENERAL DESCRIPTION .3 2. FEATURES .3

W942508BH

Abstract: W942516BH W942516BH-6
Contextual Info: W942516BH-6 4M x 4 BANKS × 16 BIT DDR SDRAM Table of Contents1. GENERAL DESCRIPTION .3 2. FEATURES .3

W942508AH

Abstract: W942516AH W942516AH-6
Contextual Info: W942516AH-6 4M x 4 BANKS × 16 BIT DDR SDRAM Table of Contents1. GENERAL DESCRIPTION .3 2. FEATURES .3

144L

Abstract: DDR400 DDR500
Contextual Info: W9464G2IB 512K x 4 BANKS × 32 BITS GDDR SDRAM Table of Contents1. GENERAL DESCRIPTION .4 2. FEATURES .4

144L

Abstract: DDR500 w9412g2
Contextual Info: W9412G2IB 1M x 4 BANKS × 32 BITS GDDR SDRAM Table of Contents1. GENERAL DESCRIPTION .4 2. FEATURES .4

W942508BH

Abstract: W942516BH
Contextual Info: W942516BH 4M x 4 BANKS × 16 BIT DDR SDRAM Table of Contents1. GENERAL DESCRIPTION .3 2. FEATURES .3

Contextual Info: W9412G2IB 1M x 4 BANKS × 32 BITS GDDR SDRAM Table of Contents1. GENERAL DESCRIPTION .4 2. FEATURES .4

W942508BH

Abstract: W942516AH W942516BH
Contextual Info: W942504BH 16M x 4 BANKS × 4 BIT DDR SDRAM Table of Contents1. GENERAL DESCRIPTION .3 2. FEATURES .3

W942508AH

Abstract: W942516AH
Contextual Info: W942516AH 4M x 4 BANKS × 16 BIT DDR SDRAM Table of Contents1. GENERAL DESCRIPTION .3 2. FEATURES .3

Contextual Info: W9412G2IB 1M x 4 BANKS × 32 BITS GDDR SDRAM Table of Contents1. GENERAL DESCRIPTION .4 2. FEATURES .4

w9412g2IB

Contextual Info: W9412G2IB 1M x 4 BANKS × 32 BITS GDDR SDRAM Table of Contents1. GENERAL DESCRIPTION .4 2. FEATURES .4

144L

Abstract: DDR500
Contextual Info: PRELIMINARY W9464G2IB 512K x 4 BANKS × 32 BITS GDDR SDRAM Table of Contents1. GENERAL DESCRIPTION .4 2. FEATURES .4

w9412g2

Abstract: 144L DDR500
Contextual Info: W9412G2IB 1M x 4 BANKS × 32 BITS GDDR SDRAM Table of Contents1. GENERAL DESCRIPTION .4 2. FEATURES .4

Contextual Info: W9412G2CB 1M x 4 BANKS × 32 BITS GDDR SDRAM Table of Contents1. GENERAL DESCRIPTION .4 2. FEATURES .4

144L

Abstract: 400M W9412G2CB
Contextual Info: W9412G2CB 1M x 4 BANKS × 32 BITS GDDR SDRAM Table of Contents1. GENERAL DESCRIPTION .4 2. FEATURES .4

qualcomm PoP

Abstract: K4V1G323PC-S K4V1G323PC-XGC6000
Contextual Info: Page 1 of 1 From: Hank Lai-SSI [ mailto:HLai@ssi.samsung.com] Sent: Friday, August 18, 2006 2:29 PM To: Gigglberger, Alex Cc: Scott Cameron-Bestronics; Aurora Anderson-Bestronics; Jae Won Kim-SSI Subject: RE: Samsung meeting materials Hi, Alex: During the last Friday meeting, we suggest that you may consider using POP in order to achieve higher speed

V56C1512164MD

Contextual Info: V56C1512164MD HIGH PERFORMANCE MOBILE 1.8 VOLT 32M X 16 DDR SDRAM 4 BANKS X 8M X 16 5 6 75 10 unit System Frequency fCK 400 MHz 333 MHz 266 MHz 200 MHz MHz Clock Cycle Time (tCK3) 5.0 6.0 7.5 10.0 ns Output data access Time (tCK3) Features Description -

V56C1512164MD

Contextual Info: V56C1512164MD HIGH PERFORMANCE MOBILE 1.8 VOLT 32M X 16 DDR SDRAM 4 BANKS X 8M X 16 5 6 75 10 unit System Frequency fCK 200 MHz 166 MHz 133 MHz 100 MHz MHz Clock Cycle Time (tCK3) 5.0 6.0 7.5 10.0 ns Output data access Time (tCK3) Features Description -

Contextual Info: V56C1512164MD HIGH PERFORMANCE MOBILE 1.8 VOLT 32M X 16 DDR SDRAM 4 BANKS X 8M X 16 5 6 75 10 unit System Frequency fCK 400 MHz 333 MHz 266 MHz 200 MHz MHz Clock Cycle Time (tCK3) 5.0 6.0 7.5 10.0 ns Output data access Time (tCK3) Features Description -