MR 85 100 Search Results

Contextual Info: Multi-Rate GBIC Transceiver Preliminary GBIC-MR-SR1 Features • Multi-Rate 100 Mbps to 2.7 Gbps • Single 5 V supply • 2km reach • 16dB typical link budget • 0 to 70º C Temperature Operation GBIC-MR-SR1 • -40 to 85ºC Temperature Operation (GBIC-MR-SR1-T)

k 3683

Abstract: circuit k 3683 amp 4953 circuit 4953
Contextual Info: THIS MAMMA & UMMJBUSUEGl COPTWQHT 1— K L ftttt JPM r MiBüúMtMl-ALL UMJUIb UUHJM4. IK REVISIONS DO T ES 00 BY TVCO EUCTHOWCB CORRORUKM. 9n mr RELEASE HT w "wir R.H I.E 31AU604 FJBO—0884— 04 CIRCUIT N O .n 'S « 85 o> m (RECEPTACLE HOUSING A

Contextual Info: Mr a n A M P co m p a n y 19.5 dB Bi-Directional Coupler 0.5 - 400 MHz Features CH-/CHS-137 RH-1 2 • Low Cost • Convenient Plug-In Mounting • Fully Hennetic Package CHS-137 Guaranteed Specifications* (From -55°C to +85°C) Frequency Range Coupling

Contextual Info: AJÎK Mr a n A M P co m pa n y SP4T RF Switch 10-2000 MHz SW-114 Features • • • • DI-2 Ultra B roadband High Isolation - 60 dB Typical Integral TTL Driver Herm etic Package Guaranteed Specifications* From -5 5 ° C to +85°C Frequency Range Insertion Loss

TRANSISTOR 1003

Contextual Info: S-1003 Series www.sii-ic.com MANUAL RESET BUILT-IN DELAY CIRCUIT EXTERNAL DELAY TIME SETTING HIGH-ACCURACY VOLTAGE DETECTOR Rev.1.0_00 Seiko Instruments Inc., 2013 The S-1003 Series is a high-accuracy voltage detector developed using CMOS technology. The detection voltage is fixed

AADS

Abstract: MAX634 MAX6342 MAX6343 MAX6344 MAX6345 AADU AADT AACR
Contextual Info: 19-1568; Rev 0; 10/99 6-Pin µP Reset Circuit with Power-Fail Comparator Features ♦ Small 6-Pin SOT23 Package ♦ Precision Factory-Set VCC Reset Thresholds Between 2.33V and 4.63V ♦ Guaranteed RESET Valid to VCC = +1V ♦ 100ms min Reset Pulse Width ♦ Debounced CMOS-Compatible Manual-Reset

MAX634

Abstract: MAX6342 MAX6343 MAX6344 MAX6345
Contextual Info: 19-1568; Rev 1; 3/00 6-Pin µP Reset Circuit with Power-Fail Comparator Features ♦ Small 6-Pin SOT23 Package ♦ Precision Factory-Set VCC Reset Thresholds Between 2.33V and 4.63V ♦ Guaranteed RESET Valid to VCC = +1V ♦ 100ms min Reset Pulse Width ♦ Debounced CMOS-Compatible Manual-Reset

Contextual Info: * SYNERGY H E X D F L IP ' F L 0 P SY100S351 SEMICONDUCTOR DESCRIPTION FEATURES Max. toggle frequency of 700MHz Clock to Q max. of 1200ps Ie e min. of -98mA ESD protection of 2000V Industry standard 100K ECL levels Extended supply voltage option: Vee = -4.2V to -5.5V

Contextual Info: * TRIPLE D FLIP-FLOP SYNERGY SEMICONDUCTOR SY100S331 DESCRIPTION FEATURES • Max. toggle frequency of 800MHz ■ Differential outputs ■ I ee min. of -80m A ■ ESD protection of 2000V ■ Industry standard 100K ECL levels ■ Extended supply voltage option:

ADM706P

Abstract: ADM706S ADM706T ADM708R ADM708S ADM708T
Contextual Info: a FEATURES Precision Supply-Voltage Monitor +2.63 V ADM706P/R, ADM708R +2.93 V (ADM706S, ADM708S) +3.08 V (ADM706T, ADM708T) 100 µA Quiescent Current 200 ms Reset Pulse Width Debounced Manual Reset Input (MR) Independent Watchdog Timer—1.6 sec Timeout

F100K

Contextual Info: 100351 Low Power Hex D Flip-Flop General Description Features The 100351 contains six D-type edge-triggered, master/ slave flip-flops with true and complement outputs, a pair of common Clock inputs CPa and CPb and common Master Reset (MR) input. Data enters a master when both CPa and

Contextual Info: « HEX D-LATCH SYNERGY SY100S350 SEMICONDUCTOR DESCRIPTION FEATURES • Max. transparent propagation delay of 900ps ■ Min. Master Reset and Enable pulse widths of 100ps ■ I ee mln. of -98m A ■ ESD protection of 2000V ■ Industry standard 100K ECL levels

SMJ320C6201B

Abstract: TPS3307 TPS3307-18 TPS3307-18M TPS3307-18MFKB TPS3307-18MJGB
Contextual Info: TPS3307-18M TRIPLE PROCESSOR SUPERVISORS SGLS133 – JANUARY 2003 D Qualified for Military Applications D ESD Protection Exceeds 2000 V Per 100 nF SENSE 1 SENSE 2 5 V DD 2 1 20 19 NC NC 3 NC 4 18 NC SENSE2 5 17 MR NC 6 16 NC SENSE3 7 15 RESET NC 8 14 NC NC

Contextual Info: * TRIPLE D FLIP-FLOP SYNERGY SY100S331 SEMICONDUCTOR FEATURES DESCRIPTION • Max. toggle frequency of 800MHz ■ Differential outputs ■ I e e min. of -80m A ■ ESD protection of 2000V ■ Industry standard 100K ECL levels ■ Extended supply voltage option:

Contextual Info: Revised August 2000 100351 Low Power Hex D-Type Flip-Flop General Description Features The 100351 contains six D-type edge-triggered, master/ slave flip-flops with true and complement outputs, a pair of common Clock inputs CPa and CPb and common Master Reset (MR) input. Data enters a master when both CPa

100351SC

Abstract: 100351PC 100351QC 100351QI M24B MO-047 MS-013 N24E V28A
Contextual Info: Revised August 2000 100351 Low Power Hex D-Type Flip-Flop General Description Features The 100351 contains six D-type edge-triggered, master/ slave flip-flops with true and complement outputs, a pair of common Clock inputs CPa and CPb and common Master Reset (MR) input. Data enters a master when both CPa

Contextual Info: Semi co n d u July 1992 t o r 100351 Low Power Hex D Flip-Flop General Description Features The 100351 contains six D-type edge-triggered, master/ slave flip-flops with true and complement outputs, a pair of common Clock inputs CPa and CPt, and common Master

MAX6316

Abstract: 940 629 MOTOROLA 220 68HC11 MAX6316L MAX6316M MAX6322 MAX6320PUK29CY-T ic 4060 as timer MAX6340 MAX6320
Contextual Info: 19-0496; Rev 5; 9/02 5-Pin µP Supervisory Circuits with Watchdog and Manual Reset _Features ♦ Small 5-Pin SOT23 Package ♦ Available in 26 Reset Threshold Voltages 2.5V to 5V, in 100mV Increments ♦ Four Reset Timeout Periods

Contextual Info: * QUAD MULTIPLEXER/ LATCH SYNERGY SEMICONDUCTOR FEATURES SY100S355 DESCRIPTION • Max. propagation delay of 1100ps ■ Max. enable to output delay of I400ps ■ I ee min. of -80m A ■ ESD protection of 2000V ■ Industry standard 100K ECL levels ■ Extended supply voltage option:

Contextual Info: * 4-STAGE COUNTER/ SHIFT REGISTER SYNERGY SEMICONDUCTOR FEATURES DESCRIPTION • Max. shift frequency of 700MHz ■ Clock to Q delay max. of 1lOOps ■ lEEmln. of -170mA ■ ESD protection of 2000V ■ Internal 75KO input pull-down resistors ■ Industry standard 100K ECL levels

4490 debounce

Contextual Info: Supervisory Circuits with Watchdog and Manual Reset in 5-Lead SOT-23 ADM6316–ADM6322 Preliminary Technical Data FEATURES FUNCTIONAL BLOCK DIAGRAM 26 Reset Threshold Options: 2.5V to 5V in 100mV Increments 4 Reset Timeout Options: 1ms, 20ms, 140ms and 1120ms Min

n04 sot 23

Abstract: ADM6316 ADM6317 ADM6318 ADM6319 ADM6320 ADM6321 ADM6322 transistor on 4408
Contextual Info: Supervisory Circuits with Watchdog and Manual Reset in 5-Lead SOT-23 FEATURES FUNCTIONAL BLOCK DIAGRAMS 26 reset threshold options 2.5 V to 5 V in 100 mV increments 4 reset timeout options 1 ms, 20 ms, 140 ms, and 1120 ms minimum

Contextual Info: TPS3307Ć18M TRIPLE PROCESSOR SUPERVISORS SGLS133A − JANUARY 2003 − REVISED DECEMBER 2003 D Qualified for Military Applications D ESD Protection Exceeds 2000 V Per 100 nF SENSE 1 SENSE 2 5 V DD 2 1 20 19 NC NC 3 NC 4 18 NC SENSE2 5 17 MR NC 6 16 NC SENSE3

Contextual Info: TPS3307Ć18M TRIPLE PROCESSOR SUPERVISORS SGLS133A − JANUARY 2003 − REVISED DECEMBER 2003 D Qualified for Military Applications D ESD Protection Exceeds 2000 V Per 100 nF SENSE 1 SENSE 2 5 V DD 2 1 20 19 NC NC 3 NC 4 18 NC SENSE2 5 17 MR NC 6 16 NC SENSE3