MICROSPARC RISC PROCESSOR Search Results

Contextual Info: STPIOIO July 1994 microSPARC DATA SHEET Highly Integrated 32-Bit RISC Microprocessor D e sc r ipt io n The microSPARC 32-bit microprocessor is a highly integrated RISC CPU Implementing the SPARC Architecture ver.8. Due to its relative high performance and low cost, it is ideally suited for low-cost

STP1010

Abstract: microsparc microsparc 1 STP1010TAB-50 microsparc RISC processor sun microsystem microprocessor
Contextual Info: STPIOIO July 1994 microSPARC TM DATA SHEET Highly Integrated 32-Bit RISC Microprocessor D e s c r ip t io n The microSPARC 32-bit microprocessor is a highly integrated RISC CPU Implementing the SPARC Architecture ver.8. Due to its relative high performance and low cost, it is ideally suited for low-cost

STP1010

Contextual Info: ^S un STP101 July 1994 m icroSP A R C DATA SHEET Highly Integrated 32-Bit RISC Microprocessor D escription The microSPARC 32-bit microprocessor is a highly integrated RISC CPU Implementing the SPARC Architecture ver.8. Due to its relative high performance and low cost, it is ideally suited for low-eost

mb86904

Abstract: stp1012pga o124T SPARC v8 architecture BLOCK DIAGRAM nana lhc B235A
Contextual Info: P relim i iì u n STP1012 SPARC Technology Business June 1995 m ic r o S P A R C -I I DMA SHEET Highly Integrated 32-Bit RISC Microprocessor D esc r ip tio n The microSPARC-II 32-bit microprocessor is a highly integrated, high-performance microprocessor. Implementing

l0248

Abstract: 209me footprint pga 208 DR-24V SPARC v8 architecture BLOCK DIAGRAM stp1012ap
Contextual Info: Preliminary S P A R C T ech nology STP1012A Business June 1995 m icro S P A R C 4 I DATA SHEET D Highly Integrated 32-Bit RISC Microprocessor escription The microSPARC-II 32-bit microprocessor is a highly integrated, high-performance microproces­ sor. Implementing the SPARC Architecture v8 specification, it is ideally suited for low-cost

microsparc RISC processor

Abstract: 720x576 audio encoder mpeg 1 common interface CCIR601 CCIR656 OTI-8215 microsparc 1
Contextual Info: OH-8215 omncmoíoct, Integrated Digital Broadcast MPEG-2 Decoder product_ features The OTI-8215 is a highly integrated, single-chip set-top box STB /DTV solution. Description - MPEG-2<1S013818) and MPEG-1 {ISO 11172 } bit streams, M P@ M l - MPEG audio layers t &

Contextual Info: Microprocessors STP1012: microSPARC -ll SPARC v8 32-Bit Microprocessor With DRAM Interface. 5 D

SPARC v9 architecture BLOCK DIAGRAM

Contextual Info: Preliminary STP1100BGA July 1997 microSPARC -IIep DATA SHEET SPARC v8 32-Bit Microprocessor With PCI/DRAM Interfaces DESCRIPTION The microSPARC-IIep 32-bit microprocessor is a highly integrated, high-performance microprocessor. Implementing the SPARC Architecture version 8 specification, it is ideally suited for low-cost uniprocessor

mb86904

Abstract: STP1012PGA STP1012PGA-85 microsparc RISC processor STP2001 SPARC v8 architecture BLOCK DIAGRAM MB8690 microsparc SPARC 7 sparc v8
Contextual Info: STP1012 July 1997 microSPARC -II DATA SHEET SPARC v8 32-Bit Microprocessor With DRAM Interface DESCRIPTION The microSPARC-II 32-bit microprocessor is a highly integrated, high-performance microprocessor. Implementing the SPARC Architecture v8 specification, it is ideally suited for low-cost uniprocessor applications.

ET 8211

Abstract: deod
Contextual Info: T E C ! n § L § e Y O T I-8 2 1 1 MPEG-2 Decoder for Digital Television Systems product _ features * Operateson IS 0 11172 MPEG-1 and The OTI-8211 is a highly integrated, single-chip real-time decoder for video and audio decompression as well as demultiplexing of MPEG system level

OTI-7000

Abstract: Oak oti-7000 sharp tv audio section diagram EN-50221 D-80999 oak technology Video-Encoder CCIR601 OTI-8215 OTI-8511
Contextual Info: O A K T E C H N O L O G Y OTI-8215 Integrated Digital Broadcast MPEG-2 Decoder product features • MPEG audio and video A/V decoder - MPEG-2 (ISO 13818) and MPEG-1 (ISO 11172) bit streams, MP@ML - MPEG audio layers 1 & 2 • Integrated demux accepts transport,

rh10

Abstract: DVxcel MPEG-2 C-Cube C-Cube decoder mpeg dvd decoder output ITU 656
Contextual Info: DVXCEL MPEG-2 VIDEO CODEC ADVANCED MPEG-2 VIDEO AND SYSTEM CODEC FOR CONSUMER APPLICATIONS OVERVIEW The DVxcel MPEG-2 Video CODEC from C-Cube Microsystems is a high-quality single-chip digital video processing solution ideal for consumer digital recordable products. DVxcel is an MPEG-2 video and system

sparc v8

Abstract: microsparc microsparc I SPARC T4
Contextual Info: S un M icro electro nics July 1997 microSPARC -llep DATA SHEET SPARC v8 32-Bit Microprocessor With PCI/DRAM Interfaces D e s c r ip t io n The microSPARC-IIep 32-bit microprocessor is a highly integrated, high-performance microprocessor. Imple­ menting the SPARC Architecture version 8 specification, it is ideally suited for low-cost uniprocessor

instruction set Sun SPARC T3

Abstract: sparc v8 SPARC v8 architecture BLOCK DIAGRAM sun sparc v5 microsparc microsparc RISC processor SPARC 7 WD 969 microsparc I STP1100BGA-100
Contextual Info: Preliminary STP1100BGA December 1997 microSPARC -IIep DATA SHEET SPARC v8 32-Bit Microprocessor With PCI/DRAM Interfaces DESCRIPTION The microSPARC-IIep 32-bit microprocessor is a highly integrated, high-performance microprocessor. Implementing the SPARC Architecture version 8 specification, it is ideally suited for low-cost uniprocessor

STP1100BGA-100

Abstract: "32-Bit Microprocessor" SPARC v8 architecture BLOCK DIAGRAM SPARC V8
Contextual Info: Preliminary STP1100BGA July 1997 microSPARC -IIep DATA SHEET SPARC v8 32-Bit Microprocessor With PCI/DRAM Interfaces DESCRIPTION The microSPARC-IIep 32-bit microprocessor is a highly integrated, high-performance microprocessor. Implementing the SPARC Architecture version 8 specification, it is ideally suited for low-cost uniprocessor

sparc v8

Abstract: instruction set Sun SPARC T3 microsparc STP1100BGA-100 instruction set Sun SPARC T2 sun sparc v5 Sun Sparc II
Contextual Info: Preliminary STP1100BGA December 1997 microSPARC -IIep DATA SHEET SPARC v8 32-Bit Microprocessor With PCI/DRAM Interfaces DESCRIPTION The microSPARC-IIep 32-bit microprocessor is a highly integrated, high-performance microprocessor. Implementing the SPARC Architecture version 8 specification, it is ideally suited for low-cost uniprocessor

mb86904

Abstract: MB8690 microsparc M Meiko microsparc I microsparc 1
Contextual Info: S un M icro electro nics July 19 97 microSPARC -ll DATA SHEET SPARC v8 32-Bit Microprocessor With DRAM Interface D e s c r ip t io n The microSPARC-II 32-bit microprocessor is a highly integrated, high-performance microprocessor. Imple­ menting the SPARC Architecture v8 specification, it is ideally suited for low-cost uniprocessor applications.

mb86904

Abstract: td 232 v8 TAG 257 600
Contextual Info: STP1012 S un M ic r o e l e c t r o n ic s J u ly 1997 microSPARC -ll DATA SHEET SPARC v8 32-Bit Microprocessor With DRAM Interface D e s c r ip t io n The microSPARC-H 32-bit microprocessor is a highly integrated, high-performance microprocessor. Implementing the

Contextual Info: STP1012 S un M ic r o e l e c t r o n ic s J u ly 1997 microSPARC -ll DATA SHEET SPARC v8 32-Bit Microprocessor With DRAM Interface D e s c r ip t io n The microSPARC-II 32-bit m icroprocessor is a highly integrated, high-perform ance microprocessor. Im ple­

ET 8211

Abstract: 8211 microsparc RISC processor OTI-8211 CCIR601 OTI8211 OTI-8511 ISO-11172 720x576 DATA39
Contextual Info: O A K T E C H N O L O G Y OTI-8211 MPEG-2 Decoder for Digital Television Systems product features • Operates on ISO 11172 MPEG-1 and ISO 13818 (MPEG-2) bit streams • Single-chip solution, decodes MPEG-1 and MPEG-2 audio, video, and system bit streams

Contextual Info: Preliminary STP1100BG A S un M ic r o e l e c t r o n ic s J u ly 1997 microSPARC -llep DATA SHEET SPARC v8 32-Bit Microprocessor With PCI/DRAM Interfaces D e s c r ip t io n The microSPARC-IIep 32-bit m icroprocessor is a highly integrated, high-perform ance microprocessor. Im ple­

C-Cube mpeg demux

Abstract: ISO13818-2 SMARTCARD directv AViA-9600TM introduction of demux AVIA-9600 CCIR-656 IEEE1284 UNIVERSAL ir remote decoder C-Cube decoder
Contextual Info: AViA-9600 Family SINGLE-CHIP DIGITAL SET-TOP BOX SOLUTION 1 INTRODUCTION 1.1 Product Benefits The AViA-9600 family of processors is an advanced solution for digital set-top box STB applications including hard disk drive (HDD) time-shifting and web access. This

je1100

Abstract: vga connector computer networking diagram "8 pin" mini-din diagram microsparc 1 8 pin mini-din connector pci connector footprint
Contextual Info: Preliminary JE1-100-0/1 July 1997 JavaEngine 1 DATA SHEET Network Computer Board DESCRIPTION The JavaEngine 1 is targeted for network computing applications. It is offered as a board-level product or a design kit. It features the highly integrated microSPARC-IIep™, color graphics, stereo audio, and high-performance networking. Software packaged with the product includes an optimized version of JavaOS™, and the

je1100

Abstract: mini-din vga stereo stereo
Contextual Info: S un M ic r o e le c t r o n ic s July 1997 JavaEngine 1 DATA SHEET Network Computer Board D e s c r ip t io n The JavaEngine 1 is targeted for network computing applications. It is offered as a board-level product or a design kit. It features the highly integrated microSPARC-IIep™, color graphics, stereo audio, and high-perfor­