MDIO CONTROLLER Search Results

LPC175x

Abstract: MDIO MDIO write MDIO MDC AN10859 AN1085 NXP Interface and Connectivity MDIO controller nxp lpc175x DP83848C
Contextual Info: AN10859 LPC1700 Ethernet MII Management MDIO via software Rev. 01 — 6 August 2009 Application note Document information Info Content Keywords LPC1700, Ethernet, MII, RMII, MIIM, MDIO Abstract This code example demonstrates how to emulate an Ethernet MII

1000BASE-T2

Abstract: MDIO clause 22 clause 22 phy registers wishbone RD1074 MDIO MDIO controller 3 to 8 bit decoder vhdl IEEE format LCMXO640C-4T100C 100Base-T2
Contextual Info: Accessing Control Registers Through the MDIO Bus February 2010 Reference Design RD1074 Introduction Management Data Input/Output Interfaces, or MDIO, are specified in the IEEE 802.3 standard. Their primary application is to provide a Serial Management Interface SMI to transfer management data between an Ethernet Media

MDIO

Abstract: ARM926EJ-S C6000 TMS320C6000
Contextual Info: TMS320DM646x DMSoC Ethernet Media Access Controller EMAC / Management Data Input/Output (MDIO) Module User's Guide Literature Number: SPRUEQ6 December 2007 2 SPRUEQ6 – December 2007 Submit Documentation Feedback Contents Preface. 10

EMAC

Abstract: MDIO C6000 SPRU983 TMS320C6000
Contextual Info: TMS320DM643x DMP Ethernet Media Access Controller EMAC / Management Data Input/Output (MDIO) Module User's Guide Literature Number: SPRU941A April 2007 2 SPRU941A – April 2007 Submit Documentation Feedback Contents Preface. 10

MDIO

Abstract: tms320c64x teardown C6000 TMS320C6000 54923
Contextual Info: TMS320C642x DSP Ethernet Media Access Controller EMAC / Management Data Input/Output (MDIO) Module User's Guide Literature Number: SPRUEM6A April 2007 2 SPRUEM6A – April 2007 Submit Documentation Feedback Contents Preface. 10

MDIO

Abstract: ARM926EJ-S C6000 TMS320C6000
Contextual Info: TMS320DM644x DMSoC Ethernet Media Access Controller EMAC / Management Data Input/Output (MDIO) Module User's Guide Literature Number: SPRUE24A April 2007 2 SPRUE24A – April 2007 Submit Documentation Feedback Contents Preface. 10

SPRU401

Abstract: MDIO tms320c64x teardown C6000 SPRU189 SPRU190 TMS320C6000 SPRU628A
Contextual Info: TMS320C6000 DSP Ethernet Media Access Controller EMAC / Management Data Input/Output (MDIO) Module Reference Guide Literature Number: SPRU628A March 2004 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications,

VT6528

Abstract: 100BASE-X MDIO phy gvrp PHY 2078 ss smii MII switch "Spanning Tree"
Contextual Info: BLOCK DIAGRAM： Jumpers 2-pin EEPROM Initialization Controller MDCx, MDIO LED outputs PHY Management Interface LED Controller 8K+256 MAC Table 4K VLAN Table 1K Multicast Table 256 L2+ Rule/Action 4Mb Packet Buffer 4096x128-Byte Packet Buffer Management Unit

10BASET

Abstract: DP83223V DP83846A DP83846AVHG toa25 s558-5999-46
Contextual Info: DP83846A DsPHYTER — Single 10/100 Ethernet Transceiver 2002 National Semiconductor Corporation www.national.com DP83846A RX_CLK RXD[3:0] RX_DV RX_ER CRS COL MDC MDIO TX_EN SERIAL MANAGEMENT TX_ER TX_CLK HARDWARE CONFIGURATION PINS AN_EN, AN0, AN1 (PAUSE_EN)

802.3 CRC32

Abstract: 81313 CRC-32 Gigabit Ethernet PHY MorethanIP ethernet mac 1588 PHY Ethernet to FIFO
Contextual Info: 1588 Tri-Speed Ethernet MAC Core Product Brief V1.0 – March 2006 MAC Receive Application Interface Transmit Application Interface Transmit FIFO Pause Frame Terminate TX Control CRC Gen. Pause Frame Generate Timestamping Configuration Statistics MDIO Master

BCM8706

Abstract: 10G BIST PRBS 64b/66b encoder gearbox microcontroller optics fiber MDIO clause 45 XAUI 8706p 10G serdes 2.5 xaui
Contextual Info: BCM8706 XAUI TO SERIAL 10G BASE-LRM TRANSCEIVER SUMMARY OF BENEFITS FEATURES • Meets and exceeds industry standard • IEEE 802.3ae • IEEE802.3aq • MDIO interface compliant to IEEE 802.3ae Clause 45 with extended indirect address register access

PBD14

Abstract: PBD26 PBD24 PBD12 ALLAYER COMMUNICATIONS PBD30 ETD12 PBD18 PBD-28 ETD10
Contextual Info: AL15 Revision 1.0 5-PORT LOW COST 10/100 SWITCH WITH RMII • • • • • • • • Supports five 10/100 Mbit/s Ethernet ports with RMII interface Capable of trunking up to 500 Mbit/s link Full- and half-duplex mode operation Speed auto-negotiation through MDIO

Contextual Info: Precision Analog Microcontroller, 14-Bit Analog I/O with MDIO Interface, ARM Cortex-M3 ADuCM320 Data Sheet FEATURES Analog input/output Multichannel, 14-bit, 1 MSPS analog-to-digital converter ADC Up to 16 ADC input channels 0 V to VREF analog input range

64b/66b encoder

Abstract: 8b/10b decoder gearbox MDIO clause 45 BCM8702 64B66B
Contextual Info: BCM8702 SERIAL 10-GIGABIT ETHERNET TRANSCEIVER WITH XAUI INTERFACE SUMMARY OF BENEFITS FEATURES • IEEE 802.3ae compliant • Support for XENPAK and XGP Standards • Power supplies: core, LVPECL, CML, and XAUI at 1.8V, MDIO at 1.2V, and CMOS at 1.8 or 3.3V.

jabber

Abstract: 23Z128 TNETE2004 TNETX15VEPGE TNETX3150
Contextual Info: TNETE2004 MDIO-MANAGED QuadPHY FOUR 10BASE-T PHYSICAL-LAYER INTERFACES SPWS023D – OCTOBER 1996 – REVISED OCTOBER 1997 D D D D D D D D Single-Chip Multi-PHY Solution: – Four 10BASE-T Physical-Layer PHY Interfaces in One Package Minimizing PCB Footprint for Internetworking

mdio level translator

Abstract: max14595 W80A1 level translator mdio TFL 50 T822CN
Contextual Info: EVALUATION KIT AVAILABLE MAX14595 Low-Power Dual-Channel Logic-Level Translator S Meets Industry Standards General Description  I2C Requirements for Standard, Fast, and High* Speeds  MDIO Open Drain Above 4MHz* The MAX14595 is a dual-channel, bidirectional logiclevel translator designed specifically for low power

Contextual Info: EVALUATION KIT AVAILABLE MAX14595 Low-Power Dual-Channel Logic-Level Translator S Meets Industry Standards General Description  I2C Requirements for Standard, Fast, and High* Speeds  MDIO Open Drain Above 4MHz* The MAX14595 is a dual-channel, bidirectional logiclevel translator designed specifically for low power

Contextual Info: TNETE2004 MDIO-MANAGED QuadPHY FOUR 10BASE-T PHYSICAL-LAYER INTERFACES SPWS023D – OCTOBER 1996 – REVISED OCTOBER 1997 D D D D D D D D Single-Chip Multi-PHY Solution: – Four 10BASE-T Physical-Layer PHY Interfaces in One Package Minimizing PCB Footprint for Internetworking

M06T

Abstract: 10BaseT-HD filmag
Contextual Info: TNETE2004 MDIO-MANAGED QuadPHY FOUR 10BASE-T PHYSICAL-LAYER INTERFACES SPWS023D – OCTOBER 1996 – REVISED OCTOBER 1997 D D D D D D D D Single-Chip Multi-PHY Solution: – Four 10BASE-T Physical-Layer PHY Interfaces in One Package Minimizing PCB Footprint for Internetworking

Contextual Info: TNETE2004 MDIO-MANAGED QuadPHY FOUR 10BASE-T PHYSICAL-LAYER INTERFACES SPWS023D – OCTOBER 1996 – REVISED OCTOBER 1997 D D D D D D D D Single-Chip Multi-PHY Solution: – Four 10BASE-T Physical-Layer PHY Interfaces in One Package Minimizing PCB Footprint for Internetworking

PIN assignments of UTP cables

Abstract: 23Z128 TNETE2004 TNETX15VEPGE TNETX3150
Contextual Info: TNETE2004 MDIO-MANAGED QuadPHY FOUR 10BASE-T PHYSICAL-LAYER INTERFACES SPWS023C – OCTOBER 1996 – REVISED MAY 1997 D D D D D D D D Single-Chip Multi-PHY Solution: – Four 10BASE-T Physical-Layer PHY Interfaces in One Package Minimizing PCB Footprint for Internetworking

VT6103L

Abstract: VT6103X ET901 vt6103 0004H 2001H LQFP-48 "Fast Link Pulse"
Contextual Info: Data Sheet May 9, 2006 ET901 Fast Ethernet Transceiver Features Overview • Single-chip 10Base-T/100Base-TX transceiver. ■ Dual speed: 10/100 Mbits/s. ■ Half-/full-duplex operation. ■ Media-independent interface MII to IEEE 802.3 MAC. ■ MDC/MDIO interface for configuration and status.

AL15

Abstract: SGRAM
Contextual Info: AL15 Advance Information Five-Port Low Cost 10/100 Switch With RMII • • • • • • • • Supports five 10/100 Mbit/s Ethernet ports with RMII interface Capable of trunking up to 500 Mbit/s link Full- and half-duplex mode operation Speed auto-negotiation through MDIO

ALLAYER COMMUNICATIONS

Abstract: MG802C256q-10 AL102A PBD18 PBD10 PBD20
Contextual Info: AL102A Revision 1.0 8 PORT LOW COST 10/100 SWITCH • • • • • • • • • Supports eight 10/100 Mbit/s Ethernet ports with MII interface Capable of trunking up to 800 Mbit/s link Full- and half-duplex mode operation Speed auto-negotiation through MDIO